10 #include <asm/cpumask.h>
11 #include <uapi/asm/msr.h>
30 struct msr_regs_info {
35 static inline unsigned long long native_read_tscp(unsigned int *aux)
37 unsigned long low, high;
38 asm volatile(".byte 0x0f,0x01,0xf9"
39 : "=a" (low), "=d" (high), "=c" (*aux));
40 return low | ((u64)high << 32);
44 * both i386 and x86_64 returns 64-bit value in edx:eax, but gcc's "A"
45 * constraint has different meanings. For i386, "A" means exactly
46 * edx:eax, while for x86_64 it doesn't mean rdx:rax or edx:eax. Instead,
47 * it means rax *or* rdx.
50 #define DECLARE_ARGS(val, low, high) unsigned low, high
51 #define EAX_EDX_VAL(val, low, high) ((low) | ((u64)(high) << 32))
52 #define EAX_EDX_ARGS(val, low, high) "a" (low), "d" (high)
53 #define EAX_EDX_RET(val, low, high) "=a" (low), "=d" (high)
55 #define DECLARE_ARGS(val, low, high) unsigned long long val
56 #define EAX_EDX_VAL(val, low, high) (val)
57 #define EAX_EDX_ARGS(val, low, high) "A" (val)
58 #define EAX_EDX_RET(val, low, high) "=A" (val)
61 static inline unsigned long long native_read_msr(unsigned int msr)
63 DECLARE_ARGS(val, low, high);
65 asm volatile("rdmsr" : EAX_EDX_RET(val, low, high) : "c" (msr));
66 return EAX_EDX_VAL(val, low, high);
69 static inline unsigned long long native_read_msr_safe(unsigned int msr,
72 DECLARE_ARGS(val, low, high);
74 asm volatile("2: rdmsr ; xor %[err],%[err]\n"
76 ".section .fixup,\"ax\"\n\t"
77 "3: mov %[fault],%[err] ; jmp 1b\n\t"
80 : [err] "=r" (*err), EAX_EDX_RET(val, low, high)
81 : "c" (msr), [fault] "i" (-EIO));
82 return EAX_EDX_VAL(val, low, high);
85 static inline void native_write_msr(unsigned int msr,
86 unsigned low, unsigned high)
88 asm volatile("wrmsr" : : "c" (msr), "a"(low), "d" (high) : "memory");
91 /* Can be uninlined because referenced by paravirt */
92 notrace static inline int native_write_msr_safe(unsigned int msr,
93 unsigned low, unsigned high)
96 asm volatile("2: wrmsr ; xor %[err],%[err]\n"
98 ".section .fixup,\"ax\"\n\t"
99 "3: mov %[fault],%[err] ; jmp 1b\n\t"
103 : "c" (msr), "0" (low), "d" (high),
109 extern int rdmsr_safe_regs(u32 regs[8]);
110 extern int wrmsr_safe_regs(u32 regs[8]);
112 static __always_inline unsigned long long native_read_tsc(void)
114 DECLARE_ARGS(val, low, high);
116 asm volatile("rdtsc" : EAX_EDX_RET(val, low, high));
118 return EAX_EDX_VAL(val, low, high);
121 static inline unsigned long long native_read_pmc(int counter)
123 DECLARE_ARGS(val, low, high);
125 asm volatile("rdpmc" : EAX_EDX_RET(val, low, high) : "c" (counter));
126 return EAX_EDX_VAL(val, low, high);
129 #ifdef CONFIG_PARAVIRT
130 #include <asm/paravirt.h>
132 #include <linux/errno.h>
134 * Access to machine-specific registers (available on 586 and better only)
135 * Note: the rd* operations modify the parameters directly (without using
136 * pointer indirection), this allows gcc to optimize better
139 #define rdmsr(msr, low, high) \
141 u64 __val = native_read_msr((msr)); \
142 (void)((low) = (u32)__val); \
143 (void)((high) = (u32)(__val >> 32)); \
146 static inline void wrmsr(unsigned msr, unsigned low, unsigned high)
148 native_write_msr(msr, low, high);
151 #define rdmsrl(msr, val) \
152 ((val) = native_read_msr((msr)))
154 #define wrmsrl(msr, val) \
155 native_write_msr((msr), (u32)((u64)(val)), (u32)((u64)(val) >> 32))
157 /* wrmsr with exception handling */
158 static inline int wrmsr_safe(unsigned msr, unsigned low, unsigned high)
160 return native_write_msr_safe(msr, low, high);
163 /* rdmsr with exception handling */
164 #define rdmsr_safe(msr, low, high) \
167 u64 __val = native_read_msr_safe((msr), &__err); \
168 (*low) = (u32)__val; \
169 (*high) = (u32)(__val >> 32); \
173 static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
177 *p = native_read_msr_safe(msr, &err);
181 #define rdpmc(counter, low, high) \
183 u64 _l = native_read_pmc((counter)); \
185 (high) = (u32)(_l >> 32); \
188 #define rdpmcl(counter, val) ((val) = native_read_pmc(counter))
190 #endif /* !CONFIG_PARAVIRT */
193 * 64-bit version of wrmsr_safe():
195 static inline int wrmsrl_safe(u32 msr, u64 val)
197 return wrmsr_safe(msr, (u32)val, (u32)(val >> 32));
200 #define write_tsc(low, high) wrmsr(MSR_IA32_TSC, (low), (high))
202 #define write_rdtscp_aux(val) wrmsr(MSR_TSC_AUX, (val), 0)
204 struct msr *msrs_alloc(void);
205 void msrs_free(struct msr *msrs);
206 int msr_set_bit(u32 msr, u8 bit);
207 int msr_clear_bit(u32 msr, u8 bit);
210 int rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);
211 int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);
212 int rdmsrl_on_cpu(unsigned int cpu, u32 msr_no, u64 *q);
213 int wrmsrl_on_cpu(unsigned int cpu, u32 msr_no, u64 q);
214 void rdmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr *msrs);
215 void wrmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr *msrs);
216 int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);
217 int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);
218 int rdmsrl_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 *q);
219 int wrmsrl_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 q);
220 int rdmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8]);
221 int wrmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8]);
222 #else /* CONFIG_SMP */
223 static inline int rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h)
225 rdmsr(msr_no, *l, *h);
228 static inline int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
233 static inline int rdmsrl_on_cpu(unsigned int cpu, u32 msr_no, u64 *q)
238 static inline int wrmsrl_on_cpu(unsigned int cpu, u32 msr_no, u64 q)
243 static inline void rdmsr_on_cpus(const struct cpumask *m, u32 msr_no,
246 rdmsr_on_cpu(0, msr_no, &(msrs[0].l), &(msrs[0].h));
248 static inline void wrmsr_on_cpus(const struct cpumask *m, u32 msr_no,
251 wrmsr_on_cpu(0, msr_no, msrs[0].l, msrs[0].h);
253 static inline int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no,
256 return rdmsr_safe(msr_no, l, h);
258 static inline int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
260 return wrmsr_safe(msr_no, l, h);
262 static inline int rdmsrl_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 *q)
264 return rdmsrl_safe(msr_no, q);
266 static inline int wrmsrl_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 q)
268 return wrmsrl_safe(msr_no, q);
270 static inline int rdmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8])
272 return rdmsr_safe_regs(regs);
274 static inline int wrmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8])
276 return wrmsr_safe_regs(regs);
278 #endif /* CONFIG_SMP */
279 #endif /* __ASSEMBLY__ */
280 #endif /* _ASM_X86_MSR_H */