[SPARC64]: Fix 2 bugs in sabre_irq_build()
[firefly-linux-kernel-4.4.55.git] / arch / sparc64 / kernel / prom.c
1 /*
2  * Procedures for creating, accessing and interpreting the device tree.
3  *
4  * Paul Mackerras       August 1996.
5  * Copyright (C) 1996-2005 Paul Mackerras.
6  * 
7  *  Adapted for 64bit PowerPC by Dave Engebretsen and Peter Bergner.
8  *    {engebret|bergner}@us.ibm.com 
9  *
10  *  Adapted for sparc64 by David S. Miller davem@davemloft.net
11  *
12  *      This program is free software; you can redistribute it and/or
13  *      modify it under the terms of the GNU General Public License
14  *      as published by the Free Software Foundation; either version
15  *      2 of the License, or (at your option) any later version.
16  */
17
18 #include <linux/config.h>
19 #include <linux/kernel.h>
20 #include <linux/types.h>
21 #include <linux/string.h>
22 #include <linux/mm.h>
23 #include <linux/bootmem.h>
24 #include <linux/module.h>
25
26 #include <asm/prom.h>
27 #include <asm/of_device.h>
28 #include <asm/oplib.h>
29 #include <asm/irq.h>
30 #include <asm/asi.h>
31 #include <asm/upa.h>
32
33 static struct device_node *allnodes;
34
35 /* use when traversing tree through the allnext, child, sibling,
36  * or parent members of struct device_node.
37  */
38 static DEFINE_RWLOCK(devtree_lock);
39
40 int of_device_is_compatible(struct device_node *device, const char *compat)
41 {
42         const char* cp;
43         int cplen, l;
44
45         cp = (char *) of_get_property(device, "compatible", &cplen);
46         if (cp == NULL)
47                 return 0;
48         while (cplen > 0) {
49                 if (strncmp(cp, compat, strlen(compat)) == 0)
50                         return 1;
51                 l = strlen(cp) + 1;
52                 cp += l;
53                 cplen -= l;
54         }
55
56         return 0;
57 }
58 EXPORT_SYMBOL(of_device_is_compatible);
59
60 struct device_node *of_get_parent(const struct device_node *node)
61 {
62         struct device_node *np;
63
64         if (!node)
65                 return NULL;
66
67         np = node->parent;
68
69         return np;
70 }
71 EXPORT_SYMBOL(of_get_parent);
72
73 struct device_node *of_get_next_child(const struct device_node *node,
74         struct device_node *prev)
75 {
76         struct device_node *next;
77
78         next = prev ? prev->sibling : node->child;
79         for (; next != 0; next = next->sibling) {
80                 break;
81         }
82
83         return next;
84 }
85 EXPORT_SYMBOL(of_get_next_child);
86
87 struct device_node *of_find_node_by_path(const char *path)
88 {
89         struct device_node *np = allnodes;
90
91         for (; np != 0; np = np->allnext) {
92                 if (np->full_name != 0 && strcmp(np->full_name, path) == 0)
93                         break;
94         }
95
96         return np;
97 }
98 EXPORT_SYMBOL(of_find_node_by_path);
99
100 struct device_node *of_find_node_by_phandle(phandle handle)
101 {
102         struct device_node *np;
103
104         for (np = allnodes; np != 0; np = np->allnext)
105                 if (np->node == handle)
106                         break;
107
108         return np;
109 }
110 EXPORT_SYMBOL(of_find_node_by_phandle);
111
112 struct device_node *of_find_node_by_name(struct device_node *from,
113         const char *name)
114 {
115         struct device_node *np;
116
117         np = from ? from->allnext : allnodes;
118         for (; np != NULL; np = np->allnext)
119                 if (np->name != NULL && strcmp(np->name, name) == 0)
120                         break;
121
122         return np;
123 }
124 EXPORT_SYMBOL(of_find_node_by_name);
125
126 struct device_node *of_find_node_by_type(struct device_node *from,
127         const char *type)
128 {
129         struct device_node *np;
130
131         np = from ? from->allnext : allnodes;
132         for (; np != 0; np = np->allnext)
133                 if (np->type != 0 && strcmp(np->type, type) == 0)
134                         break;
135
136         return np;
137 }
138 EXPORT_SYMBOL(of_find_node_by_type);
139
140 struct device_node *of_find_compatible_node(struct device_node *from,
141         const char *type, const char *compatible)
142 {
143         struct device_node *np;
144
145         np = from ? from->allnext : allnodes;
146         for (; np != 0; np = np->allnext) {
147                 if (type != NULL
148                     && !(np->type != 0 && strcmp(np->type, type) == 0))
149                         continue;
150                 if (of_device_is_compatible(np, compatible))
151                         break;
152         }
153
154         return np;
155 }
156 EXPORT_SYMBOL(of_find_compatible_node);
157
158 struct property *of_find_property(struct device_node *np, const char *name,
159                                   int *lenp)
160 {
161         struct property *pp;
162
163         for (pp = np->properties; pp != 0; pp = pp->next) {
164                 if (strcmp(pp->name, name) == 0) {
165                         if (lenp != 0)
166                                 *lenp = pp->length;
167                         break;
168                 }
169         }
170         return pp;
171 }
172 EXPORT_SYMBOL(of_find_property);
173
174 /*
175  * Find a property with a given name for a given node
176  * and return the value.
177  */
178 void *of_get_property(struct device_node *np, const char *name, int *lenp)
179 {
180         struct property *pp = of_find_property(np,name,lenp);
181         return pp ? pp->value : NULL;
182 }
183 EXPORT_SYMBOL(of_get_property);
184
185 int of_getintprop_default(struct device_node *np, const char *name, int def)
186 {
187         struct property *prop;
188         int len;
189
190         prop = of_find_property(np, name, &len);
191         if (!prop || len != 4)
192                 return def;
193
194         return *(int *) prop->value;
195 }
196 EXPORT_SYMBOL(of_getintprop_default);
197
198 int of_n_addr_cells(struct device_node *np)
199 {
200         int* ip;
201         do {
202                 if (np->parent)
203                         np = np->parent;
204                 ip = of_get_property(np, "#address-cells", NULL);
205                 if (ip != NULL)
206                         return *ip;
207         } while (np->parent);
208         /* No #address-cells property for the root node, default to 2 */
209         return 2;
210 }
211 EXPORT_SYMBOL(of_n_addr_cells);
212
213 int of_n_size_cells(struct device_node *np)
214 {
215         int* ip;
216         do {
217                 if (np->parent)
218                         np = np->parent;
219                 ip = of_get_property(np, "#size-cells", NULL);
220                 if (ip != NULL)
221                         return *ip;
222         } while (np->parent);
223         /* No #size-cells property for the root node, default to 1 */
224         return 1;
225 }
226 EXPORT_SYMBOL(of_n_size_cells);
227
228 int of_set_property(struct device_node *dp, const char *name, void *val, int len)
229 {
230         struct property **prevp;
231         void *new_val;
232         int err;
233
234         new_val = kmalloc(len, GFP_KERNEL);
235         if (!new_val)
236                 return -ENOMEM;
237
238         memcpy(new_val, val, len);
239
240         err = -ENODEV;
241
242         write_lock(&devtree_lock);
243         prevp = &dp->properties;
244         while (*prevp) {
245                 struct property *prop = *prevp;
246
247                 if (!strcmp(prop->name, name)) {
248                         void *old_val = prop->value;
249                         int ret;
250
251                         ret = prom_setprop(dp->node, name, val, len);
252                         err = -EINVAL;
253                         if (ret >= 0) {
254                                 prop->value = new_val;
255                                 prop->length = len;
256
257                                 if (OF_IS_DYNAMIC(prop))
258                                         kfree(old_val);
259
260                                 OF_MARK_DYNAMIC(prop);
261
262                                 err = 0;
263                         }
264                         break;
265                 }
266                 prevp = &(*prevp)->next;
267         }
268         write_unlock(&devtree_lock);
269
270         /* XXX Upate procfs if necessary... */
271
272         return err;
273 }
274 EXPORT_SYMBOL(of_set_property);
275
276 static unsigned int prom_early_allocated;
277
278 static void * __init prom_early_alloc(unsigned long size)
279 {
280         void *ret;
281
282         ret = __alloc_bootmem(size, SMP_CACHE_BYTES, 0UL);
283         if (ret != NULL)
284                 memset(ret, 0, size);
285
286         prom_early_allocated += size;
287
288         return ret;
289 }
290
291 #ifdef CONFIG_PCI
292 /* PSYCHO interrupt mapping support. */
293 #define PSYCHO_IMAP_A_SLOT0     0x0c00UL
294 #define PSYCHO_IMAP_B_SLOT0     0x0c20UL
295 static unsigned long psycho_pcislot_imap_offset(unsigned long ino)
296 {
297         unsigned int bus =  (ino & 0x10) >> 4;
298         unsigned int slot = (ino & 0x0c) >> 2;
299
300         if (bus == 0)
301                 return PSYCHO_IMAP_A_SLOT0 + (slot * 8);
302         else
303                 return PSYCHO_IMAP_B_SLOT0 + (slot * 8);
304 }
305
306 #define PSYCHO_IMAP_SCSI        0x1000UL
307 #define PSYCHO_IMAP_ETH         0x1008UL
308 #define PSYCHO_IMAP_BPP         0x1010UL
309 #define PSYCHO_IMAP_AU_REC      0x1018UL
310 #define PSYCHO_IMAP_AU_PLAY     0x1020UL
311 #define PSYCHO_IMAP_PFAIL       0x1028UL
312 #define PSYCHO_IMAP_KMS         0x1030UL
313 #define PSYCHO_IMAP_FLPY        0x1038UL
314 #define PSYCHO_IMAP_SHW         0x1040UL
315 #define PSYCHO_IMAP_KBD         0x1048UL
316 #define PSYCHO_IMAP_MS          0x1050UL
317 #define PSYCHO_IMAP_SER         0x1058UL
318 #define PSYCHO_IMAP_TIM0        0x1060UL
319 #define PSYCHO_IMAP_TIM1        0x1068UL
320 #define PSYCHO_IMAP_UE          0x1070UL
321 #define PSYCHO_IMAP_CE          0x1078UL
322 #define PSYCHO_IMAP_A_ERR       0x1080UL
323 #define PSYCHO_IMAP_B_ERR       0x1088UL
324 #define PSYCHO_IMAP_PMGMT       0x1090UL
325 #define PSYCHO_IMAP_GFX         0x1098UL
326 #define PSYCHO_IMAP_EUPA        0x10a0UL
327
328 static unsigned long __psycho_onboard_imap_off[] = {
329 /*0x20*/        PSYCHO_IMAP_SCSI,
330 /*0x21*/        PSYCHO_IMAP_ETH,
331 /*0x22*/        PSYCHO_IMAP_BPP,
332 /*0x23*/        PSYCHO_IMAP_AU_REC,
333 /*0x24*/        PSYCHO_IMAP_AU_PLAY,
334 /*0x25*/        PSYCHO_IMAP_PFAIL,
335 /*0x26*/        PSYCHO_IMAP_KMS,
336 /*0x27*/        PSYCHO_IMAP_FLPY,
337 /*0x28*/        PSYCHO_IMAP_SHW,
338 /*0x29*/        PSYCHO_IMAP_KBD,
339 /*0x2a*/        PSYCHO_IMAP_MS,
340 /*0x2b*/        PSYCHO_IMAP_SER,
341 /*0x2c*/        PSYCHO_IMAP_TIM0,
342 /*0x2d*/        PSYCHO_IMAP_TIM1,
343 /*0x2e*/        PSYCHO_IMAP_UE,
344 /*0x2f*/        PSYCHO_IMAP_CE,
345 /*0x30*/        PSYCHO_IMAP_A_ERR,
346 /*0x31*/        PSYCHO_IMAP_B_ERR,
347 /*0x32*/        PSYCHO_IMAP_PMGMT
348 };
349 #define PSYCHO_ONBOARD_IRQ_BASE         0x20
350 #define PSYCHO_ONBOARD_IRQ_LAST         0x32
351 #define psycho_onboard_imap_offset(__ino) \
352         __psycho_onboard_imap_off[(__ino) - PSYCHO_ONBOARD_IRQ_BASE]
353
354 #define PSYCHO_ICLR_A_SLOT0     0x1400UL
355 #define PSYCHO_ICLR_SCSI        0x1800UL
356
357 #define psycho_iclr_offset(ino)                                       \
358         ((ino & 0x20) ? (PSYCHO_ICLR_SCSI + (((ino) & 0x1f) << 3)) :  \
359                         (PSYCHO_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
360
361 static unsigned int psycho_irq_build(struct device_node *dp,
362                                      unsigned int ino,
363                                      void *_data)
364 {
365         unsigned long controller_regs = (unsigned long) _data;
366         unsigned long imap, iclr;
367         unsigned long imap_off, iclr_off;
368         int inofixup = 0;
369
370         ino &= 0x3f;
371         if (ino < PSYCHO_ONBOARD_IRQ_BASE) {
372                 /* PCI slot */
373                 imap_off = psycho_pcislot_imap_offset(ino);
374         } else {
375                 /* Onboard device */
376                 if (ino > PSYCHO_ONBOARD_IRQ_LAST) {
377                         prom_printf("psycho_irq_build: Wacky INO [%x]\n", ino);
378                         prom_halt();
379                 }
380                 imap_off = psycho_onboard_imap_offset(ino);
381         }
382
383         /* Now build the IRQ bucket. */
384         imap = controller_regs + imap_off;
385         imap += 4;
386
387         iclr_off = psycho_iclr_offset(ino);
388         iclr = controller_regs + iclr_off;
389         iclr += 4;
390
391         if ((ino & 0x20) == 0)
392                 inofixup = ino & 0x03;
393
394         return build_irq(inofixup, iclr, imap);
395 }
396
397 static void psycho_irq_trans_init(struct device_node *dp)
398 {
399         struct linux_prom64_registers *regs;
400
401         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
402         dp->irq_trans->irq_build = psycho_irq_build;
403
404         regs = of_get_property(dp, "reg", NULL);
405         dp->irq_trans->data = (void *) regs[2].phys_addr;
406 }
407
408 #define sabre_read(__reg) \
409 ({      u64 __ret; \
410         __asm__ __volatile__("ldxa [%1] %2, %0" \
411                              : "=r" (__ret) \
412                              : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
413                              : "memory"); \
414         __ret; \
415 })
416
417 struct sabre_irq_data {
418         unsigned long controller_regs;
419         unsigned int pci_first_busno;
420 };
421 #define SABRE_CONFIGSPACE       0x001000000UL
422 #define SABRE_WRSYNC            0x1c20UL
423
424 #define SABRE_CONFIG_BASE(CONFIG_SPACE) \
425         (CONFIG_SPACE | (1UL << 24))
426 #define SABRE_CONFIG_ENCODE(BUS, DEVFN, REG)    \
427         (((unsigned long)(BUS)   << 16) |       \
428          ((unsigned long)(DEVFN) << 8)  |       \
429          ((unsigned long)(REG)))
430
431 /* When a device lives behind a bridge deeper in the PCI bus topology
432  * than APB, a special sequence must run to make sure all pending DMA
433  * transfers at the time of IRQ delivery are visible in the coherency
434  * domain by the cpu.  This sequence is to perform a read on the far
435  * side of the non-APB bridge, then perform a read of Sabre's DMA
436  * write-sync register.
437  */
438 static void sabre_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
439 {
440         unsigned int phys_hi = (unsigned int) (unsigned long) _arg1;
441         struct sabre_irq_data *irq_data = _arg2;
442         unsigned long controller_regs = irq_data->controller_regs;
443         unsigned long sync_reg = controller_regs + SABRE_WRSYNC;
444         unsigned long config_space = controller_regs + SABRE_CONFIGSPACE;
445         unsigned int bus, devfn;
446         u16 _unused;
447
448         config_space = SABRE_CONFIG_BASE(config_space);
449
450         bus = (phys_hi >> 16) & 0xff;
451         devfn = (phys_hi >> 8) & 0xff;
452
453         config_space |= SABRE_CONFIG_ENCODE(bus, devfn, 0x00);
454
455         __asm__ __volatile__("membar #Sync\n\t"
456                              "lduha [%1] %2, %0\n\t"
457                              "membar #Sync"
458                              : "=r" (_unused)
459                              : "r" ((u16 *) config_space),
460                                "i" (ASI_PHYS_BYPASS_EC_E_L)
461                              : "memory");
462
463         sabre_read(sync_reg);
464 }
465
466 #define SABRE_IMAP_A_SLOT0      0x0c00UL
467 #define SABRE_IMAP_B_SLOT0      0x0c20UL
468 #define SABRE_IMAP_SCSI         0x1000UL
469 #define SABRE_IMAP_ETH          0x1008UL
470 #define SABRE_IMAP_BPP          0x1010UL
471 #define SABRE_IMAP_AU_REC       0x1018UL
472 #define SABRE_IMAP_AU_PLAY      0x1020UL
473 #define SABRE_IMAP_PFAIL        0x1028UL
474 #define SABRE_IMAP_KMS          0x1030UL
475 #define SABRE_IMAP_FLPY         0x1038UL
476 #define SABRE_IMAP_SHW          0x1040UL
477 #define SABRE_IMAP_KBD          0x1048UL
478 #define SABRE_IMAP_MS           0x1050UL
479 #define SABRE_IMAP_SER          0x1058UL
480 #define SABRE_IMAP_UE           0x1070UL
481 #define SABRE_IMAP_CE           0x1078UL
482 #define SABRE_IMAP_PCIERR       0x1080UL
483 #define SABRE_IMAP_GFX          0x1098UL
484 #define SABRE_IMAP_EUPA         0x10a0UL
485 #define SABRE_ICLR_A_SLOT0      0x1400UL
486 #define SABRE_ICLR_B_SLOT0      0x1480UL
487 #define SABRE_ICLR_SCSI         0x1800UL
488 #define SABRE_ICLR_ETH          0x1808UL
489 #define SABRE_ICLR_BPP          0x1810UL
490 #define SABRE_ICLR_AU_REC       0x1818UL
491 #define SABRE_ICLR_AU_PLAY      0x1820UL
492 #define SABRE_ICLR_PFAIL        0x1828UL
493 #define SABRE_ICLR_KMS          0x1830UL
494 #define SABRE_ICLR_FLPY         0x1838UL
495 #define SABRE_ICLR_SHW          0x1840UL
496 #define SABRE_ICLR_KBD          0x1848UL
497 #define SABRE_ICLR_MS           0x1850UL
498 #define SABRE_ICLR_SER          0x1858UL
499 #define SABRE_ICLR_UE           0x1870UL
500 #define SABRE_ICLR_CE           0x1878UL
501 #define SABRE_ICLR_PCIERR       0x1880UL
502
503 static unsigned long sabre_pcislot_imap_offset(unsigned long ino)
504 {
505         unsigned int bus =  (ino & 0x10) >> 4;
506         unsigned int slot = (ino & 0x0c) >> 2;
507
508         if (bus == 0)
509                 return SABRE_IMAP_A_SLOT0 + (slot * 8);
510         else
511                 return SABRE_IMAP_B_SLOT0 + (slot * 8);
512 }
513
514 static unsigned long __sabre_onboard_imap_off[] = {
515 /*0x20*/        SABRE_IMAP_SCSI,
516 /*0x21*/        SABRE_IMAP_ETH,
517 /*0x22*/        SABRE_IMAP_BPP,
518 /*0x23*/        SABRE_IMAP_AU_REC,
519 /*0x24*/        SABRE_IMAP_AU_PLAY,
520 /*0x25*/        SABRE_IMAP_PFAIL,
521 /*0x26*/        SABRE_IMAP_KMS,
522 /*0x27*/        SABRE_IMAP_FLPY,
523 /*0x28*/        SABRE_IMAP_SHW,
524 /*0x29*/        SABRE_IMAP_KBD,
525 /*0x2a*/        SABRE_IMAP_MS,
526 /*0x2b*/        SABRE_IMAP_SER,
527 /*0x2c*/        0 /* reserved */,
528 /*0x2d*/        0 /* reserved */,
529 /*0x2e*/        SABRE_IMAP_UE,
530 /*0x2f*/        SABRE_IMAP_CE,
531 /*0x30*/        SABRE_IMAP_PCIERR,
532 };
533 #define SABRE_ONBOARD_IRQ_BASE          0x20
534 #define SABRE_ONBOARD_IRQ_LAST          0x30
535 #define sabre_onboard_imap_offset(__ino) \
536         __sabre_onboard_imap_off[(__ino) - SABRE_ONBOARD_IRQ_BASE]
537
538 #define sabre_iclr_offset(ino)                                        \
539         ((ino & 0x20) ? (SABRE_ICLR_SCSI + (((ino) & 0x1f) << 3)) :  \
540                         (SABRE_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
541
542 static int parent_is_sabre_or_simba(struct device_node *dp)
543 {
544         char *parent_model, *parent_compat;
545
546         parent_model = of_get_property(dp->parent, "model", NULL);
547         if (parent_model &&
548             (!strcmp(parent_model, "SUNW,sabre") ||
549              !strcmp(parent_model, "SUNW,simba")))
550                 return 1;
551
552         parent_compat = of_get_property(dp->parent, "compatible", NULL);
553         if (parent_compat &&
554             (!strcmp(parent_compat, "pci108e,a000") ||
555              !strcmp(parent_compat, "pci108e,a001")))
556                 return 1;
557
558         return 0;
559 }
560
561 static unsigned int sabre_irq_build(struct device_node *dp,
562                                     unsigned int ino,
563                                     void *_data)
564 {
565         struct sabre_irq_data *irq_data = _data;
566         unsigned long controller_regs = irq_data->controller_regs;
567         struct linux_prom_pci_registers *regs;
568         unsigned long imap, iclr;
569         unsigned long imap_off, iclr_off;
570         int inofixup = 0;
571         int virt_irq;
572
573         ino &= 0x3f;
574         if (ino < SABRE_ONBOARD_IRQ_BASE) {
575                 /* PCI slot */
576                 imap_off = sabre_pcislot_imap_offset(ino);
577         } else {
578                 /* onboard device */
579                 if (ino > SABRE_ONBOARD_IRQ_LAST) {
580                         prom_printf("sabre_irq_build: Wacky INO [%x]\n", ino);
581                         prom_halt();
582                 }
583                 imap_off = sabre_onboard_imap_offset(ino);
584         }
585
586         /* Now build the IRQ bucket. */
587         imap = controller_regs + imap_off;
588         imap += 4;
589
590         iclr_off = sabre_iclr_offset(ino);
591         iclr = controller_regs + iclr_off;
592         iclr += 4;
593
594         if ((ino & 0x20) == 0)
595                 inofixup = ino & 0x03;
596
597         virt_irq = build_irq(inofixup, iclr, imap);
598
599         /* If the parent device is a PCI<->PCI bridge other than
600          * APB, we have to install a pre-handler to ensure that
601          * all pending DMA is drained before the interrupt handler
602          * is run.
603          */
604         regs = of_get_property(dp, "reg", NULL);
605         if (regs &&
606             !parent_is_sabre_or_simba(dp)) {
607                 irq_install_pre_handler(virt_irq,
608                                         sabre_wsync_handler,
609                                         (void *) (long) regs->phys_hi,
610                                         (void *) irq_data);
611         }
612
613         return virt_irq;
614 }
615
616 static void sabre_irq_trans_init(struct device_node *dp)
617 {
618         struct linux_prom64_registers *regs;
619         struct sabre_irq_data *irq_data;
620         u32 *busrange;
621
622         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
623         dp->irq_trans->irq_build = sabre_irq_build;
624
625         irq_data = prom_early_alloc(sizeof(struct sabre_irq_data));
626
627         regs = of_get_property(dp, "reg", NULL);
628         irq_data->controller_regs = regs[0].phys_addr;
629
630         busrange = of_get_property(dp, "bus-range", NULL);
631         irq_data->pci_first_busno = busrange[0];
632
633         dp->irq_trans->data = irq_data;
634 }
635
636 /* SCHIZO interrupt mapping support.  Unlike Psycho, for this controller the
637  * imap/iclr registers are per-PBM.
638  */
639 #define SCHIZO_IMAP_BASE        0x1000UL
640 #define SCHIZO_ICLR_BASE        0x1400UL
641
642 static unsigned long schizo_imap_offset(unsigned long ino)
643 {
644         return SCHIZO_IMAP_BASE + (ino * 8UL);
645 }
646
647 static unsigned long schizo_iclr_offset(unsigned long ino)
648 {
649         return SCHIZO_ICLR_BASE + (ino * 8UL);
650 }
651
652 static unsigned long schizo_ino_to_iclr(unsigned long pbm_regs,
653                                         unsigned int ino)
654 {
655         return pbm_regs + schizo_iclr_offset(ino) + 4;
656 }
657
658 static unsigned long schizo_ino_to_imap(unsigned long pbm_regs,
659                                         unsigned int ino)
660 {
661         return pbm_regs + schizo_imap_offset(ino) + 4;
662 }
663
664 #define schizo_read(__reg) \
665 ({      u64 __ret; \
666         __asm__ __volatile__("ldxa [%1] %2, %0" \
667                              : "=r" (__ret) \
668                              : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
669                              : "memory"); \
670         __ret; \
671 })
672 #define schizo_write(__reg, __val) \
673         __asm__ __volatile__("stxa %0, [%1] %2" \
674                              : /* no outputs */ \
675                              : "r" (__val), "r" (__reg), \
676                                "i" (ASI_PHYS_BYPASS_EC_E) \
677                              : "memory")
678
679 static void tomatillo_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
680 {
681         unsigned long sync_reg = (unsigned long) _arg2;
682         u64 mask = 1UL << (ino & IMAP_INO);
683         u64 val;
684         int limit;
685
686         schizo_write(sync_reg, mask);
687
688         limit = 100000;
689         val = 0;
690         while (--limit) {
691                 val = schizo_read(sync_reg);
692                 if (!(val & mask))
693                         break;
694         }
695         if (limit <= 0) {
696                 printk("tomatillo_wsync_handler: DMA won't sync [%lx:%lx]\n",
697                        val, mask);
698         }
699
700         if (_arg1) {
701                 static unsigned char cacheline[64]
702                         __attribute__ ((aligned (64)));
703
704                 __asm__ __volatile__("rd %%fprs, %0\n\t"
705                                      "or %0, %4, %1\n\t"
706                                      "wr %1, 0x0, %%fprs\n\t"
707                                      "stda %%f0, [%5] %6\n\t"
708                                      "wr %0, 0x0, %%fprs\n\t"
709                                      "membar #Sync"
710                                      : "=&r" (mask), "=&r" (val)
711                                      : "0" (mask), "1" (val),
712                                      "i" (FPRS_FEF), "r" (&cacheline[0]),
713                                      "i" (ASI_BLK_COMMIT_P));
714         }
715 }
716
717 struct schizo_irq_data {
718         unsigned long pbm_regs;
719         unsigned long sync_reg;
720         u32 portid;
721         int chip_version;
722 };
723
724 static unsigned int schizo_irq_build(struct device_node *dp,
725                                      unsigned int ino,
726                                      void *_data)
727 {
728         struct schizo_irq_data *irq_data = _data;
729         unsigned long pbm_regs = irq_data->pbm_regs;
730         unsigned long imap, iclr;
731         int ign_fixup;
732         int virt_irq;
733         int is_tomatillo;
734
735         ino &= 0x3f;
736
737         /* Now build the IRQ bucket. */
738         imap = schizo_ino_to_imap(pbm_regs, ino);
739         iclr = schizo_ino_to_iclr(pbm_regs, ino);
740
741         /* On Schizo, no inofixup occurs.  This is because each
742          * INO has it's own IMAP register.  On Psycho and Sabre
743          * there is only one IMAP register for each PCI slot even
744          * though four different INOs can be generated by each
745          * PCI slot.
746          *
747          * But, for JBUS variants (essentially, Tomatillo), we have
748          * to fixup the lowest bit of the interrupt group number.
749          */
750         ign_fixup = 0;
751
752         is_tomatillo = (irq_data->sync_reg != 0UL);
753
754         if (is_tomatillo) {
755                 if (irq_data->portid & 1)
756                         ign_fixup = (1 << 6);
757         }
758
759         virt_irq = build_irq(ign_fixup, iclr, imap);
760
761         if (is_tomatillo) {
762                 irq_install_pre_handler(virt_irq,
763                                         tomatillo_wsync_handler,
764                                         ((irq_data->chip_version <= 4) ?
765                                          (void *) 1 : (void *) 0),
766                                         (void *) irq_data->sync_reg);
767         }
768
769         return virt_irq;
770 }
771
772 static void schizo_irq_trans_init(struct device_node *dp)
773 {
774         struct linux_prom64_registers *regs;
775         struct schizo_irq_data *irq_data;
776
777         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
778         dp->irq_trans->irq_build = schizo_irq_build;
779
780         irq_data = prom_early_alloc(sizeof(struct schizo_irq_data));
781
782         regs = of_get_property(dp, "reg", NULL);
783         dp->irq_trans->data = irq_data;
784
785         irq_data->pbm_regs = regs[0].phys_addr;
786         irq_data->sync_reg = regs[3].phys_addr + 0x1a18UL;
787         irq_data->portid = of_getintprop_default(dp, "portid", 0);
788         irq_data->chip_version = of_getintprop_default(dp, "version#", 0);
789 }
790
791 static unsigned int pci_sun4v_irq_build(struct device_node *dp,
792                                         unsigned int devino,
793                                         void *_data)
794 {
795         u32 devhandle = (u32) (unsigned long) _data;
796
797         return sun4v_build_irq(devhandle, devino);
798 }
799
800 static void pci_sun4v_irq_trans_init(struct device_node *dp)
801 {
802         struct linux_prom64_registers *regs;
803
804         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
805         dp->irq_trans->irq_build = pci_sun4v_irq_build;
806
807         regs = of_get_property(dp, "reg", NULL);
808         dp->irq_trans->data = (void *) (unsigned long)
809                 ((regs->phys_addr >> 32UL) & 0x0fffffff);
810 }
811 #endif /* CONFIG_PCI */
812
813 #ifdef CONFIG_SBUS
814 /* INO number to IMAP register offset for SYSIO external IRQ's.
815  * This should conform to both Sunfire/Wildfire server and Fusion
816  * desktop designs.
817  */
818 #define SYSIO_IMAP_SLOT0        0x2c04UL
819 #define SYSIO_IMAP_SLOT1        0x2c0cUL
820 #define SYSIO_IMAP_SLOT2        0x2c14UL
821 #define SYSIO_IMAP_SLOT3        0x2c1cUL
822 #define SYSIO_IMAP_SCSI         0x3004UL
823 #define SYSIO_IMAP_ETH          0x300cUL
824 #define SYSIO_IMAP_BPP          0x3014UL
825 #define SYSIO_IMAP_AUDIO        0x301cUL
826 #define SYSIO_IMAP_PFAIL        0x3024UL
827 #define SYSIO_IMAP_KMS          0x302cUL
828 #define SYSIO_IMAP_FLPY         0x3034UL
829 #define SYSIO_IMAP_SHW          0x303cUL
830 #define SYSIO_IMAP_KBD          0x3044UL
831 #define SYSIO_IMAP_MS           0x304cUL
832 #define SYSIO_IMAP_SER          0x3054UL
833 #define SYSIO_IMAP_TIM0         0x3064UL
834 #define SYSIO_IMAP_TIM1         0x306cUL
835 #define SYSIO_IMAP_UE           0x3074UL
836 #define SYSIO_IMAP_CE           0x307cUL
837 #define SYSIO_IMAP_SBERR        0x3084UL
838 #define SYSIO_IMAP_PMGMT        0x308cUL
839 #define SYSIO_IMAP_GFX          0x3094UL
840 #define SYSIO_IMAP_EUPA         0x309cUL
841
842 #define bogon     ((unsigned long) -1)
843 static unsigned long sysio_irq_offsets[] = {
844         /* SBUS Slot 0 --> 3, level 1 --> 7 */
845         SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0,
846         SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0,
847         SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1,
848         SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1,
849         SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2,
850         SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2,
851         SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3,
852         SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3,
853
854         /* Onboard devices (not relevant/used on SunFire). */
855         SYSIO_IMAP_SCSI,
856         SYSIO_IMAP_ETH,
857         SYSIO_IMAP_BPP,
858         bogon,
859         SYSIO_IMAP_AUDIO,
860         SYSIO_IMAP_PFAIL,
861         bogon,
862         bogon,
863         SYSIO_IMAP_KMS,
864         SYSIO_IMAP_FLPY,
865         SYSIO_IMAP_SHW,
866         SYSIO_IMAP_KBD,
867         SYSIO_IMAP_MS,
868         SYSIO_IMAP_SER,
869         bogon,
870         bogon,
871         SYSIO_IMAP_TIM0,
872         SYSIO_IMAP_TIM1,
873         bogon,
874         bogon,
875         SYSIO_IMAP_UE,
876         SYSIO_IMAP_CE,
877         SYSIO_IMAP_SBERR,
878         SYSIO_IMAP_PMGMT,
879 };
880
881 #undef bogon
882
883 #define NUM_SYSIO_OFFSETS ARRAY_SIZE(sysio_irq_offsets)
884
885 /* Convert Interrupt Mapping register pointer to associated
886  * Interrupt Clear register pointer, SYSIO specific version.
887  */
888 #define SYSIO_ICLR_UNUSED0      0x3400UL
889 #define SYSIO_ICLR_SLOT0        0x340cUL
890 #define SYSIO_ICLR_SLOT1        0x344cUL
891 #define SYSIO_ICLR_SLOT2        0x348cUL
892 #define SYSIO_ICLR_SLOT3        0x34ccUL
893 static unsigned long sysio_imap_to_iclr(unsigned long imap)
894 {
895         unsigned long diff = SYSIO_ICLR_UNUSED0 - SYSIO_IMAP_SLOT0;
896         return imap + diff;
897 }
898
899 static unsigned int sbus_of_build_irq(struct device_node *dp,
900                                       unsigned int ino,
901                                       void *_data)
902 {
903         unsigned long reg_base = (unsigned long) _data;
904         struct linux_prom_registers *regs;
905         unsigned long imap, iclr;
906         int sbus_slot = 0;
907         int sbus_level = 0;
908
909         ino &= 0x3f;
910
911         regs = of_get_property(dp, "reg", NULL);
912         if (regs)
913                 sbus_slot = regs->which_io;
914
915         if (ino < 0x20)
916                 ino += (sbus_slot * 8);
917
918         imap = sysio_irq_offsets[ino];
919         if (imap == ((unsigned long)-1)) {
920                 prom_printf("get_irq_translations: Bad SYSIO INO[%x]\n",
921                             ino);
922                 prom_halt();
923         }
924         imap += reg_base;
925
926         /* SYSIO inconsistency.  For external SLOTS, we have to select
927          * the right ICLR register based upon the lower SBUS irq level
928          * bits.
929          */
930         if (ino >= 0x20) {
931                 iclr = sysio_imap_to_iclr(imap);
932         } else {
933                 sbus_level = ino & 0x7;
934
935                 switch(sbus_slot) {
936                 case 0:
937                         iclr = reg_base + SYSIO_ICLR_SLOT0;
938                         break;
939                 case 1:
940                         iclr = reg_base + SYSIO_ICLR_SLOT1;
941                         break;
942                 case 2:
943                         iclr = reg_base + SYSIO_ICLR_SLOT2;
944                         break;
945                 default:
946                 case 3:
947                         iclr = reg_base + SYSIO_ICLR_SLOT3;
948                         break;
949                 };
950
951                 iclr += ((unsigned long)sbus_level - 1UL) * 8UL;
952         }
953         return build_irq(sbus_level, iclr, imap);
954 }
955
956 static void sbus_irq_trans_init(struct device_node *dp)
957 {
958         struct linux_prom64_registers *regs;
959
960         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
961         dp->irq_trans->irq_build = sbus_of_build_irq;
962
963         regs = of_get_property(dp, "reg", NULL);
964         dp->irq_trans->data = (void *) (unsigned long) regs->phys_addr;
965 }
966 #endif /* CONFIG_SBUS */
967
968
969 static unsigned int central_build_irq(struct device_node *dp,
970                                       unsigned int ino,
971                                       void *_data)
972 {
973         struct device_node *central_dp = _data;
974         struct of_device *central_op = of_find_device_by_node(central_dp);
975         struct resource *res;
976         unsigned long imap, iclr;
977         u32 tmp;
978
979         if (!strcmp(dp->name, "eeprom")) {
980                 res = &central_op->resource[5];
981         } else if (!strcmp(dp->name, "zs")) {
982                 res = &central_op->resource[4];
983         } else if (!strcmp(dp->name, "clock-board")) {
984                 res = &central_op->resource[3];
985         } else {
986                 return ino;
987         }
988
989         imap = res->start + 0x00UL;
990         iclr = res->start + 0x10UL;
991
992         /* Set the INO state to idle, and disable.  */
993         upa_writel(0, iclr);
994         upa_readl(iclr);
995
996         tmp = upa_readl(imap);
997         tmp &= ~0x80000000;
998         upa_writel(tmp, imap);
999
1000         return build_irq(0, iclr, imap);
1001 }
1002
1003 static void central_irq_trans_init(struct device_node *dp)
1004 {
1005         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
1006         dp->irq_trans->irq_build = central_build_irq;
1007
1008         dp->irq_trans->data = dp;
1009 }
1010
1011 struct irq_trans {
1012         const char *name;
1013         void (*init)(struct device_node *);
1014 };
1015
1016 #ifdef CONFIG_PCI
1017 static struct irq_trans pci_irq_trans_table[] = {
1018         { "SUNW,sabre", sabre_irq_trans_init },
1019         { "pci108e,a000", sabre_irq_trans_init },
1020         { "pci108e,a001", sabre_irq_trans_init },
1021         { "SUNW,psycho", psycho_irq_trans_init },
1022         { "pci108e,8000", psycho_irq_trans_init },
1023         { "SUNW,schizo", schizo_irq_trans_init },
1024         { "pci108e,8001", schizo_irq_trans_init },
1025         { "SUNW,schizo+", schizo_irq_trans_init },
1026         { "pci108e,8002", schizo_irq_trans_init },
1027         { "SUNW,tomatillo", schizo_irq_trans_init },
1028         { "pci108e,a801", schizo_irq_trans_init },
1029         { "SUNW,sun4v-pci", pci_sun4v_irq_trans_init },
1030 };
1031 #endif
1032
1033 static unsigned int sun4v_vdev_irq_build(struct device_node *dp,
1034                                          unsigned int devino,
1035                                          void *_data)
1036 {
1037         u32 devhandle = (u32) (unsigned long) _data;
1038
1039         return sun4v_build_irq(devhandle, devino);
1040 }
1041
1042 static void sun4v_vdev_irq_trans_init(struct device_node *dp)
1043 {
1044         struct linux_prom64_registers *regs;
1045
1046         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
1047         dp->irq_trans->irq_build = sun4v_vdev_irq_build;
1048
1049         regs = of_get_property(dp, "reg", NULL);
1050         dp->irq_trans->data = (void *) (unsigned long)
1051                 ((regs->phys_addr >> 32UL) & 0x0fffffff);
1052 }
1053
1054 static void irq_trans_init(struct device_node *dp)
1055 {
1056         const char *model;
1057 #ifdef CONFIG_PCI
1058         int i;
1059 #endif
1060
1061         model = of_get_property(dp, "model", NULL);
1062         if (!model)
1063                 model = of_get_property(dp, "compatible", NULL);
1064         if (!model)
1065                 return;
1066
1067 #ifdef CONFIG_PCI
1068         for (i = 0; i < ARRAY_SIZE(pci_irq_trans_table); i++) {
1069                 struct irq_trans *t = &pci_irq_trans_table[i];
1070
1071                 if (!strcmp(model, t->name))
1072                         return t->init(dp);
1073         }
1074 #endif
1075 #ifdef CONFIG_SBUS
1076         if (!strcmp(dp->name, "sbus") ||
1077             !strcmp(dp->name, "sbi"))
1078                 return sbus_irq_trans_init(dp);
1079 #endif
1080         if (!strcmp(dp->name, "central"))
1081                 return central_irq_trans_init(dp->child);
1082         if (!strcmp(dp->name, "virtual-devices"))
1083                 return sun4v_vdev_irq_trans_init(dp);
1084 }
1085
1086 static int is_root_node(const struct device_node *dp)
1087 {
1088         if (!dp)
1089                 return 0;
1090
1091         return (dp->parent == NULL);
1092 }
1093
1094 /* The following routines deal with the black magic of fully naming a
1095  * node.
1096  *
1097  * Certain well known named nodes are just the simple name string.
1098  *
1099  * Actual devices have an address specifier appended to the base name
1100  * string, like this "foo@addr".  The "addr" can be in any number of
1101  * formats, and the platform plus the type of the node determine the
1102  * format and how it is constructed.
1103  *
1104  * For children of the ROOT node, the naming convention is fixed and
1105  * determined by whether this is a sun4u or sun4v system.
1106  *
1107  * For children of other nodes, it is bus type specific.  So
1108  * we walk up the tree until we discover a "device_type" property
1109  * we recognize and we go from there.
1110  *
1111  * As an example, the boot device on my workstation has a full path:
1112  *
1113  *      /pci@1e,600000/ide@d/disk@0,0:c
1114  */
1115 static void __init sun4v_path_component(struct device_node *dp, char *tmp_buf)
1116 {
1117         struct linux_prom64_registers *regs;
1118         struct property *rprop;
1119         u32 high_bits, low_bits, type;
1120
1121         rprop = of_find_property(dp, "reg", NULL);
1122         if (!rprop)
1123                 return;
1124
1125         regs = rprop->value;
1126         if (!is_root_node(dp->parent)) {
1127                 sprintf(tmp_buf, "%s@%x,%x",
1128                         dp->name,
1129                         (unsigned int) (regs->phys_addr >> 32UL),
1130                         (unsigned int) (regs->phys_addr & 0xffffffffUL));
1131                 return;
1132         }
1133
1134         type = regs->phys_addr >> 60UL;
1135         high_bits = (regs->phys_addr >> 32UL) & 0x0fffffffUL;
1136         low_bits = (regs->phys_addr & 0xffffffffUL);
1137
1138         if (type == 0 || type == 8) {
1139                 const char *prefix = (type == 0) ? "m" : "i";
1140
1141                 if (low_bits)
1142                         sprintf(tmp_buf, "%s@%s%x,%x",
1143                                 dp->name, prefix,
1144                                 high_bits, low_bits);
1145                 else
1146                         sprintf(tmp_buf, "%s@%s%x",
1147                                 dp->name,
1148                                 prefix,
1149                                 high_bits);
1150         } else if (type == 12) {
1151                 sprintf(tmp_buf, "%s@%x",
1152                         dp->name, high_bits);
1153         }
1154 }
1155
1156 static void __init sun4u_path_component(struct device_node *dp, char *tmp_buf)
1157 {
1158         struct linux_prom64_registers *regs;
1159         struct property *prop;
1160
1161         prop = of_find_property(dp, "reg", NULL);
1162         if (!prop)
1163                 return;
1164
1165         regs = prop->value;
1166         if (!is_root_node(dp->parent)) {
1167                 sprintf(tmp_buf, "%s@%x,%x",
1168                         dp->name,
1169                         (unsigned int) (regs->phys_addr >> 32UL),
1170                         (unsigned int) (regs->phys_addr & 0xffffffffUL));
1171                 return;
1172         }
1173
1174         prop = of_find_property(dp, "upa-portid", NULL);
1175         if (!prop)
1176                 prop = of_find_property(dp, "portid", NULL);
1177         if (prop) {
1178                 unsigned long mask = 0xffffffffUL;
1179
1180                 if (tlb_type >= cheetah)
1181                         mask = 0x7fffff;
1182
1183                 sprintf(tmp_buf, "%s@%x,%x",
1184                         dp->name,
1185                         *(u32 *)prop->value,
1186                         (unsigned int) (regs->phys_addr & mask));
1187         }
1188 }
1189
1190 /* "name@slot,offset"  */
1191 static void __init sbus_path_component(struct device_node *dp, char *tmp_buf)
1192 {
1193         struct linux_prom_registers *regs;
1194         struct property *prop;
1195
1196         prop = of_find_property(dp, "reg", NULL);
1197         if (!prop)
1198                 return;
1199
1200         regs = prop->value;
1201         sprintf(tmp_buf, "%s@%x,%x",
1202                 dp->name,
1203                 regs->which_io,
1204                 regs->phys_addr);
1205 }
1206
1207 /* "name@devnum[,func]" */
1208 static void __init pci_path_component(struct device_node *dp, char *tmp_buf)
1209 {
1210         struct linux_prom_pci_registers *regs;
1211         struct property *prop;
1212         unsigned int devfn;
1213
1214         prop = of_find_property(dp, "reg", NULL);
1215         if (!prop)
1216                 return;
1217
1218         regs = prop->value;
1219         devfn = (regs->phys_hi >> 8) & 0xff;
1220         if (devfn & 0x07) {
1221                 sprintf(tmp_buf, "%s@%x,%x",
1222                         dp->name,
1223                         devfn >> 3,
1224                         devfn & 0x07);
1225         } else {
1226                 sprintf(tmp_buf, "%s@%x",
1227                         dp->name,
1228                         devfn >> 3);
1229         }
1230 }
1231
1232 /* "name@UPA_PORTID,offset" */
1233 static void __init upa_path_component(struct device_node *dp, char *tmp_buf)
1234 {
1235         struct linux_prom64_registers *regs;
1236         struct property *prop;
1237
1238         prop = of_find_property(dp, "reg", NULL);
1239         if (!prop)
1240                 return;
1241
1242         regs = prop->value;
1243
1244         prop = of_find_property(dp, "upa-portid", NULL);
1245         if (!prop)
1246                 return;
1247
1248         sprintf(tmp_buf, "%s@%x,%x",
1249                 dp->name,
1250                 *(u32 *) prop->value,
1251                 (unsigned int) (regs->phys_addr & 0xffffffffUL));
1252 }
1253
1254 /* "name@reg" */
1255 static void __init vdev_path_component(struct device_node *dp, char *tmp_buf)
1256 {
1257         struct property *prop;
1258         u32 *regs;
1259
1260         prop = of_find_property(dp, "reg", NULL);
1261         if (!prop)
1262                 return;
1263
1264         regs = prop->value;
1265
1266         sprintf(tmp_buf, "%s@%x", dp->name, *regs);
1267 }
1268
1269 /* "name@addrhi,addrlo" */
1270 static void __init ebus_path_component(struct device_node *dp, char *tmp_buf)
1271 {
1272         struct linux_prom64_registers *regs;
1273         struct property *prop;
1274
1275         prop = of_find_property(dp, "reg", NULL);
1276         if (!prop)
1277                 return;
1278
1279         regs = prop->value;
1280
1281         sprintf(tmp_buf, "%s@%x,%x",
1282                 dp->name,
1283                 (unsigned int) (regs->phys_addr >> 32UL),
1284                 (unsigned int) (regs->phys_addr & 0xffffffffUL));
1285 }
1286
1287 /* "name@bus,addr" */
1288 static void __init i2c_path_component(struct device_node *dp, char *tmp_buf)
1289 {
1290         struct property *prop;
1291         u32 *regs;
1292
1293         prop = of_find_property(dp, "reg", NULL);
1294         if (!prop)
1295                 return;
1296
1297         regs = prop->value;
1298
1299         /* This actually isn't right... should look at the #address-cells
1300          * property of the i2c bus node etc. etc.
1301          */
1302         sprintf(tmp_buf, "%s@%x,%x",
1303                 dp->name, regs[0], regs[1]);
1304 }
1305
1306 /* "name@reg0[,reg1]" */
1307 static void __init usb_path_component(struct device_node *dp, char *tmp_buf)
1308 {
1309         struct property *prop;
1310         u32 *regs;
1311
1312         prop = of_find_property(dp, "reg", NULL);
1313         if (!prop)
1314                 return;
1315
1316         regs = prop->value;
1317
1318         if (prop->length == sizeof(u32) || regs[1] == 1) {
1319                 sprintf(tmp_buf, "%s@%x",
1320                         dp->name, regs[0]);
1321         } else {
1322                 sprintf(tmp_buf, "%s@%x,%x",
1323                         dp->name, regs[0], regs[1]);
1324         }
1325 }
1326
1327 /* "name@reg0reg1[,reg2reg3]" */
1328 static void __init ieee1394_path_component(struct device_node *dp, char *tmp_buf)
1329 {
1330         struct property *prop;
1331         u32 *regs;
1332
1333         prop = of_find_property(dp, "reg", NULL);
1334         if (!prop)
1335                 return;
1336
1337         regs = prop->value;
1338
1339         if (regs[2] || regs[3]) {
1340                 sprintf(tmp_buf, "%s@%08x%08x,%04x%08x",
1341                         dp->name, regs[0], regs[1], regs[2], regs[3]);
1342         } else {
1343                 sprintf(tmp_buf, "%s@%08x%08x",
1344                         dp->name, regs[0], regs[1]);
1345         }
1346 }
1347
1348 static void __init __build_path_component(struct device_node *dp, char *tmp_buf)
1349 {
1350         struct device_node *parent = dp->parent;
1351
1352         if (parent != NULL) {
1353                 if (!strcmp(parent->type, "pci") ||
1354                     !strcmp(parent->type, "pciex"))
1355                         return pci_path_component(dp, tmp_buf);
1356                 if (!strcmp(parent->type, "sbus"))
1357                         return sbus_path_component(dp, tmp_buf);
1358                 if (!strcmp(parent->type, "upa"))
1359                         return upa_path_component(dp, tmp_buf);
1360                 if (!strcmp(parent->type, "ebus"))
1361                         return ebus_path_component(dp, tmp_buf);
1362                 if (!strcmp(parent->name, "usb") ||
1363                     !strcmp(parent->name, "hub"))
1364                         return usb_path_component(dp, tmp_buf);
1365                 if (!strcmp(parent->type, "i2c"))
1366                         return i2c_path_component(dp, tmp_buf);
1367                 if (!strcmp(parent->type, "firewire"))
1368                         return ieee1394_path_component(dp, tmp_buf);
1369                 if (!strcmp(parent->type, "virtual-devices"))
1370                         return vdev_path_component(dp, tmp_buf);
1371
1372                 /* "isa" is handled with platform naming */
1373         }
1374
1375         /* Use platform naming convention.  */
1376         if (tlb_type == hypervisor)
1377                 return sun4v_path_component(dp, tmp_buf);
1378         else
1379                 return sun4u_path_component(dp, tmp_buf);
1380 }
1381
1382 static char * __init build_path_component(struct device_node *dp)
1383 {
1384         char tmp_buf[64], *n;
1385
1386         tmp_buf[0] = '\0';
1387         __build_path_component(dp, tmp_buf);
1388         if (tmp_buf[0] == '\0')
1389                 strcpy(tmp_buf, dp->name);
1390
1391         n = prom_early_alloc(strlen(tmp_buf) + 1);
1392         strcpy(n, tmp_buf);
1393
1394         return n;
1395 }
1396
1397 static char * __init build_full_name(struct device_node *dp)
1398 {
1399         int len, ourlen, plen;
1400         char *n;
1401
1402         plen = strlen(dp->parent->full_name);
1403         ourlen = strlen(dp->path_component_name);
1404         len = ourlen + plen + 2;
1405
1406         n = prom_early_alloc(len);
1407         strcpy(n, dp->parent->full_name);
1408         if (!is_root_node(dp->parent)) {
1409                 strcpy(n + plen, "/");
1410                 plen++;
1411         }
1412         strcpy(n + plen, dp->path_component_name);
1413
1414         return n;
1415 }
1416
1417 static unsigned int unique_id;
1418
1419 static struct property * __init build_one_prop(phandle node, char *prev, char *special_name, void *special_val, int special_len)
1420 {
1421         static struct property *tmp = NULL;
1422         struct property *p;
1423
1424         if (tmp) {
1425                 p = tmp;
1426                 memset(p, 0, sizeof(*p) + 32);
1427                 tmp = NULL;
1428         } else {
1429                 p = prom_early_alloc(sizeof(struct property) + 32);
1430                 p->unique_id = unique_id++;
1431         }
1432
1433         p->name = (char *) (p + 1);
1434         if (special_name) {
1435                 strcpy(p->name, special_name);
1436                 p->length = special_len;
1437                 p->value = prom_early_alloc(special_len);
1438                 memcpy(p->value, special_val, special_len);
1439         } else {
1440                 if (prev == NULL) {
1441                         prom_firstprop(node, p->name);
1442                 } else {
1443                         prom_nextprop(node, prev, p->name);
1444                 }
1445                 if (strlen(p->name) == 0) {
1446                         tmp = p;
1447                         return NULL;
1448                 }
1449                 p->length = prom_getproplen(node, p->name);
1450                 if (p->length <= 0) {
1451                         p->length = 0;
1452                 } else {
1453                         p->value = prom_early_alloc(p->length + 1);
1454                         prom_getproperty(node, p->name, p->value, p->length);
1455                         ((unsigned char *)p->value)[p->length] = '\0';
1456                 }
1457         }
1458         return p;
1459 }
1460
1461 static struct property * __init build_prop_list(phandle node)
1462 {
1463         struct property *head, *tail;
1464
1465         head = tail = build_one_prop(node, NULL,
1466                                      ".node", &node, sizeof(node));
1467
1468         tail->next = build_one_prop(node, NULL, NULL, NULL, 0);
1469         tail = tail->next;
1470         while(tail) {
1471                 tail->next = build_one_prop(node, tail->name,
1472                                             NULL, NULL, 0);
1473                 tail = tail->next;
1474         }
1475
1476         return head;
1477 }
1478
1479 static char * __init get_one_property(phandle node, const char *name)
1480 {
1481         char *buf = "<NULL>";
1482         int len;
1483
1484         len = prom_getproplen(node, name);
1485         if (len > 0) {
1486                 buf = prom_early_alloc(len);
1487                 prom_getproperty(node, name, buf, len);
1488         }
1489
1490         return buf;
1491 }
1492
1493 static struct device_node * __init create_node(phandle node)
1494 {
1495         struct device_node *dp;
1496
1497         if (!node)
1498                 return NULL;
1499
1500         dp = prom_early_alloc(sizeof(*dp));
1501         dp->unique_id = unique_id++;
1502
1503         kref_init(&dp->kref);
1504
1505         dp->name = get_one_property(node, "name");
1506         dp->type = get_one_property(node, "device_type");
1507         dp->node = node;
1508
1509         dp->properties = build_prop_list(node);
1510
1511         irq_trans_init(dp);
1512
1513         return dp;
1514 }
1515
1516 static struct device_node * __init build_tree(struct device_node *parent, phandle node, struct device_node ***nextp)
1517 {
1518         struct device_node *dp;
1519
1520         dp = create_node(node);
1521         if (dp) {
1522                 *(*nextp) = dp;
1523                 *nextp = &dp->allnext;
1524
1525                 dp->parent = parent;
1526                 dp->path_component_name = build_path_component(dp);
1527                 dp->full_name = build_full_name(dp);
1528
1529                 dp->child = build_tree(dp, prom_getchild(node), nextp);
1530
1531                 dp->sibling = build_tree(parent, prom_getsibling(node), nextp);
1532         }
1533
1534         return dp;
1535 }
1536
1537 void __init prom_build_devicetree(void)
1538 {
1539         struct device_node **nextp;
1540
1541         allnodes = create_node(prom_root_node);
1542         allnodes->path_component_name = "";
1543         allnodes->full_name = "/";
1544
1545         nextp = &allnodes->allnext;
1546         allnodes->child = build_tree(allnodes,
1547                                      prom_getchild(allnodes->node),
1548                                      &nextp);
1549         printk("PROM: Built device tree with %u bytes of memory.\n",
1550                prom_early_allocated);
1551 }