1 /* arch/sparc/kernel/entry.S: Sparc trap low-level entry points.
3 * Copyright (C) 1995, 2007 David S. Miller (davem@davemloft.net)
4 * Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be)
5 * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx)
6 * Copyright (C) 1996-1999 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
7 * Copyright (C) 1997 Anton Blanchard (anton@progsoc.uts.edu.au)
10 #include <linux/errno.h>
15 #include <asm/contregs.h>
16 #include <asm/ptrace.h>
17 #include <asm/asm-offsets.h>
19 #include <asm/vaddrs.h>
21 #include <asm/pgtable.h>
22 #include <asm/winmacro.h>
23 #include <asm/signal.h>
26 #include <asm/thread_info.h>
27 #include <asm/param.h>
28 #include <asm/unistd.h>
30 #include <asm/asmmacro.h>
34 /* These are just handy. */
35 #define _SV save %sp, -STACKFRAME_SZ, %sp
38 #define FLUSH_ALL_KERNEL_WINDOWS \
39 _SV; _SV; _SV; _SV; _SV; _SV; _SV; \
40 _RS; _RS; _RS; _RS; _RS; _RS; _RS;
46 .globl arch_kgdb_breakpoint
47 .type arch_kgdb_breakpoint,#function
52 .size arch_kgdb_breakpoint,.-arch_kgdb_breakpoint
55 #if defined(CONFIG_BLK_DEV_FD) || defined(CONFIG_BLK_DEV_FD_MODULE)
60 * This code cannot touch registers %l0 %l1 and %l2
61 * because SAVE_ALL depends on their values. It depends
62 * on %l3 also, but we regenerate it before a call.
63 * Other registers are:
64 * %l3 -- base address of fdc registers
66 * %l5 -- scratch for ld/st address
68 * %l7 -- scratch [floppy byte, ld/st address, aux. data]
71 /* Do we have work to do? */
72 sethi %hi(doing_pdma), %l7
73 ld [%l7 + %lo(doing_pdma)], %l7
78 /* Load fdc register base */
79 sethi %hi(fdc_status), %l3
80 ld [%l3 + %lo(fdc_status)], %l3
82 /* Setup register addresses */
83 sethi %hi(pdma_vaddr), %l5 ! transfer buffer
84 ld [%l5 + %lo(pdma_vaddr)], %l4
85 sethi %hi(pdma_size), %l5 ! bytes to go
86 ld [%l5 + %lo(pdma_size)], %l6
90 andcc %l7, 0x80, %g0 ! Does fifo still have data
91 bz floppy_fifo_emptied ! fifo has been emptied...
92 andcc %l7, 0x20, %g0 ! in non-dma mode still?
93 bz floppy_overrun ! nope, overrun
94 andcc %l7, 0x40, %g0 ! 0=write 1=read
98 /* Ok, actually read this byte */
109 /* Ok, actually write this byte */
116 /* fall through... */
118 sethi %hi(pdma_vaddr), %l5
119 st %l4, [%l5 + %lo(pdma_vaddr)]
120 sethi %hi(pdma_size), %l5
121 st %l6, [%l5 + %lo(pdma_size)]
122 /* Flip terminal count pin */
123 set auxio_register, %l7
126 set sparc_cpu_model, %l5
128 subcc %l5, 1, %g0 /* enum { sun4c = 1 }; */
144 /* Kill some time so the bits set */
150 /* Prevent recursion */
151 sethi %hi(doing_pdma), %l7
153 st %g0, [%l7 + %lo(doing_pdma)]
155 /* We emptied the FIFO, but we haven't read everything
156 * as of yet. Store the current transfer address and
157 * bytes left to read so we can continue when the next
161 sethi %hi(pdma_vaddr), %l5
162 st %l4, [%l5 + %lo(pdma_vaddr)]
163 sethi %hi(pdma_size), %l7
164 st %l6, [%l7 + %lo(pdma_size)]
166 /* Restore condition codes */
174 sethi %hi(pdma_vaddr), %l5
175 st %l4, [%l5 + %lo(pdma_vaddr)]
176 sethi %hi(pdma_size), %l5
177 st %l6, [%l5 + %lo(pdma_size)]
178 /* Prevent recursion */
179 sethi %hi(doing_pdma), %l7
180 st %g0, [%l7 + %lo(doing_pdma)]
182 /* fall through... */
187 /* Set all IRQs off. */
194 mov 11, %o0 ! floppy irq level (unused anyway)
195 mov %g0, %o1 ! devid is not used in fast interrupts
196 call sparc_floppy_irq
197 add %sp, STACKFRAME_SZ, %o2 ! struct pt_regs *regs
201 #endif /* (CONFIG_BLK_DEV_FD) */
203 /* Bad trap handler */
204 .globl bad_trap_handler
211 add %sp, STACKFRAME_SZ, %o0 ! pt_regs
213 mov %l7, %o1 ! trap number
217 /* For now all IRQ's not registered get sent here. handler_irq() will
218 * see if a routine is registered to handle this interrupt and if not
219 * it will say so on the console.
223 .globl real_irq_entry, patch_handler_irq
228 .globl patchme_maybe_smp_msg
231 patchme_maybe_smp_msg:
242 mov %l7, %o0 ! irq level
245 add %sp, STACKFRAME_SZ, %o1 ! pt_regs ptr
246 or %l0, PSR_PIL, %g2 ! restore PIL after handler_irq
247 wr %g2, PSR_ET, %psr ! keep ET up
253 /* SMP per-cpu ticker interrupts are handled specially. */
255 bne real_irq_continue+4
261 call smp4m_percpu_timer_interrupt
262 add %sp, STACKFRAME_SZ, %o0
267 /* Here is where we check for possible SMP IPI passed to us
268 * on some level other than 15 which is the NMI and only used
269 * for cross calls. That has a separate entry point below.
271 * IPIs are sent on Level 12, 13 and 14. See IRQ_IPI_*.
274 GET_PROCESSOR4M_ID(o3)
275 sethi %hi(sun4m_irq_percpu), %l5
277 or %l5, %lo(sun4m_irq_percpu), %o5
278 sethi %hi(0x70000000), %o2 ! Check all soft-IRQs
280 ld [%o1 + 0x00], %o3 ! sun4m_irq_percpu[cpu]->pending
285 st %o2, [%o1 + 0x04] ! sun4m_irq_percpu[cpu]->clear=0x70000000
287 ld [%o1 + 0x00], %g0 ! sun4m_irq_percpu[cpu]->pending
294 srl %o3, 28, %o2 ! shift for simpler checks below
295 maybe_smp4m_msg_check_single:
297 beq,a maybe_smp4m_msg_check_mask
299 call smp_call_function_single_interrupt
302 maybe_smp4m_msg_check_mask:
303 beq,a maybe_smp4m_msg_check_resched
305 call smp_call_function_interrupt
308 maybe_smp4m_msg_check_resched:
309 /* rescheduling is done in RESTORE_ALL regardless, but incr stats */
310 beq,a maybe_smp4m_msg_out
312 call smp_resched_interrupt
318 .globl linux_trap_ipi15
321 sethi %hi(0x80000000), %o2
322 GET_PROCESSOR4M_ID(o0)
323 sethi %hi(sun4m_irq_percpu), %l5
324 or %l5, %lo(sun4m_irq_percpu), %o5
327 ld [%o5 + 0x00], %o3 ! sun4m_irq_percpu[cpu]->pending
329 be 1f ! Must be an NMI async memory error
330 st %o2, [%o5 + 0x04] ! sun4m_irq_percpu[cpu]->clear=0x80000000
332 ld [%o5 + 0x00], %g0 ! sun4m_irq_percpu[cpu]->pending
339 call smp4m_cross_call_irq
341 b ret_trap_lockless_ipi
344 /* NMI async memory error handling. */
345 sethi %hi(0x80000000), %l4
346 sethi %hi(sun4m_irq_global), %o5
347 ld [%o5 + %lo(sun4m_irq_global)], %l5
348 st %l4, [%l5 + 0x0c] ! sun4m_irq_global->mask_set=0x80000000
350 ld [%l5 + 0x00], %g0 ! sun4m_irq_global->pending
359 st %l4, [%l5 + 0x08] ! sun4m_irq_global->mask_clear=0x80000000
361 ld [%l5 + 0x00], %g0 ! sun4m_irq_global->pending
366 /* SMP per-cpu ticker interrupts are handled specially. */
370 sethi %hi(CC_ICLR), %o0
371 sethi %hi(1 << 14), %o1
372 or %o0, %lo(CC_ICLR), %o0
373 stha %o1, [%o0] ASI_M_MXCC /* Clear PIL 14 in MXCC's ICLR */
378 call smp4d_percpu_timer_interrupt
379 add %sp, STACKFRAME_SZ, %o0
385 .globl linux_trap_ipi15_sun4d
386 linux_trap_ipi15_sun4d:
388 sethi %hi(CC_BASE), %o4
389 sethi %hi(MXCC_ERR_ME|MXCC_ERR_PEW|MXCC_ERR_ASE|MXCC_ERR_PEE), %o2
390 or %o4, (CC_EREG - CC_BASE), %o0
391 ldda [%o0] ASI_M_MXCC, %o0
394 sethi %hi(BB_STAT2), %o2
395 lduba [%o2] ASI_M_CTL, %o2
396 andcc %o2, BB_STAT2_MASK, %g0
398 or %o4, (CC_ICLR - CC_BASE), %o0
399 sethi %hi(1 << 15), %o1
400 stha %o1, [%o0] ASI_M_MXCC /* Clear PIL 15 in MXCC's ICLR */
406 call smp4d_cross_call_irq
408 b ret_trap_lockless_ipi
415 lduha [%l4] ASI_M_MXCC, %l5
416 sethi %hi(1 << 15), %l7
418 stha %l5, [%l4] ASI_M_MXCC
422 #ifdef CONFIG_SPARC_LEON
424 .extern leon_ipi_interrupt
425 /* SMP per-cpu IPI interrupts are handled specially. */
433 call leonsmp_ipi_interrupt
434 add %sp, STACKFRAME_SZ, %o1 ! pt_regs
440 .globl linux_trap_ipi15_leon
441 linux_trap_ipi15_leon:
448 call leon_cross_call_irq
450 b ret_trap_lockless_ipi
453 #endif /* CONFIG_SPARC_LEON */
455 #endif /* CONFIG_SMP */
457 /* This routine handles illegal instructions and privileged
458 * instruction attempts from user code.
461 .globl bad_instruction
463 sethi %hi(0xc1f80000), %l4
465 sethi %hi(0x81d80000), %l7
471 wr %l0, PSR_ET, %psr ! re-enable traps
474 add %sp, STACKFRAME_SZ, %o0
477 call do_illegal_instruction
482 1: /* unimplemented flush - just skip */
487 .globl priv_instruction
494 add %sp, STACKFRAME_SZ, %o0
497 call do_priv_instruction
502 /* This routine handles unaligned data accesses. */
506 andcc %l0, PSR_PS, %g0
516 call kernel_unaligned_trap
517 add %sp, STACKFRAME_SZ, %o0
524 wr %l0, PSR_ET, %psr ! re-enable traps
528 call user_unaligned_trap
529 add %sp, STACKFRAME_SZ, %o0
533 /* This routine handles floating point disabled traps. */
535 .globl fpd_trap_handler
539 wr %l0, PSR_ET, %psr ! re-enable traps
542 add %sp, STACKFRAME_SZ, %o0
550 /* This routine handles Floating Point Exceptions. */
552 .globl fpe_trap_handler
554 set fpsave_magic, %l5
557 sethi %hi(fpsave), %l5
558 or %l5, %lo(fpsave), %l5
561 sethi %hi(fpsave_catch2), %l5
562 or %l5, %lo(fpsave_catch2), %l5
568 sethi %hi(fpsave_catch), %l5
569 or %l5, %lo(fpsave_catch), %l5
578 wr %l0, PSR_ET, %psr ! re-enable traps
581 add %sp, STACKFRAME_SZ, %o0
589 /* This routine handles Tag Overflow Exceptions. */
591 .globl do_tag_overflow
595 wr %l0, PSR_ET, %psr ! re-enable traps
598 add %sp, STACKFRAME_SZ, %o0
601 call handle_tag_overflow
606 /* This routine handles Watchpoint Exceptions. */
612 wr %l0, PSR_ET, %psr ! re-enable traps
615 add %sp, STACKFRAME_SZ, %o0
618 call handle_watchpoint
623 /* This routine handles Register Access Exceptions. */
629 wr %l0, PSR_ET, %psr ! re-enable traps
632 add %sp, STACKFRAME_SZ, %o0
635 call handle_reg_access
640 /* This routine handles Co-Processor Disabled Exceptions. */
642 .globl do_cp_disabled
646 wr %l0, PSR_ET, %psr ! re-enable traps
649 add %sp, STACKFRAME_SZ, %o0
652 call handle_cp_disabled
657 /* This routine handles Co-Processor Exceptions. */
659 .globl do_cp_exception
663 wr %l0, PSR_ET, %psr ! re-enable traps
666 add %sp, STACKFRAME_SZ, %o0
669 call handle_cp_exception
674 /* This routine handles Hardware Divide By Zero Exceptions. */
680 wr %l0, PSR_ET, %psr ! re-enable traps
683 add %sp, STACKFRAME_SZ, %o0
686 call handle_hw_divzero
692 .globl do_flush_windows
699 andcc %l0, PSR_PS, %g0
703 call flush_user_windows
706 /* Advance over the trap instruction. */
707 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1
709 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
710 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
714 .globl flush_patch_one
716 /* We get these for debugging routines using __builtin_return_address() */
719 FLUSH_ALL_KERNEL_WINDOWS
721 /* Advance over the trap instruction. */
722 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1
724 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
725 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
729 /* The getcc software trap. The user wants the condition codes from
730 * the %psr in register %g1.
734 .globl getcc_trap_handler
736 srl %l0, 20, %g1 ! give user
737 and %g1, 0xf, %g1 ! only ICC bits in %psr
738 jmp %l2 ! advance over trap instruction
739 rett %l2 + 0x4 ! like this...
741 /* The setcc software trap. The user has condition codes in %g1
742 * that it would like placed in the %psr. Be careful not to flip
743 * any unintentional bits!
747 .globl setcc_trap_handler
751 andn %l0, %l5, %l0 ! clear ICC bits in %psr
752 and %l4, %l5, %l4 ! clear non-ICC bits in user value
753 or %l4, %l0, %l4 ! or them in... mix mix mix
755 wr %l4, 0x0, %psr ! set new %psr
756 WRITE_PAUSE ! TI scumbags...
758 jmp %l2 ! advance over trap instruction
759 rett %l2 + 0x4 ! like this...
763 .globl linux_trap_ipi15
767 /* Now it is safe to re-enable traps without recursion. */
772 /* Now call the c-code with the pt_regs frame ptr and the
773 * memory error registers as arguments. The ordering chosen
774 * here is due to unlatching semantics.
776 sethi %hi(AC_SYNC_ERR), %o0
778 lda [%o0] ASI_CONTROL, %o2 ! sync vaddr
780 lda [%o0] ASI_CONTROL, %o1 ! sync error
782 lda [%o0] ASI_CONTROL, %o4 ! async vaddr
784 lda [%o0] ASI_CONTROL, %o3 ! async error
786 add %sp, STACKFRAME_SZ, %o0
790 #endif /* CONFIG_SMP */
793 .globl invalid_segment_patch1_ff
794 .globl invalid_segment_patch2_ff
795 invalid_segment_patch1_ff: cmp %l4, 0xff
796 invalid_segment_patch2_ff: mov 0xff, %l3
799 .globl invalid_segment_patch1_1ff
800 .globl invalid_segment_patch2_1ff
801 invalid_segment_patch1_1ff: cmp %l4, 0x1ff
802 invalid_segment_patch2_1ff: mov 0x1ff, %l3
805 .globl num_context_patch1_16, num_context_patch2_16
806 num_context_patch1_16: mov 0x10, %l7
807 num_context_patch2_16: mov 0x10, %l7
810 .globl vac_linesize_patch_32
811 vac_linesize_patch_32: subcc %l7, 32, %l7
814 .globl vac_hwflush_patch1_on, vac_hwflush_patch2_on
817 * Ugly, but we can't use hardware flushing on the sun4 and we'd require
818 * two instructions (Anton)
820 vac_hwflush_patch1_on: addcc %l7, -PAGE_SIZE, %l7
822 vac_hwflush_patch2_on: sta %g0, [%l3 + %l7] ASI_HWFLUSHSEG
824 .globl invalid_segment_patch1, invalid_segment_patch2
825 .globl num_context_patch1
826 .globl vac_linesize_patch, vac_hwflush_patch1
827 .globl vac_hwflush_patch2
835 lda [%l5] ASI_M_MMUREGS, %l6 ! read sfar first
836 lda [%l4] ASI_M_MMUREGS, %l5 ! read sfsr last
839 srl %l5, 6, %l5 ! and encode all info into l7
844 or %l6, %l7, %l7 ! l7 = [addr,write,txtfault]
850 and %o1, 1, %o1 ! arg2 = text_faultp
852 and %o2, 2, %o2 ! arg3 = writep
853 andn %o3, 0xfff, %o3 ! arg4 = faulting address
859 add %sp, STACKFRAME_SZ, %o0 ! arg1 = pt_regs ptr
864 .globl sys_nis_syscall
867 add %sp, STACKFRAME_SZ, %o0 ! pt_regs *regs arg
868 call c_sys_nis_syscall
875 add %sp, STACKFRAME_SZ, %o0 ! pt_regs *regs arg
881 st %g0, [%sp + STACKFRAME_SZ + PT_I2]
884 add %sp, STACKFRAME_SZ, %o0
887 ld [%sp + STACKFRAME_SZ + PT_I0], %o0
890 .globl sys_sparc_pipe
893 add %sp, STACKFRAME_SZ, %o0 ! pt_regs *regs arg
898 .globl sys_sigaltstack
917 add %sp, STACKFRAME_SZ, %o0
919 ld [%curptr + TI_FLAGS], %l5
920 andcc %l5, _TIF_SYSCALL_TRACE, %g0
928 /* We don't want to muck with user registers like a
929 * normal syscall, just return.
934 .globl sys_rt_sigreturn
937 add %sp, STACKFRAME_SZ, %o0
939 ld [%curptr + TI_FLAGS], %l5
940 andcc %l5, _TIF_SYSCALL_TRACE, %g0
944 add %sp, STACKFRAME_SZ, %o0
949 /* We are returning to a signal handler. */
952 /* Now that we have a real sys_clone, sys_fork() is
953 * implemented in terms of it. Our _real_ implementation
954 * of SunOS vfork() will use sys_vfork().
956 * XXX These three should be consolidated into mostly shared
957 * XXX code just like on sparc64... -DaveM
960 .globl sys_fork, flush_patch_two
964 FLUSH_ALL_KERNEL_WINDOWS;
965 ld [%curptr + TI_TASK], %o4
968 mov SIGCHLD, %o0 ! arg0: clone flags
971 mov %fp, %o1 ! arg1: usp
972 std %g4, [%o4 + AOFF_task_thread + AOFF_thread_fork_kpsr]
973 add %sp, STACKFRAME_SZ, %o2 ! arg2: pt_regs ptr
978 /* Whee, kernel threads! */
979 .globl sys_clone, flush_patch_three
983 FLUSH_ALL_KERNEL_WINDOWS;
984 ld [%curptr + TI_TASK], %o4
988 /* arg0,1: flags,usp -- loaded already */
989 cmp %o1, 0x0 ! Is new_usp NULL?
993 mov %fp, %o1 ! yes, use callers usp
994 andn %o1, 7, %o1 ! no, align to 8 bytes
996 std %g4, [%o4 + AOFF_task_thread + AOFF_thread_fork_kpsr]
997 add %sp, STACKFRAME_SZ, %o2 ! arg2: pt_regs ptr
1002 /* Whee, real vfork! */
1003 .globl sys_vfork, flush_patch_four
1006 FLUSH_ALL_KERNEL_WINDOWS;
1007 ld [%curptr + TI_TASK], %o4
1012 std %g4, [%o4 + AOFF_task_thread + AOFF_thread_fork_kpsr]
1013 sethi %hi(0x4000 | 0x0100 | SIGCHLD), %o0
1015 or %o0, %lo(0x4000 | 0x0100 | SIGCHLD), %o0
1016 sethi %hi(sparc_do_fork), %l1
1018 jmpl %l1 + %lo(sparc_do_fork), %g0
1019 add %sp, STACKFRAME_SZ, %o2
1022 linux_sparc_ni_syscall:
1023 sethi %hi(sys_ni_syscall), %l7
1024 b syscall_is_too_hard
1025 or %l7, %lo(sys_ni_syscall), %l7
1035 linux_syscall_trace:
1036 add %sp, STACKFRAME_SZ, %o0
1049 .globl ret_from_fork
1052 ld [%g3 + TI_TASK], %o0
1054 ld [%sp + STACKFRAME_SZ + PT_I0], %o0
1056 /* Linux native system calls enter here... */
1058 .globl linux_sparc_syscall
1059 linux_sparc_syscall:
1060 sethi %hi(PSR_SYSCALL), %l4
1062 /* Direct access to user regs, must faster. */
1063 cmp %g1, NR_syscalls
1064 bgeu linux_sparc_ni_syscall
1068 bne linux_fast_syscall
1069 /* Just do first insn from SAVE_ALL in the delay slot */
1071 syscall_is_too_hard:
1075 wr %l0, PSR_ET, %psr
1080 ld [%curptr + TI_FLAGS], %l5
1082 andcc %l5, _TIF_SYSCALL_TRACE, %g0
1084 bne linux_syscall_trace
1091 st %o0, [%sp + STACKFRAME_SZ + PT_I0]
1094 ld [%curptr + TI_FLAGS], %l6
1095 cmp %o0, -ERESTART_RESTARTBLOCK
1096 ld [%sp + STACKFRAME_SZ + PT_PSR], %g3
1099 andcc %l6, _TIF_SYSCALL_TRACE, %g0
1101 /* System call success, clear Carry condition code. */
1104 st %g3, [%sp + STACKFRAME_SZ + PT_PSR]
1105 bne linux_syscall_trace2
1106 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1 /* pc = npc */
1107 add %l1, 0x4, %l2 /* npc = npc+4 */
1108 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
1110 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
1112 /* System call failure, set Carry condition code.
1113 * Also, get abs(errno) to return to the process.
1117 st %o0, [%sp + STACKFRAME_SZ + PT_I0]
1119 st %g3, [%sp + STACKFRAME_SZ + PT_PSR]
1120 bne linux_syscall_trace2
1121 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1 /* pc = npc */
1122 add %l1, 0x4, %l2 /* npc = npc+4 */
1123 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
1125 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
1127 linux_syscall_trace2:
1128 add %sp, STACKFRAME_SZ, %o0
1131 add %l1, 0x4, %l2 /* npc = npc+4 */
1132 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
1134 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
1137 /* Saving and restoring the FPU state is best done from lowlevel code.
1139 * void fpsave(unsigned long *fpregs, unsigned long *fsr,
1140 * void *fpqueue, unsigned long *fpqdepth)
1145 st %fsr, [%o1] ! this can trap on us if fpu is in bogon state
1152 /* We have an fpqueue to save. */
1166 std %f0, [%o0 + 0x00]
1167 std %f2, [%o0 + 0x08]
1168 std %f4, [%o0 + 0x10]
1169 std %f6, [%o0 + 0x18]
1170 std %f8, [%o0 + 0x20]
1171 std %f10, [%o0 + 0x28]
1172 std %f12, [%o0 + 0x30]
1173 std %f14, [%o0 + 0x38]
1174 std %f16, [%o0 + 0x40]
1175 std %f18, [%o0 + 0x48]
1176 std %f20, [%o0 + 0x50]
1177 std %f22, [%o0 + 0x58]
1178 std %f24, [%o0 + 0x60]
1179 std %f26, [%o0 + 0x68]
1180 std %f28, [%o0 + 0x70]
1182 std %f30, [%o0 + 0x78]
1184 /* Thanks for Theo Deraadt and the authors of the Sprite/netbsd/openbsd
1185 * code for pointing out this possible deadlock, while we save state
1186 * above we could trap on the fsr store so our low level fpu trap
1187 * code has to know how to deal with this.
1197 /* void fpload(unsigned long *fpregs, unsigned long *fsr); */
1201 ldd [%o0 + 0x00], %f0
1202 ldd [%o0 + 0x08], %f2
1203 ldd [%o0 + 0x10], %f4
1204 ldd [%o0 + 0x18], %f6
1205 ldd [%o0 + 0x20], %f8
1206 ldd [%o0 + 0x28], %f10
1207 ldd [%o0 + 0x30], %f12
1208 ldd [%o0 + 0x38], %f14
1209 ldd [%o0 + 0x40], %f16
1210 ldd [%o0 + 0x48], %f18
1211 ldd [%o0 + 0x50], %f20
1212 ldd [%o0 + 0x58], %f22
1213 ldd [%o0 + 0x60], %f24
1214 ldd [%o0 + 0x68], %f26
1215 ldd [%o0 + 0x70], %f28
1216 ldd [%o0 + 0x78], %f30
1221 /* __ndelay and __udelay take two arguments:
1222 * 0 - nsecs or usecs to delay
1223 * 1 - per_cpu udelay_val (loops per jiffy)
1225 * Note that ndelay gives HZ times higher resolution but has a 10ms
1226 * limit. udelay can handle up to 1s.
1230 save %sp, -STACKFRAME_SZ, %sp
1232 call .umul ! round multiplier up so large ns ok
1233 mov 0x1ae, %o1 ! 2**32 / (1 000 000 000 / HZ)
1235 mov %i1, %o1 ! udelay_val
1237 mov %o1, %o0 ! >>32 later for better resolution
1241 save %sp, -STACKFRAME_SZ, %sp
1243 sethi %hi(0x10c7), %o1 ! round multiplier up so large us ok
1245 or %o1, %lo(0x10c7), %o1 ! 2**32 / 1 000 000
1247 mov %i1, %o1 ! udelay_val
1248 sethi %hi(0x028f4b62), %l0 ! Add in rounding constant * 2**32,
1249 or %g0, %lo(0x028f4b62), %l0
1250 addcc %o0, %l0, %o0 ! 2**32 * 0.009 999
1255 mov HZ, %o0 ! >>32 earlier for wider range
1266 /* Handle a software breakpoint */
1267 /* We have to inform parent that child has stopped */
1269 .globl breakpoint_trap
1273 wr %l0, PSR_ET, %psr
1276 st %i0, [%sp + STACKFRAME_SZ + PT_G0] ! for restarting syscalls
1277 call sparc_breakpoint
1278 add %sp, STACKFRAME_SZ, %o0
1284 .globl kgdb_trap_low
1285 .type kgdb_trap_low,#function
1289 wr %l0, PSR_ET, %psr
1293 add %sp, STACKFRAME_SZ, %o0
1296 .size kgdb_trap_low,.-kgdb_trap_low
1300 .globl flush_patch_exception
1301 flush_patch_exception:
1302 FLUSH_ALL_KERNEL_WINDOWS;
1304 jmpl %o7 + 0xc, %g0 ! see asm-sparc/processor.h
1305 mov 1, %g1 ! signal EFAULT condition
1308 .globl kill_user_windows, kuw_patch1_7win
1310 kuw_patch1_7win: sll %o3, 6, %o3
1312 /* No matter how much overhead this routine has in the worst
1313 * case scenerio, it is several times better than taking the
1314 * traps with the old method of just doing flush_user_windows().
1317 ld [%g6 + TI_UWINMASK], %o0 ! get current umask
1318 orcc %g0, %o0, %g0 ! if no bits set, we are done
1319 be 3f ! nothing to do
1320 rd %psr, %o5 ! must clear interrupts
1321 or %o5, PSR_PIL, %o4 ! or else that could change
1322 wr %o4, 0x0, %psr ! the uwinmask state
1323 WRITE_PAUSE ! burn them cycles
1325 ld [%g6 + TI_UWINMASK], %o0 ! get consistent state
1326 orcc %g0, %o0, %g0 ! did an interrupt come in?
1327 be 4f ! yep, we are done
1328 rd %wim, %o3 ! get current wim
1329 srl %o3, 1, %o4 ! simulate a save
1331 sll %o3, 7, %o3 ! compute next wim
1332 or %o4, %o3, %o3 ! result
1333 andncc %o0, %o3, %o0 ! clean this bit in umask
1334 bne kuw_patch1 ! not done yet
1335 srl %o3, 1, %o4 ! begin another save simulation
1336 wr %o3, 0x0, %wim ! set the new wim
1337 st %g0, [%g6 + TI_UWINMASK] ! clear uwinmask
1339 wr %o5, 0x0, %psr ! re-enable interrupts
1340 WRITE_PAUSE ! burn baby burn
1343 st %g0, [%g6 + TI_W_SAVED] ! no windows saved
1346 .globl restore_current
1348 LOAD_CURRENT(g6, o0)
1352 #ifdef CONFIG_PCIC_PCI
1353 #include <asm/pcic.h>
1356 .globl linux_trap_ipi15_pcic
1357 linux_trap_ipi15_pcic:
1362 * First deactivate NMI
1363 * or we cannot drop ET, cannot get window spill traps.
1364 * The busy loop is necessary because the PIO error
1365 * sometimes does not go away quickly and we trap again.
1367 sethi %hi(pcic_regs), %o1
1368 ld [%o1 + %lo(pcic_regs)], %o2
1370 ! Get pending status for printouts later.
1371 ld [%o2 + PCI_SYS_INT_PENDING], %o0
1373 mov PCI_SYS_INT_PENDING_CLEAR_ALL, %o1
1374 stb %o1, [%o2 + PCI_SYS_INT_PENDING_CLEAR]
1376 ld [%o2 + PCI_SYS_INT_PENDING], %o1
1377 andcc %o1, ((PCI_SYS_INT_PENDING_PIO|PCI_SYS_INT_PENDING_PCI)>>24), %g0
1381 or %l0, PSR_PIL, %l4
1384 wr %l4, PSR_ET, %psr
1388 add %sp, STACKFRAME_SZ, %o1 ! struct pt_regs *regs
1391 .globl pcic_nmi_trap_patch
1392 pcic_nmi_trap_patch:
1393 sethi %hi(linux_trap_ipi15_pcic), %l3
1394 jmpl %l3 + %lo(linux_trap_ipi15_pcic), %g0
1398 #endif /* CONFIG_PCIC_PCI */
1402 save %sp, -0x40, %sp
1403 save %sp, -0x40, %sp
1404 save %sp, -0x40, %sp
1405 save %sp, -0x40, %sp
1406 save %sp, -0x40, %sp
1407 save %sp, -0x40, %sp
1408 save %sp, -0x40, %sp
1418 /* End of entry.S */