2 * linux/arch/sh/boards/se/7724/setup.c
4 * Copyright (C) 2009 Renesas Solutions Corp.
6 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
13 #include <linux/init.h>
14 #include <linux/device.h>
15 #include <linux/interrupt.h>
16 #include <linux/platform_device.h>
17 #include <linux/mmc/host.h>
18 #include <linux/mmc/sh_mobile_sdhi.h>
19 #include <linux/mtd/physmap.h>
20 #include <linux/delay.h>
21 #include <linux/smc91x.h>
22 #include <linux/gpio.h>
23 #include <linux/input.h>
24 #include <linux/input/sh_keysc.h>
25 #include <linux/usb/r8a66597.h>
26 #include <linux/sh_eth.h>
27 #include <linux/videodev2.h>
28 #include <video/sh_mobile_lcdc.h>
29 #include <media/sh_mobile_ceu.h>
30 #include <sound/sh_fsi.h>
32 #include <asm/heartbeat.h>
33 #include <asm/clock.h>
34 #include <asm/suspend.h>
35 #include <cpu/sh7724.h>
36 #include <mach-se/mach/se7724.h>
40 * ------------------------------------
41 * SW31 : 1001 1100 : default
42 * SW32 : 0111 1111 : use on board flash
44 * SW41 : abxx xxxx -> a = 0 : Analog monitor
53 * When you use 1280 x 720 lcdc output,
54 * you should change OSC6 lcdc clock from 25.175MHz to 74.25MHz,
55 * and change SW41 to use 720p
61 * This setup.c supports FSI slave mode.
62 * Please change J20, J21, J22 pin to 1-2 connection.
66 static struct resource heartbeat_resource = {
69 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
72 static struct platform_device heartbeat_device = {
76 .resource = &heartbeat_resource,
80 static struct smc91x_platdata smc91x_info = {
81 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
84 static struct resource smc91x_eth_resources[] = {
89 .flags = IORESOURCE_MEM,
93 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
97 static struct platform_device smc91x_eth_device = {
99 .num_resources = ARRAY_SIZE(smc91x_eth_resources),
100 .resource = smc91x_eth_resources,
102 .platform_data = &smc91x_info,
107 static struct mtd_partition nor_flash_partitions[] = {
111 .size = (1 * 1024 * 1024),
112 .mask_flags = MTD_WRITEABLE, /* Read-only */
115 .offset = MTDPART_OFS_APPEND,
116 .size = (2 * 1024 * 1024),
119 .offset = MTDPART_OFS_APPEND,
120 .size = MTDPART_SIZ_FULL,
124 static struct physmap_flash_data nor_flash_data = {
126 .parts = nor_flash_partitions,
127 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
130 static struct resource nor_flash_resources[] = {
135 .flags = IORESOURCE_MEM,
139 static struct platform_device nor_flash_device = {
140 .name = "physmap-flash",
141 .resource = nor_flash_resources,
142 .num_resources = ARRAY_SIZE(nor_flash_resources),
144 .platform_data = &nor_flash_data,
149 static const struct fb_videomode lcdc_720p_modes[] = {
152 .sync = 0, /* hsync and vsync are active low */
164 static const struct fb_videomode lcdc_vga_modes[] = {
167 .sync = 0, /* hsync and vsync are active low */
179 static struct sh_mobile_lcdc_info lcdc_info = {
180 .clock_source = LCDC_CLK_EXTERNAL,
182 .chan = LCDC_CHAN_MAINLCD,
183 .fourcc = V4L2_PIX_FMT_RGB565,
185 .lcd_size_cfg = { /* 7.0 inch */
194 static struct resource lcdc_resources[] = {
199 .flags = IORESOURCE_MEM,
203 .flags = IORESOURCE_IRQ,
207 static struct platform_device lcdc_device = {
208 .name = "sh_mobile_lcdc_fb",
209 .num_resources = ARRAY_SIZE(lcdc_resources),
210 .resource = lcdc_resources,
212 .platform_data = &lcdc_info,
217 static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
218 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
221 static struct resource ceu0_resources[] = {
226 .flags = IORESOURCE_MEM,
230 .flags = IORESOURCE_IRQ,
233 /* place holder for contiguous memory */
237 static struct platform_device ceu0_device = {
238 .name = "sh_mobile_ceu",
239 .id = 0, /* "ceu0" clock */
240 .num_resources = ARRAY_SIZE(ceu0_resources),
241 .resource = ceu0_resources,
243 .platform_data = &sh_mobile_ceu0_info,
248 static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
249 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
252 static struct resource ceu1_resources[] = {
257 .flags = IORESOURCE_MEM,
261 .flags = IORESOURCE_IRQ,
264 /* place holder for contiguous memory */
268 static struct platform_device ceu1_device = {
269 .name = "sh_mobile_ceu",
270 .id = 1, /* "ceu1" clock */
271 .num_resources = ARRAY_SIZE(ceu1_resources),
272 .resource = ceu1_resources,
274 .platform_data = &sh_mobile_ceu1_info,
279 /* change J20, J21, J22 pin to 1-2 connection to use slave mode */
280 static struct sh_fsi_platform_info fsi_info = {
282 .flags = SH_FSI_BRS_INV,
286 static struct resource fsi_resources[] = {
291 .flags = IORESOURCE_MEM,
295 .flags = IORESOURCE_IRQ,
299 static struct platform_device fsi_device = {
302 .num_resources = ARRAY_SIZE(fsi_resources),
303 .resource = fsi_resources,
305 .platform_data = &fsi_info,
309 static struct fsi_ak4642_info fsi_ak4642_info = {
311 .card = "FSIA-AK4642",
312 .cpu_dai = "fsia-dai",
313 .codec = "ak4642-codec.0-0012",
314 .platform = "sh_fsi.0",
318 static struct platform_device fsi_ak4642_device = {
319 .name = "fsi-ak4642-audio",
321 .platform_data = &fsi_ak4642_info,
325 /* KEYSC in SoC (Needs SW33-2 set to ON) */
326 static struct sh_keysc_info keysc_info = {
327 .mode = SH_KEYSC_MODE_1,
331 KEY_1, KEY_2, KEY_3, KEY_4, KEY_5,
332 KEY_6, KEY_7, KEY_8, KEY_9, KEY_A,
333 KEY_B, KEY_C, KEY_D, KEY_E, KEY_F,
334 KEY_G, KEY_H, KEY_I, KEY_K, KEY_L,
335 KEY_M, KEY_N, KEY_O, KEY_P, KEY_Q,
336 KEY_R, KEY_S, KEY_T, KEY_U, KEY_V,
340 static struct resource keysc_resources[] = {
345 .flags = IORESOURCE_MEM,
349 .flags = IORESOURCE_IRQ,
353 static struct platform_device keysc_device = {
355 .id = 0, /* "keysc0" clock */
356 .num_resources = ARRAY_SIZE(keysc_resources),
357 .resource = keysc_resources,
359 .platform_data = &keysc_info,
364 static struct resource sh_eth_resources[] = {
366 .start = SH_ETH_ADDR,
367 .end = SH_ETH_ADDR + 0x1FC,
368 .flags = IORESOURCE_MEM,
372 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
376 static struct sh_eth_plat_data sh_eth_plat = {
377 .phy = 0x1f, /* SMSC LAN8187 */
378 .edmac_endian = EDMAC_LITTLE_ENDIAN,
381 static struct platform_device sh_eth_device = {
385 .platform_data = &sh_eth_plat,
387 .num_resources = ARRAY_SIZE(sh_eth_resources),
388 .resource = sh_eth_resources,
391 static struct r8a66597_platdata sh7724_usb0_host_data = {
395 static struct resource sh7724_usb0_host_resources[] = {
398 .end = 0xa4d80124 - 1,
399 .flags = IORESOURCE_MEM,
404 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
408 static struct platform_device sh7724_usb0_host_device = {
409 .name = "r8a66597_hcd",
412 .dma_mask = NULL, /* not use dma */
413 .coherent_dma_mask = 0xffffffff,
414 .platform_data = &sh7724_usb0_host_data,
416 .num_resources = ARRAY_SIZE(sh7724_usb0_host_resources),
417 .resource = sh7724_usb0_host_resources,
420 static struct r8a66597_platdata sh7724_usb1_gadget_data = {
424 static struct resource sh7724_usb1_gadget_resources[] = {
428 .flags = IORESOURCE_MEM,
433 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
437 static struct platform_device sh7724_usb1_gadget_device = {
438 .name = "r8a66597_udc",
441 .dma_mask = NULL, /* not use dma */
442 .coherent_dma_mask = 0xffffffff,
443 .platform_data = &sh7724_usb1_gadget_data,
445 .num_resources = ARRAY_SIZE(sh7724_usb1_gadget_resources),
446 .resource = sh7724_usb1_gadget_resources,
449 static struct resource sdhi0_cn7_resources[] = {
454 .flags = IORESOURCE_MEM,
458 .flags = IORESOURCE_IRQ,
462 static struct sh_mobile_sdhi_info sh7724_sdhi0_data = {
463 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
464 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
465 .tmio_caps = MMC_CAP_SDIO_IRQ,
468 static struct platform_device sdhi0_cn7_device = {
469 .name = "sh_mobile_sdhi",
471 .num_resources = ARRAY_SIZE(sdhi0_cn7_resources),
472 .resource = sdhi0_cn7_resources,
474 .platform_data = &sh7724_sdhi0_data,
478 static struct resource sdhi1_cn8_resources[] = {
483 .flags = IORESOURCE_MEM,
487 .flags = IORESOURCE_IRQ,
491 static struct sh_mobile_sdhi_info sh7724_sdhi1_data = {
492 .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
493 .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
494 .tmio_caps = MMC_CAP_SDIO_IRQ,
497 static struct platform_device sdhi1_cn8_device = {
498 .name = "sh_mobile_sdhi",
500 .num_resources = ARRAY_SIZE(sdhi1_cn8_resources),
501 .resource = sdhi1_cn8_resources,
503 .platform_data = &sh7724_sdhi1_data,
508 static struct resource irda_resources[] = {
513 .flags = IORESOURCE_MEM,
517 .flags = IORESOURCE_IRQ,
521 static struct platform_device irda_device = {
523 .num_resources = ARRAY_SIZE(irda_resources),
524 .resource = irda_resources,
527 #include <media/ak881x.h>
528 #include <media/sh_vou.h>
530 static struct ak881x_pdata ak881x_pdata = {
531 .flags = AK881X_IF_MODE_SLAVE,
534 static struct i2c_board_info ak8813 = {
535 /* With open J18 jumper address is 0x21 */
536 I2C_BOARD_INFO("ak8813", 0x20),
537 .platform_data = &ak881x_pdata,
540 static struct sh_vou_pdata sh_vou_pdata = {
541 .bus_fmt = SH_VOU_BUS_8BIT,
542 .flags = SH_VOU_HSYNC_LOW | SH_VOU_VSYNC_LOW,
543 .board_info = &ak8813,
547 static struct resource sh_vou_resources[] = {
551 .flags = IORESOURCE_MEM,
555 .flags = IORESOURCE_IRQ,
559 static struct platform_device vou_device = {
562 .num_resources = ARRAY_SIZE(sh_vou_resources),
563 .resource = sh_vou_resources,
565 .platform_data = &sh_vou_pdata,
569 static struct platform_device *ms7724se_devices[] __initdata = {
578 &sh7724_usb0_host_device,
579 &sh7724_usb1_gadget_device,
589 static struct i2c_board_info i2c0_devices[] = {
591 I2C_BOARD_INFO("ak4642", 0x12),
595 #define EEPROM_OP 0xBA206000
596 #define EEPROM_ADR 0xBA206004
597 #define EEPROM_DATA 0xBA20600C
598 #define EEPROM_STAT 0xBA206010
599 #define EEPROM_STRT 0xBA206014
600 static int __init sh_eth_is_eeprom_ready(void)
605 if (!__raw_readw(EEPROM_STAT))
610 printk(KERN_ERR "ms7724se can not access to eeprom\n");
614 static void __init sh_eth_init(void)
619 /* check EEPROM status */
620 if (!sh_eth_is_eeprom_ready())
623 /* read MAC addr from EEPROM */
624 for (i = 0 ; i < 3 ; i++) {
625 __raw_writew(0x0, EEPROM_OP); /* read */
626 __raw_writew(i*2, EEPROM_ADR);
627 __raw_writew(0x1, EEPROM_STRT);
628 if (!sh_eth_is_eeprom_ready())
631 mac = __raw_readw(EEPROM_DATA);
632 sh_eth_plat.mac_addr[i << 1] = mac & 0xff;
633 sh_eth_plat.mac_addr[(i << 1) + 1] = mac >> 8;
637 #define SW4140 0xBA201000
638 #define FPGA_OUT 0xBA200400
639 #define PORT_HIZA 0xA4050158
640 #define PORT_MSELCRB 0xA4050182
642 #define SW41_A 0x0100
643 #define SW41_B 0x0200
644 #define SW41_C 0x0400
645 #define SW41_D 0x0800
646 #define SW41_E 0x1000
647 #define SW41_F 0x2000
648 #define SW41_G 0x4000
649 #define SW41_H 0x8000
651 extern char ms7724se_sdram_enter_start;
652 extern char ms7724se_sdram_enter_end;
653 extern char ms7724se_sdram_leave_start;
654 extern char ms7724se_sdram_leave_end;
657 static int __init arch_setup(void)
659 /* enable I2C device */
660 i2c_register_board_info(0, i2c0_devices,
661 ARRAY_SIZE(i2c0_devices));
664 arch_initcall(arch_setup);
666 static int __init devices_setup(void)
668 u16 sw = __raw_readw(SW4140); /* select camera, monitor */
672 /* register board specific self-refresh code */
673 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
675 &ms7724se_sdram_enter_start,
676 &ms7724se_sdram_enter_end,
677 &ms7724se_sdram_leave_start,
678 &ms7724se_sdram_leave_end);
680 fpga_out = __raw_readw(FPGA_OUT);
681 /* bit4: NTSC_PDN, bit5: NTSC_RESET */
682 fpga_out &= ~((1 << 1) | /* LAN */
683 (1 << 4) | /* AK8813 PDN */
684 (1 << 5) | /* AK8813 RESET */
685 (1 << 6) | /* VIDEO DAC */
686 (1 << 7) | /* AK4643 */
687 (1 << 8) | /* IrDA */
688 (1 << 12) | /* USB0 */
689 (1 << 14)); /* RMII */
690 __raw_writew(fpga_out | (1 << 4), FPGA_OUT);
695 __raw_writew(fpga_out | (1 << 5), FPGA_OUT);
699 __raw_writew(fpga_out, FPGA_OUT);
701 /* turn on USB clocks, use external clock */
702 __raw_writew((__raw_readw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB);
704 /* Let LED9 show STATUS2 */
705 gpio_request(GPIO_FN_STATUS2, NULL);
707 /* Lit LED10 show STATUS0 */
708 gpio_request(GPIO_FN_STATUS0, NULL);
710 /* Lit LED11 show PDSTATUS */
711 gpio_request(GPIO_FN_PDSTATUS, NULL);
713 /* enable USB0 port */
714 __raw_writew(0x0600, 0xa40501d4);
716 /* enable USB1 port */
717 __raw_writew(0x0600, 0xa4050192);
719 /* enable IRQ 0,1,2 */
720 gpio_request(GPIO_FN_INTC_IRQ0, NULL);
721 gpio_request(GPIO_FN_INTC_IRQ1, NULL);
722 gpio_request(GPIO_FN_INTC_IRQ2, NULL);
725 gpio_request(GPIO_FN_SCIF3_I_SCK, NULL);
726 gpio_request(GPIO_FN_SCIF3_I_RXD, NULL);
727 gpio_request(GPIO_FN_SCIF3_I_TXD, NULL);
728 gpio_request(GPIO_FN_SCIF3_I_CTS, NULL);
729 gpio_request(GPIO_FN_SCIF3_I_RTS, NULL);
732 gpio_request(GPIO_FN_LCDD23, NULL);
733 gpio_request(GPIO_FN_LCDD22, NULL);
734 gpio_request(GPIO_FN_LCDD21, NULL);
735 gpio_request(GPIO_FN_LCDD20, NULL);
736 gpio_request(GPIO_FN_LCDD19, NULL);
737 gpio_request(GPIO_FN_LCDD18, NULL);
738 gpio_request(GPIO_FN_LCDD17, NULL);
739 gpio_request(GPIO_FN_LCDD16, NULL);
740 gpio_request(GPIO_FN_LCDD15, NULL);
741 gpio_request(GPIO_FN_LCDD14, NULL);
742 gpio_request(GPIO_FN_LCDD13, NULL);
743 gpio_request(GPIO_FN_LCDD12, NULL);
744 gpio_request(GPIO_FN_LCDD11, NULL);
745 gpio_request(GPIO_FN_LCDD10, NULL);
746 gpio_request(GPIO_FN_LCDD9, NULL);
747 gpio_request(GPIO_FN_LCDD8, NULL);
748 gpio_request(GPIO_FN_LCDD7, NULL);
749 gpio_request(GPIO_FN_LCDD6, NULL);
750 gpio_request(GPIO_FN_LCDD5, NULL);
751 gpio_request(GPIO_FN_LCDD4, NULL);
752 gpio_request(GPIO_FN_LCDD3, NULL);
753 gpio_request(GPIO_FN_LCDD2, NULL);
754 gpio_request(GPIO_FN_LCDD1, NULL);
755 gpio_request(GPIO_FN_LCDD0, NULL);
756 gpio_request(GPIO_FN_LCDDISP, NULL);
757 gpio_request(GPIO_FN_LCDHSYN, NULL);
758 gpio_request(GPIO_FN_LCDDCK, NULL);
759 gpio_request(GPIO_FN_LCDVSYN, NULL);
760 gpio_request(GPIO_FN_LCDDON, NULL);
761 gpio_request(GPIO_FN_LCDVEPWC, NULL);
762 gpio_request(GPIO_FN_LCDVCPWC, NULL);
763 gpio_request(GPIO_FN_LCDRD, NULL);
764 gpio_request(GPIO_FN_LCDLCLK, NULL);
765 __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
768 gpio_request(GPIO_FN_VIO0_D15, NULL);
769 gpio_request(GPIO_FN_VIO0_D14, NULL);
770 gpio_request(GPIO_FN_VIO0_D13, NULL);
771 gpio_request(GPIO_FN_VIO0_D12, NULL);
772 gpio_request(GPIO_FN_VIO0_D11, NULL);
773 gpio_request(GPIO_FN_VIO0_D10, NULL);
774 gpio_request(GPIO_FN_VIO0_D9, NULL);
775 gpio_request(GPIO_FN_VIO0_D8, NULL);
776 gpio_request(GPIO_FN_VIO0_D7, NULL);
777 gpio_request(GPIO_FN_VIO0_D6, NULL);
778 gpio_request(GPIO_FN_VIO0_D5, NULL);
779 gpio_request(GPIO_FN_VIO0_D4, NULL);
780 gpio_request(GPIO_FN_VIO0_D3, NULL);
781 gpio_request(GPIO_FN_VIO0_D2, NULL);
782 gpio_request(GPIO_FN_VIO0_D1, NULL);
783 gpio_request(GPIO_FN_VIO0_D0, NULL);
784 gpio_request(GPIO_FN_VIO0_VD, NULL);
785 gpio_request(GPIO_FN_VIO0_CLK, NULL);
786 gpio_request(GPIO_FN_VIO0_FLD, NULL);
787 gpio_request(GPIO_FN_VIO0_HD, NULL);
788 platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
791 gpio_request(GPIO_FN_VIO1_D7, NULL);
792 gpio_request(GPIO_FN_VIO1_D6, NULL);
793 gpio_request(GPIO_FN_VIO1_D5, NULL);
794 gpio_request(GPIO_FN_VIO1_D4, NULL);
795 gpio_request(GPIO_FN_VIO1_D3, NULL);
796 gpio_request(GPIO_FN_VIO1_D2, NULL);
797 gpio_request(GPIO_FN_VIO1_D1, NULL);
798 gpio_request(GPIO_FN_VIO1_D0, NULL);
799 gpio_request(GPIO_FN_VIO1_FLD, NULL);
800 gpio_request(GPIO_FN_VIO1_HD, NULL);
801 gpio_request(GPIO_FN_VIO1_VD, NULL);
802 gpio_request(GPIO_FN_VIO1_CLK, NULL);
803 platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
806 gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
807 gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
808 gpio_request(GPIO_FN_KEYIN4, NULL);
809 gpio_request(GPIO_FN_KEYIN3, NULL);
810 gpio_request(GPIO_FN_KEYIN2, NULL);
811 gpio_request(GPIO_FN_KEYIN1, NULL);
812 gpio_request(GPIO_FN_KEYIN0, NULL);
813 gpio_request(GPIO_FN_KEYOUT3, NULL);
814 gpio_request(GPIO_FN_KEYOUT2, NULL);
815 gpio_request(GPIO_FN_KEYOUT1, NULL);
816 gpio_request(GPIO_FN_KEYOUT0, NULL);
819 gpio_request(GPIO_FN_FSIMCKA, NULL);
820 gpio_request(GPIO_FN_FSIIASD, NULL);
821 gpio_request(GPIO_FN_FSIOASD, NULL);
822 gpio_request(GPIO_FN_FSIIABCK, NULL);
823 gpio_request(GPIO_FN_FSIIALRCK, NULL);
824 gpio_request(GPIO_FN_FSIOABCK, NULL);
825 gpio_request(GPIO_FN_FSIOALRCK, NULL);
826 gpio_request(GPIO_FN_CLKAUDIOAO, NULL);
828 /* set SPU2 clock to 83.4 MHz */
829 clk = clk_get(NULL, "spu_clk");
831 clk_set_rate(clk, clk_round_rate(clk, 83333333));
835 /* change parent of FSI A */
836 clk = clk_get(NULL, "fsia_clk");
838 /* 48kHz dummy clock was used to make sure 1/1 divide */
839 clk_set_rate(&sh7724_fsimcka_clk, 48000);
840 clk_set_parent(clk, &sh7724_fsimcka_clk);
841 clk_set_rate(clk, 48000);
845 /* SDHI0 connected to cn7 */
846 gpio_request(GPIO_FN_SDHI0CD, NULL);
847 gpio_request(GPIO_FN_SDHI0WP, NULL);
848 gpio_request(GPIO_FN_SDHI0D3, NULL);
849 gpio_request(GPIO_FN_SDHI0D2, NULL);
850 gpio_request(GPIO_FN_SDHI0D1, NULL);
851 gpio_request(GPIO_FN_SDHI0D0, NULL);
852 gpio_request(GPIO_FN_SDHI0CMD, NULL);
853 gpio_request(GPIO_FN_SDHI0CLK, NULL);
855 /* SDHI1 connected to cn8 */
856 gpio_request(GPIO_FN_SDHI1CD, NULL);
857 gpio_request(GPIO_FN_SDHI1WP, NULL);
858 gpio_request(GPIO_FN_SDHI1D3, NULL);
859 gpio_request(GPIO_FN_SDHI1D2, NULL);
860 gpio_request(GPIO_FN_SDHI1D1, NULL);
861 gpio_request(GPIO_FN_SDHI1D0, NULL);
862 gpio_request(GPIO_FN_SDHI1CMD, NULL);
863 gpio_request(GPIO_FN_SDHI1CLK, NULL);
866 gpio_request(GPIO_FN_IRDA_OUT, NULL);
867 gpio_request(GPIO_FN_IRDA_IN, NULL);
872 * please remove J33 pin from your board !!
874 * ms7724 board should not use GPIO_FN_LNKSTA pin
875 * So, This time PTX5 is set to input pin
877 gpio_request(GPIO_FN_RMII_RXD0, NULL);
878 gpio_request(GPIO_FN_RMII_RXD1, NULL);
879 gpio_request(GPIO_FN_RMII_TXD0, NULL);
880 gpio_request(GPIO_FN_RMII_TXD1, NULL);
881 gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
882 gpio_request(GPIO_FN_RMII_TX_EN, NULL);
883 gpio_request(GPIO_FN_RMII_RX_ER, NULL);
884 gpio_request(GPIO_FN_RMII_CRS_DV, NULL);
885 gpio_request(GPIO_FN_MDIO, NULL);
886 gpio_request(GPIO_FN_MDC, NULL);
887 gpio_request(GPIO_PTX5, NULL);
888 gpio_direction_input(GPIO_PTX5);
893 lcdc_info.ch[0].lcd_cfg = lcdc_720p_modes;
894 lcdc_info.ch[0].num_cfg = ARRAY_SIZE(lcdc_720p_modes);
897 lcdc_info.ch[0].lcd_cfg = lcdc_vga_modes;
898 lcdc_info.ch[0].num_cfg = ARRAY_SIZE(lcdc_vga_modes);
902 /* Digital monitor */
903 lcdc_info.ch[0].interface_type = RGB18;
904 lcdc_info.ch[0].flags = 0;
907 lcdc_info.ch[0].interface_type = RGB24;
908 lcdc_info.ch[0].flags = LCDC_FLAGS_DWPOL;
912 gpio_request(GPIO_FN_DV_D15, NULL);
913 gpio_request(GPIO_FN_DV_D14, NULL);
914 gpio_request(GPIO_FN_DV_D13, NULL);
915 gpio_request(GPIO_FN_DV_D12, NULL);
916 gpio_request(GPIO_FN_DV_D11, NULL);
917 gpio_request(GPIO_FN_DV_D10, NULL);
918 gpio_request(GPIO_FN_DV_D9, NULL);
919 gpio_request(GPIO_FN_DV_D8, NULL);
920 gpio_request(GPIO_FN_DV_CLKI, NULL);
921 gpio_request(GPIO_FN_DV_CLK, NULL);
922 gpio_request(GPIO_FN_DV_VSYNC, NULL);
923 gpio_request(GPIO_FN_DV_HSYNC, NULL);
925 return platform_add_devices(ms7724se_devices,
926 ARRAY_SIZE(ms7724se_devices));
928 device_initcall(devices_setup);
930 static struct sh_machine_vector mv_ms7724se __initmv = {
931 .mv_name = "ms7724se",
932 .mv_init_irq = init_se7724_IRQ,
933 .mv_nr_irqs = SE7724_FPGA_IRQ_BASE + SE7724_FPGA_IRQ_NR,