2 * arch/s390/kernel/time.c
3 * Time of day based timer functions.
6 * Copyright IBM Corp. 1999, 2008
7 * Author(s): Hartmut Penner (hp@de.ibm.com),
8 * Martin Schwidefsky (schwidefsky@de.ibm.com),
9 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
11 * Derived from "arch/i386/kernel/time.c"
12 * Copyright (C) 1991, 1992, 1995 Linus Torvalds
15 #define KMSG_COMPONENT "time"
16 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
18 #include <linux/errno.h>
19 #include <linux/module.h>
20 #include <linux/sched.h>
21 #include <linux/kernel.h>
22 #include <linux/param.h>
23 #include <linux/string.h>
25 #include <linux/interrupt.h>
26 #include <linux/cpu.h>
27 #include <linux/stop_machine.h>
28 #include <linux/time.h>
29 #include <linux/sysdev.h>
30 #include <linux/delay.h>
31 #include <linux/init.h>
32 #include <linux/smp.h>
33 #include <linux/types.h>
34 #include <linux/profile.h>
35 #include <linux/timex.h>
36 #include <linux/notifier.h>
37 #include <linux/clocksource.h>
38 #include <linux/clockchips.h>
39 #include <asm/uaccess.h>
40 #include <asm/delay.h>
41 #include <asm/s390_ext.h>
42 #include <asm/div64.h>
45 #include <asm/irq_regs.h>
46 #include <asm/timer.h>
50 /* change this if you have some constant time drift */
51 #define USECS_PER_JIFFY ((unsigned long) 1000000/HZ)
52 #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12)
55 * Create a small time difference between the timer interrupts
56 * on the different cpus to avoid lock contention.
58 #define CPU_DEVIATION (smp_processor_id() << 12)
60 #define TICK_SIZE tick
62 u64 sched_clock_base_cc = -1; /* Force to data section. */
63 EXPORT_SYMBOL_GPL(sched_clock_base_cc);
65 static DEFINE_PER_CPU(struct clock_event_device, comparators);
68 * Scheduler clock - returns current time in nanosec units.
70 unsigned long long notrace sched_clock(void)
72 return (get_clock_monotonic() * 125) >> 9;
76 * Monotonic_clock - returns # of nanoseconds passed since time_init()
78 unsigned long long monotonic_clock(void)
82 EXPORT_SYMBOL(monotonic_clock);
84 void tod_to_timeval(__u64 todval, struct timespec *xtime)
86 unsigned long long sec;
91 todval -= (sec * 1000000) << 12;
92 xtime->tv_nsec = ((todval * 1000) >> 12);
95 void clock_comparator_work(void)
97 struct clock_event_device *cd;
99 S390_lowcore.clock_comparator = -1ULL;
100 set_clock_comparator(S390_lowcore.clock_comparator);
101 cd = &__get_cpu_var(comparators);
102 cd->event_handler(cd);
106 * Fixup the clock comparator.
108 static void fixup_clock_comparator(unsigned long long delta)
110 /* If nobody is waiting there's nothing to fix. */
111 if (S390_lowcore.clock_comparator == -1ULL)
113 S390_lowcore.clock_comparator += delta;
114 set_clock_comparator(S390_lowcore.clock_comparator);
117 static int s390_next_event(unsigned long delta,
118 struct clock_event_device *evt)
120 S390_lowcore.clock_comparator = get_clock() + delta;
121 set_clock_comparator(S390_lowcore.clock_comparator);
125 static void s390_set_mode(enum clock_event_mode mode,
126 struct clock_event_device *evt)
131 * Set up lowcore and control register of the current cpu to
132 * enable TOD clock and clock comparator interrupts.
134 void init_cpu_timer(void)
136 struct clock_event_device *cd;
139 S390_lowcore.clock_comparator = -1ULL;
140 set_clock_comparator(S390_lowcore.clock_comparator);
142 cpu = smp_processor_id();
143 cd = &per_cpu(comparators, cpu);
144 cd->name = "comparator";
145 cd->features = CLOCK_EVT_FEAT_ONESHOT;
148 cd->min_delta_ns = 1;
149 cd->max_delta_ns = LONG_MAX;
151 cd->cpumask = cpumask_of(cpu);
152 cd->set_next_event = s390_next_event;
153 cd->set_mode = s390_set_mode;
155 clockevents_register_device(cd);
157 /* Enable clock comparator timer interrupt. */
160 /* Always allow the timing alert external interrupt. */
164 static void clock_comparator_interrupt(__u16 code)
166 if (S390_lowcore.clock_comparator == -1ULL)
167 set_clock_comparator(S390_lowcore.clock_comparator);
170 static void etr_timing_alert(struct etr_irq_parm *);
171 static void stp_timing_alert(struct stp_irq_parm *);
173 static void timing_alert_interrupt(__u16 code)
175 if (S390_lowcore.ext_params & 0x00c40000)
176 etr_timing_alert((struct etr_irq_parm *)
177 &S390_lowcore.ext_params);
178 if (S390_lowcore.ext_params & 0x00038000)
179 stp_timing_alert((struct stp_irq_parm *)
180 &S390_lowcore.ext_params);
183 static void etr_reset(void);
184 static void stp_reset(void);
186 unsigned long read_persistent_clock(void)
190 tod_to_timeval(get_clock() - TOD_UNIX_EPOCH, &ts);
194 static cycle_t read_tod_clock(struct clocksource *cs)
199 static struct clocksource clocksource_tod = {
202 .read = read_tod_clock,
206 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
210 void update_vsyscall(struct timespec *wall_time, struct clocksource *clock)
212 if (clock != &clocksource_tod)
215 /* Make userspace gettimeofday spin until we're done. */
216 ++vdso_data->tb_update_count;
218 vdso_data->xtime_tod_stamp = clock->cycle_last;
219 vdso_data->xtime_clock_sec = xtime.tv_sec;
220 vdso_data->xtime_clock_nsec = xtime.tv_nsec;
221 vdso_data->wtom_clock_sec = wall_to_monotonic.tv_sec;
222 vdso_data->wtom_clock_nsec = wall_to_monotonic.tv_nsec;
224 ++vdso_data->tb_update_count;
227 extern struct timezone sys_tz;
229 void update_vsyscall_tz(void)
231 /* Make userspace gettimeofday spin until we're done. */
232 ++vdso_data->tb_update_count;
234 vdso_data->tz_minuteswest = sys_tz.tz_minuteswest;
235 vdso_data->tz_dsttime = sys_tz.tz_dsttime;
237 ++vdso_data->tb_update_count;
241 * Initialize the TOD clock and the CPU timer of
244 void __init time_init(void)
250 /* Reset time synchronization interfaces. */
254 /* request the clock comparator external interrupt */
255 if (register_external_interrupt(0x1004, clock_comparator_interrupt))
256 panic("Couldn't request external interrupt 0x1004");
258 /* request the timing alert external interrupt */
259 if (register_external_interrupt(0x1406, timing_alert_interrupt))
260 panic("Couldn't request external interrupt 0x1406");
262 if (clocksource_register(&clocksource_tod) != 0)
263 panic("Could not register TOD clock source");
266 * The TOD clock is an accurate clock. The xtime should be
267 * initialized in a way that the difference between TOD and
268 * xtime is reasonably small. Too bad that timekeeping_init
269 * sets xtime.tv_nsec to zero. In addition the clock source
270 * change from the jiffies clock source to the TOD clock
271 * source add another error of up to 1/HZ second. The same
272 * function sets wall_to_monotonic to a value that is too
273 * small for /proc/uptime to be accurate.
274 * Reset xtime and wall_to_monotonic to sane values.
276 write_seqlock_irqsave(&xtime_lock, flags);
278 tod_to_timeval(now - TOD_UNIX_EPOCH, &xtime);
279 clocksource_tod.cycle_last = now;
280 clocksource_tod.raw_time = xtime;
281 tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, &ts);
282 set_normalized_timespec(&wall_to_monotonic, -ts.tv_sec, -ts.tv_nsec);
283 write_sequnlock_irqrestore(&xtime_lock, flags);
285 /* Enable TOD clock interrupts on the boot cpu. */
288 /* Enable cpu timer interrupts on the boot cpu. */
293 * The time is "clock". old is what we think the time is.
294 * Adjust the value by a multiple of jiffies and add the delta to ntp.
295 * "delay" is an approximation how long the synchronization took. If
296 * the time correction is positive, then "delay" is subtracted from
297 * the time difference and only the remaining part is passed to ntp.
299 static unsigned long long adjust_time(unsigned long long old,
300 unsigned long long clock,
301 unsigned long long delay)
303 unsigned long long delta, ticks;
307 /* It is later than we thought. */
308 delta = ticks = clock - old;
309 delta = ticks = (delta < delay) ? 0 : delta - delay;
310 delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
311 adjust.offset = ticks * (1000000 / HZ);
313 /* It is earlier than we thought. */
314 delta = ticks = old - clock;
315 delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
317 adjust.offset = -ticks * (1000000 / HZ);
319 sched_clock_base_cc += delta;
320 if (adjust.offset != 0) {
321 pr_notice("The ETR interface has adjusted the clock "
322 "by %li microseconds\n", adjust.offset);
323 adjust.modes = ADJ_OFFSET_SINGLESHOT;
324 do_adjtimex(&adjust);
329 static DEFINE_PER_CPU(atomic_t, clock_sync_word);
330 static DEFINE_MUTEX(clock_sync_mutex);
331 static unsigned long clock_sync_flags;
333 #define CLOCK_SYNC_HAS_ETR 0
334 #define CLOCK_SYNC_HAS_STP 1
335 #define CLOCK_SYNC_ETR 2
336 #define CLOCK_SYNC_STP 3
339 * The synchronous get_clock function. It will write the current clock
340 * value to the clock pointer and return 0 if the clock is in sync with
341 * the external time source. If the clock mode is local it will return
342 * -ENOSYS and -EAGAIN if the clock is not in sync with the external
345 int get_sync_clock(unsigned long long *clock)
348 unsigned int sw0, sw1;
350 sw_ptr = &get_cpu_var(clock_sync_word);
351 sw0 = atomic_read(sw_ptr);
352 *clock = get_clock();
353 sw1 = atomic_read(sw_ptr);
354 put_cpu_var(clock_sync_sync);
355 if (sw0 == sw1 && (sw0 & 0x80000000U))
356 /* Success: time is in sync. */
358 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) &&
359 !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
361 if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) &&
362 !test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
366 EXPORT_SYMBOL(get_sync_clock);
369 * Make get_sync_clock return -EAGAIN.
371 static void disable_sync_clock(void *dummy)
373 atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
375 * Clear the in-sync bit 2^31. All get_sync_clock calls will
376 * fail until the sync bit is turned back on. In addition
377 * increase the "sequence" counter to avoid the race of an
378 * etr event and the complete recovery against get_sync_clock.
380 atomic_clear_mask(0x80000000, sw_ptr);
385 * Make get_sync_clock return 0 again.
386 * Needs to be called from a context disabled for preemption.
388 static void enable_sync_clock(void)
390 atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
391 atomic_set_mask(0x80000000, sw_ptr);
395 * Function to check if the clock is in sync.
397 static inline int check_sync_clock(void)
402 sw_ptr = &get_cpu_var(clock_sync_word);
403 rc = (atomic_read(sw_ptr) & 0x80000000U) != 0;
404 put_cpu_var(clock_sync_sync);
408 /* Single threaded workqueue used for etr and stp sync events */
409 static struct workqueue_struct *time_sync_wq;
411 static void __init time_init_wq(void)
415 time_sync_wq = create_singlethread_workqueue("timesync");
416 stop_machine_create();
420 * External Time Reference (ETR) code.
422 static int etr_port0_online;
423 static int etr_port1_online;
424 static int etr_steai_available;
426 static int __init early_parse_etr(char *p)
428 if (strncmp(p, "off", 3) == 0)
429 etr_port0_online = etr_port1_online = 0;
430 else if (strncmp(p, "port0", 5) == 0)
431 etr_port0_online = 1;
432 else if (strncmp(p, "port1", 5) == 0)
433 etr_port1_online = 1;
434 else if (strncmp(p, "on", 2) == 0)
435 etr_port0_online = etr_port1_online = 1;
438 early_param("etr", early_parse_etr);
441 ETR_EVENT_PORT0_CHANGE,
442 ETR_EVENT_PORT1_CHANGE,
443 ETR_EVENT_PORT_ALERT,
444 ETR_EVENT_SYNC_CHECK,
445 ETR_EVENT_SWITCH_LOCAL,
450 * Valid bit combinations of the eacr register are (x = don't care):
451 * e0 e1 dp p0 p1 ea es sl
452 * 0 0 x 0 0 0 0 0 initial, disabled state
453 * 0 0 x 0 1 1 0 0 port 1 online
454 * 0 0 x 1 0 1 0 0 port 0 online
455 * 0 0 x 1 1 1 0 0 both ports online
456 * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode
457 * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode
458 * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync
459 * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync
460 * 0 1 x 1 1 1 0 0 both ports online, port 1 usable
461 * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync
462 * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync
463 * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode
464 * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode
465 * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync
466 * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync
467 * 1 0 x 1 1 1 0 0 both ports online, port 0 usable
468 * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync
469 * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync
470 * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync
471 * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync
473 static struct etr_eacr etr_eacr;
474 static u64 etr_tolec; /* time of last eacr update */
475 static struct etr_aib etr_port0;
476 static int etr_port0_uptodate;
477 static struct etr_aib etr_port1;
478 static int etr_port1_uptodate;
479 static unsigned long etr_events;
480 static struct timer_list etr_timer;
482 static void etr_timeout(unsigned long dummy);
483 static void etr_work_fn(struct work_struct *work);
484 static DEFINE_MUTEX(etr_work_mutex);
485 static DECLARE_WORK(etr_work, etr_work_fn);
488 * Reset ETR attachment.
490 static void etr_reset(void)
492 etr_eacr = (struct etr_eacr) {
493 .e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0,
494 .p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0,
496 if (etr_setr(&etr_eacr) == 0) {
497 etr_tolec = get_clock();
498 set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags);
499 if (etr_port0_online && etr_port1_online)
500 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
501 } else if (etr_port0_online || etr_port1_online) {
502 pr_warning("The real or virtual hardware system does "
503 "not provide an ETR interface\n");
504 etr_port0_online = etr_port1_online = 0;
508 static int __init etr_init(void)
512 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
515 /* Check if this machine has the steai instruction. */
516 if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0)
517 etr_steai_available = 1;
518 setup_timer(&etr_timer, etr_timeout, 0UL);
519 if (etr_port0_online) {
520 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
521 queue_work(time_sync_wq, &etr_work);
523 if (etr_port1_online) {
524 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
525 queue_work(time_sync_wq, &etr_work);
530 arch_initcall(etr_init);
533 * Two sorts of ETR machine checks. The architecture reads:
534 * "When a machine-check niterruption occurs and if a switch-to-local or
535 * ETR-sync-check interrupt request is pending but disabled, this pending
536 * disabled interruption request is indicated and is cleared".
537 * Which means that we can get etr_switch_to_local events from the machine
538 * check handler although the interruption condition is disabled. Lovely..
542 * Switch to local machine check. This is called when the last usable
543 * ETR port goes inactive. After switch to local the clock is not in sync.
545 void etr_switch_to_local(void)
549 disable_sync_clock(NULL);
550 set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events);
551 queue_work(time_sync_wq, &etr_work);
555 * ETR sync check machine check. This is called when the ETR OTE and the
556 * local clock OTE are farther apart than the ETR sync check tolerance.
557 * After a ETR sync check the clock is not in sync. The machine check
558 * is broadcasted to all cpus at the same time.
560 void etr_sync_check(void)
564 disable_sync_clock(NULL);
565 set_bit(ETR_EVENT_SYNC_CHECK, &etr_events);
566 queue_work(time_sync_wq, &etr_work);
570 * ETR timing alert. There are two causes:
571 * 1) port state change, check the usability of the port
572 * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the
573 * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3)
574 * or ETR-data word 4 (edf4) has changed.
576 static void etr_timing_alert(struct etr_irq_parm *intparm)
579 /* ETR port 0 state change. */
580 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
582 /* ETR port 1 state change. */
583 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
586 * ETR port alert on either port 0, 1 or both.
587 * Both ports are not up-to-date now.
589 set_bit(ETR_EVENT_PORT_ALERT, &etr_events);
590 queue_work(time_sync_wq, &etr_work);
593 static void etr_timeout(unsigned long dummy)
595 set_bit(ETR_EVENT_UPDATE, &etr_events);
596 queue_work(time_sync_wq, &etr_work);
600 * Check if the etr mode is pss.
602 static inline int etr_mode_is_pps(struct etr_eacr eacr)
604 return eacr.es && !eacr.sl;
608 * Check if the etr mode is etr.
610 static inline int etr_mode_is_etr(struct etr_eacr eacr)
612 return eacr.es && eacr.sl;
616 * Check if the port can be used for TOD synchronization.
617 * For PPS mode the port has to receive OTEs. For ETR mode
618 * the port has to receive OTEs, the ETR stepping bit has to
619 * be zero and the validity bits for data frame 1, 2, and 3
622 static int etr_port_valid(struct etr_aib *aib, int port)
626 /* Check that this port is receiving OTEs. */
630 psc = port ? aib->esw.psc1 : aib->esw.psc0;
631 if (psc == etr_lpsc_pps_mode)
633 if (psc == etr_lpsc_operational_step)
634 return !aib->esw.y && aib->slsw.v1 &&
635 aib->slsw.v2 && aib->slsw.v3;
640 * Check if two ports are on the same network.
642 static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2)
644 // FIXME: any other fields we have to compare?
645 return aib1->edf1.net_id == aib2->edf1.net_id;
649 * Wrapper for etr_stei that converts physical port states
650 * to logical port states to be consistent with the output
651 * of stetr (see etr_psc vs. etr_lpsc).
653 static void etr_steai_cv(struct etr_aib *aib, unsigned int func)
655 BUG_ON(etr_steai(aib, func) != 0);
656 /* Convert port state to logical port state. */
657 if (aib->esw.psc0 == 1)
659 else if (aib->esw.psc0 == 0 && aib->esw.p == 0)
661 if (aib->esw.psc1 == 1)
663 else if (aib->esw.psc1 == 0 && aib->esw.p == 1)
668 * Check if the aib a2 is still connected to the same attachment as
669 * aib a1, the etv values differ by one and a2 is valid.
671 static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p)
673 int state_a1, state_a2;
675 /* Paranoia check: e0/e1 should better be the same. */
676 if (a1->esw.eacr.e0 != a2->esw.eacr.e0 ||
677 a1->esw.eacr.e1 != a2->esw.eacr.e1)
680 /* Still connected to the same etr ? */
681 state_a1 = p ? a1->esw.psc1 : a1->esw.psc0;
682 state_a2 = p ? a2->esw.psc1 : a2->esw.psc0;
683 if (state_a1 == etr_lpsc_operational_step) {
684 if (state_a2 != etr_lpsc_operational_step ||
685 a1->edf1.net_id != a2->edf1.net_id ||
686 a1->edf1.etr_id != a2->edf1.etr_id ||
687 a1->edf1.etr_pn != a2->edf1.etr_pn)
689 } else if (state_a2 != etr_lpsc_pps_mode)
692 /* The ETV value of a2 needs to be ETV of a1 + 1. */
693 if (a1->edf2.etv + 1 != a2->edf2.etv)
696 if (!etr_port_valid(a2, p))
702 struct clock_sync_data {
705 unsigned long long fixup_cc;
707 struct etr_aib *etr_aib;
710 static void clock_sync_cpu(struct clock_sync_data *sync)
712 atomic_dec(&sync->cpus);
715 * This looks like a busy wait loop but it isn't. etr_sync_cpus
716 * is called on all other cpus while the TOD clocks is stopped.
717 * __udelay will stop the cpu on an enabled wait psw until the
718 * TOD is running again.
720 while (sync->in_sync == 0) {
723 * A different cpu changes *in_sync. Therefore use
724 * barrier() to force memory access.
728 if (sync->in_sync != 1)
729 /* Didn't work. Clear per-cpu in sync bit again. */
730 disable_sync_clock(NULL);
732 * This round of TOD syncing is done. Set the clock comparator
733 * to the next tick and let the processor continue.
735 fixup_clock_comparator(sync->fixup_cc);
739 * Sync the TOD clock using the port refered to by aibp. This port
740 * has to be enabled and the other port has to be disabled. The
741 * last eacr update has to be more than 1.6 seconds in the past.
743 static int etr_sync_clock(void *data)
746 unsigned long long clock, old_clock, delay, delta;
747 struct clock_sync_data *etr_sync;
748 struct etr_aib *sync_port, *aib;
754 if (xchg(&first, 1) == 1) {
756 clock_sync_cpu(etr_sync);
760 /* Wait until all other cpus entered the sync function. */
761 while (atomic_read(&etr_sync->cpus) != 0)
764 port = etr_sync->etr_port;
765 aib = etr_sync->etr_aib;
766 sync_port = (port == 0) ? &etr_port0 : &etr_port1;
769 /* Set clock to next OTE. */
770 __ctl_set_bit(14, 21);
771 __ctl_set_bit(0, 29);
772 clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32;
773 old_clock = get_clock();
774 if (set_clock(clock) == 0) {
775 __udelay(1); /* Wait for the clock to start. */
776 __ctl_clear_bit(0, 29);
777 __ctl_clear_bit(14, 21);
779 /* Adjust Linux timing variables. */
780 delay = (unsigned long long)
781 (aib->edf2.etv - sync_port->edf2.etv) << 32;
782 delta = adjust_time(old_clock, clock, delay);
783 etr_sync->fixup_cc = delta;
784 fixup_clock_comparator(delta);
785 /* Verify that the clock is properly set. */
786 if (!etr_aib_follows(sync_port, aib, port)) {
788 disable_sync_clock(NULL);
789 etr_sync->in_sync = -EAGAIN;
792 etr_sync->in_sync = 1;
796 /* Could not set the clock ?!? */
797 __ctl_clear_bit(0, 29);
798 __ctl_clear_bit(14, 21);
799 disable_sync_clock(NULL);
800 etr_sync->in_sync = -EAGAIN;
807 static int etr_sync_clock_stop(struct etr_aib *aib, int port)
809 struct clock_sync_data etr_sync;
810 struct etr_aib *sync_port;
814 /* Check if the current aib is adjacent to the sync port aib. */
815 sync_port = (port == 0) ? &etr_port0 : &etr_port1;
816 follows = etr_aib_follows(sync_port, aib, port);
817 memcpy(sync_port, aib, sizeof(*aib));
820 memset(&etr_sync, 0, sizeof(etr_sync));
821 etr_sync.etr_aib = aib;
822 etr_sync.etr_port = port;
824 atomic_set(&etr_sync.cpus, num_online_cpus() - 1);
825 rc = stop_machine(etr_sync_clock, &etr_sync, &cpu_online_map);
831 * Handle the immediate effects of the different events.
832 * The port change event is used for online/offline changes.
834 static struct etr_eacr etr_handle_events(struct etr_eacr eacr)
836 if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events))
838 if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events))
839 eacr.es = eacr.sl = 0;
840 if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events))
841 etr_port0_uptodate = etr_port1_uptodate = 0;
843 if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) {
846 * Port change of an enabled port. We have to
847 * assume that this can have caused an stepping
850 etr_tolec = get_clock();
851 eacr.p0 = etr_port0_online;
854 etr_port0_uptodate = 0;
856 if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) {
859 * Port change of an enabled port. We have to
860 * assume that this can have caused an stepping
863 etr_tolec = get_clock();
864 eacr.p1 = etr_port1_online;
867 etr_port1_uptodate = 0;
869 clear_bit(ETR_EVENT_UPDATE, &etr_events);
874 * Set up a timer that expires after the etr_tolec + 1.6 seconds if
875 * one of the ports needs an update.
877 static void etr_set_tolec_timeout(unsigned long long now)
879 unsigned long micros;
881 if ((!etr_eacr.p0 || etr_port0_uptodate) &&
882 (!etr_eacr.p1 || etr_port1_uptodate))
884 micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0;
885 micros = (micros > 1600000) ? 0 : 1600000 - micros;
886 mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1);
890 * Set up a time that expires after 1/2 second.
892 static void etr_set_sync_timeout(void)
894 mod_timer(&etr_timer, jiffies + HZ/2);
898 * Update the aib information for one or both ports.
900 static struct etr_eacr etr_handle_update(struct etr_aib *aib,
901 struct etr_eacr eacr)
903 /* With both ports disabled the aib information is useless. */
904 if (!eacr.e0 && !eacr.e1)
907 /* Update port0 or port1 with aib stored in etr_work_fn. */
908 if (aib->esw.q == 0) {
909 /* Information for port 0 stored. */
910 if (eacr.p0 && !etr_port0_uptodate) {
912 if (etr_port0_online)
913 etr_port0_uptodate = 1;
916 /* Information for port 1 stored. */
917 if (eacr.p1 && !etr_port1_uptodate) {
919 if (etr_port0_online)
920 etr_port1_uptodate = 1;
925 * Do not try to get the alternate port aib if the clock
926 * is not in sync yet.
928 if (!check_sync_clock())
932 * If steai is available we can get the information about
933 * the other port immediately. If only stetr is available the
934 * data-port bit toggle has to be used.
936 if (etr_steai_available) {
937 if (eacr.p0 && !etr_port0_uptodate) {
938 etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0);
939 etr_port0_uptodate = 1;
941 if (eacr.p1 && !etr_port1_uptodate) {
942 etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1);
943 etr_port1_uptodate = 1;
947 * One port was updated above, if the other
948 * port is not uptodate toggle dp bit.
950 if ((eacr.p0 && !etr_port0_uptodate) ||
951 (eacr.p1 && !etr_port1_uptodate))
960 * Write new etr control register if it differs from the current one.
961 * Return 1 if etr_tolec has been updated as well.
963 static void etr_update_eacr(struct etr_eacr eacr)
967 if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0)
968 /* No change, return. */
971 * The disable of an active port of the change of the data port
972 * bit can/will cause a change in the data port.
974 dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 ||
975 (etr_eacr.dp ^ eacr.dp) != 0;
979 etr_tolec = get_clock();
983 * ETR work. In this function you'll find the main logic. In
984 * particular this is the only function that calls etr_update_eacr(),
985 * it "controls" the etr control register.
987 static void etr_work_fn(struct work_struct *work)
989 unsigned long long now;
990 struct etr_eacr eacr;
994 /* prevent multiple execution. */
995 mutex_lock(&etr_work_mutex);
997 /* Create working copy of etr_eacr. */
1000 /* Check for the different events and their immediate effects. */
1001 eacr = etr_handle_events(eacr);
1003 /* Check if ETR is supposed to be active. */
1004 eacr.ea = eacr.p0 || eacr.p1;
1006 /* Both ports offline. Reset everything. */
1007 eacr.dp = eacr.es = eacr.sl = 0;
1008 on_each_cpu(disable_sync_clock, NULL, 1);
1009 del_timer_sync(&etr_timer);
1010 etr_update_eacr(eacr);
1014 /* Store aib to get the current ETR status word. */
1015 BUG_ON(etr_stetr(&aib) != 0);
1016 etr_port0.esw = etr_port1.esw = aib.esw; /* Copy status word. */
1020 * Update the port information if the last stepping port change
1021 * or data port change is older than 1.6 seconds.
1023 if (now >= etr_tolec + (1600000 << 12))
1024 eacr = etr_handle_update(&aib, eacr);
1027 * Select ports to enable. The prefered synchronization mode is PPS.
1028 * If a port can be enabled depends on a number of things:
1029 * 1) The port needs to be online and uptodate. A port is not
1030 * disabled just because it is not uptodate, but it is only
1031 * enabled if it is uptodate.
1032 * 2) The port needs to have the same mode (pps / etr).
1033 * 3) The port needs to be usable -> etr_port_valid() == 1
1034 * 4) To enable the second port the clock needs to be in sync.
1035 * 5) If both ports are useable and are ETR ports, the network id
1036 * has to be the same.
1037 * The eacr.sl bit is used to indicate etr mode vs. pps mode.
1039 if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) {
1042 if (!etr_mode_is_pps(etr_eacr))
1044 if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode)
1046 // FIXME: uptodate checks ?
1047 else if (etr_port0_uptodate && etr_port1_uptodate)
1049 sync_port = (etr_port0_uptodate &&
1050 etr_port_valid(&etr_port0, 0)) ? 0 : -1;
1051 } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) {
1055 if (!etr_mode_is_pps(etr_eacr))
1057 sync_port = (etr_port1_uptodate &&
1058 etr_port_valid(&etr_port1, 1)) ? 1 : -1;
1059 } else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) {
1062 if (!etr_mode_is_etr(etr_eacr))
1064 if (!eacr.es || !eacr.p1 ||
1065 aib.esw.psc1 != etr_lpsc_operational_alt)
1067 else if (etr_port0_uptodate && etr_port1_uptodate &&
1068 etr_compare_network(&etr_port0, &etr_port1))
1070 sync_port = (etr_port0_uptodate &&
1071 etr_port_valid(&etr_port0, 0)) ? 0 : -1;
1072 } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) {
1076 if (!etr_mode_is_etr(etr_eacr))
1078 sync_port = (etr_port1_uptodate &&
1079 etr_port_valid(&etr_port1, 1)) ? 1 : -1;
1081 /* Both ports not usable. */
1082 eacr.es = eacr.sl = 0;
1087 * If the clock is in sync just update the eacr and return.
1088 * If there is no valid sync port wait for a port update.
1090 if (check_sync_clock() || sync_port < 0) {
1091 etr_update_eacr(eacr);
1092 etr_set_tolec_timeout(now);
1097 * Prepare control register for clock syncing
1098 * (reset data port bit, set sync check control.
1104 * Update eacr and try to synchronize the clock. If the update
1105 * of eacr caused a stepping port switch (or if we have to
1106 * assume that a stepping port switch has occured) or the
1107 * clock syncing failed, reset the sync check control bit
1108 * and set up a timer to try again after 0.5 seconds
1110 etr_update_eacr(eacr);
1111 if (now < etr_tolec + (1600000 << 12) ||
1112 etr_sync_clock_stop(&aib, sync_port) != 0) {
1113 /* Sync failed. Try again in 1/2 second. */
1115 etr_update_eacr(eacr);
1116 etr_set_sync_timeout();
1118 etr_set_tolec_timeout(now);
1120 mutex_unlock(&etr_work_mutex);
1124 * Sysfs interface functions
1126 static struct sysdev_class etr_sysclass = {
1130 static struct sys_device etr_port0_dev = {
1132 .cls = &etr_sysclass,
1135 static struct sys_device etr_port1_dev = {
1137 .cls = &etr_sysclass,
1141 * ETR class attributes
1143 static ssize_t etr_stepping_port_show(struct sysdev_class *class, char *buf)
1145 return sprintf(buf, "%i\n", etr_port0.esw.p);
1148 static SYSDEV_CLASS_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL);
1150 static ssize_t etr_stepping_mode_show(struct sysdev_class *class, char *buf)
1154 if (etr_mode_is_pps(etr_eacr))
1156 else if (etr_mode_is_etr(etr_eacr))
1160 return sprintf(buf, "%s\n", mode_str);
1163 static SYSDEV_CLASS_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL);
1166 * ETR port attributes
1168 static inline struct etr_aib *etr_aib_from_dev(struct sys_device *dev)
1170 if (dev == &etr_port0_dev)
1171 return etr_port0_online ? &etr_port0 : NULL;
1173 return etr_port1_online ? &etr_port1 : NULL;
1176 static ssize_t etr_online_show(struct sys_device *dev,
1177 struct sysdev_attribute *attr,
1180 unsigned int online;
1182 online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online;
1183 return sprintf(buf, "%i\n", online);
1186 static ssize_t etr_online_store(struct sys_device *dev,
1187 struct sysdev_attribute *attr,
1188 const char *buf, size_t count)
1192 value = simple_strtoul(buf, NULL, 0);
1193 if (value != 0 && value != 1)
1195 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
1197 mutex_lock(&clock_sync_mutex);
1198 if (dev == &etr_port0_dev) {
1199 if (etr_port0_online == value)
1200 goto out; /* Nothing to do. */
1201 etr_port0_online = value;
1202 if (etr_port0_online && etr_port1_online)
1203 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1205 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1206 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
1207 queue_work(time_sync_wq, &etr_work);
1209 if (etr_port1_online == value)
1210 goto out; /* Nothing to do. */
1211 etr_port1_online = value;
1212 if (etr_port0_online && etr_port1_online)
1213 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1215 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1216 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
1217 queue_work(time_sync_wq, &etr_work);
1220 mutex_unlock(&clock_sync_mutex);
1224 static SYSDEV_ATTR(online, 0600, etr_online_show, etr_online_store);
1226 static ssize_t etr_stepping_control_show(struct sys_device *dev,
1227 struct sysdev_attribute *attr,
1230 return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
1231 etr_eacr.e0 : etr_eacr.e1);
1234 static SYSDEV_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL);
1236 static ssize_t etr_mode_code_show(struct sys_device *dev,
1237 struct sysdev_attribute *attr, char *buf)
1239 if (!etr_port0_online && !etr_port1_online)
1240 /* Status word is not uptodate if both ports are offline. */
1242 return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
1243 etr_port0.esw.psc0 : etr_port0.esw.psc1);
1246 static SYSDEV_ATTR(state_code, 0400, etr_mode_code_show, NULL);
1248 static ssize_t etr_untuned_show(struct sys_device *dev,
1249 struct sysdev_attribute *attr, char *buf)
1251 struct etr_aib *aib = etr_aib_from_dev(dev);
1253 if (!aib || !aib->slsw.v1)
1255 return sprintf(buf, "%i\n", aib->edf1.u);
1258 static SYSDEV_ATTR(untuned, 0400, etr_untuned_show, NULL);
1260 static ssize_t etr_network_id_show(struct sys_device *dev,
1261 struct sysdev_attribute *attr, char *buf)
1263 struct etr_aib *aib = etr_aib_from_dev(dev);
1265 if (!aib || !aib->slsw.v1)
1267 return sprintf(buf, "%i\n", aib->edf1.net_id);
1270 static SYSDEV_ATTR(network, 0400, etr_network_id_show, NULL);
1272 static ssize_t etr_id_show(struct sys_device *dev,
1273 struct sysdev_attribute *attr, char *buf)
1275 struct etr_aib *aib = etr_aib_from_dev(dev);
1277 if (!aib || !aib->slsw.v1)
1279 return sprintf(buf, "%i\n", aib->edf1.etr_id);
1282 static SYSDEV_ATTR(id, 0400, etr_id_show, NULL);
1284 static ssize_t etr_port_number_show(struct sys_device *dev,
1285 struct sysdev_attribute *attr, char *buf)
1287 struct etr_aib *aib = etr_aib_from_dev(dev);
1289 if (!aib || !aib->slsw.v1)
1291 return sprintf(buf, "%i\n", aib->edf1.etr_pn);
1294 static SYSDEV_ATTR(port, 0400, etr_port_number_show, NULL);
1296 static ssize_t etr_coupled_show(struct sys_device *dev,
1297 struct sysdev_attribute *attr, char *buf)
1299 struct etr_aib *aib = etr_aib_from_dev(dev);
1301 if (!aib || !aib->slsw.v3)
1303 return sprintf(buf, "%i\n", aib->edf3.c);
1306 static SYSDEV_ATTR(coupled, 0400, etr_coupled_show, NULL);
1308 static ssize_t etr_local_time_show(struct sys_device *dev,
1309 struct sysdev_attribute *attr, char *buf)
1311 struct etr_aib *aib = etr_aib_from_dev(dev);
1313 if (!aib || !aib->slsw.v3)
1315 return sprintf(buf, "%i\n", aib->edf3.blto);
1318 static SYSDEV_ATTR(local_time, 0400, etr_local_time_show, NULL);
1320 static ssize_t etr_utc_offset_show(struct sys_device *dev,
1321 struct sysdev_attribute *attr, char *buf)
1323 struct etr_aib *aib = etr_aib_from_dev(dev);
1325 if (!aib || !aib->slsw.v3)
1327 return sprintf(buf, "%i\n", aib->edf3.buo);
1330 static SYSDEV_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL);
1332 static struct sysdev_attribute *etr_port_attributes[] = {
1334 &attr_stepping_control,
1346 static int __init etr_register_port(struct sys_device *dev)
1348 struct sysdev_attribute **attr;
1351 rc = sysdev_register(dev);
1354 for (attr = etr_port_attributes; *attr; attr++) {
1355 rc = sysdev_create_file(dev, *attr);
1361 for (; attr >= etr_port_attributes; attr--)
1362 sysdev_remove_file(dev, *attr);
1363 sysdev_unregister(dev);
1368 static void __init etr_unregister_port(struct sys_device *dev)
1370 struct sysdev_attribute **attr;
1372 for (attr = etr_port_attributes; *attr; attr++)
1373 sysdev_remove_file(dev, *attr);
1374 sysdev_unregister(dev);
1377 static int __init etr_init_sysfs(void)
1381 rc = sysdev_class_register(&etr_sysclass);
1384 rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_port);
1386 goto out_unreg_class;
1387 rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_mode);
1389 goto out_remove_stepping_port;
1390 rc = etr_register_port(&etr_port0_dev);
1392 goto out_remove_stepping_mode;
1393 rc = etr_register_port(&etr_port1_dev);
1395 goto out_remove_port0;
1399 etr_unregister_port(&etr_port0_dev);
1400 out_remove_stepping_mode:
1401 sysdev_class_remove_file(&etr_sysclass, &attr_stepping_mode);
1402 out_remove_stepping_port:
1403 sysdev_class_remove_file(&etr_sysclass, &attr_stepping_port);
1405 sysdev_class_unregister(&etr_sysclass);
1410 device_initcall(etr_init_sysfs);
1413 * Server Time Protocol (STP) code.
1415 static int stp_online;
1416 static struct stp_sstpi stp_info;
1417 static void *stp_page;
1419 static void stp_work_fn(struct work_struct *work);
1420 static DEFINE_MUTEX(stp_work_mutex);
1421 static DECLARE_WORK(stp_work, stp_work_fn);
1422 static struct timer_list stp_timer;
1424 static int __init early_parse_stp(char *p)
1426 if (strncmp(p, "off", 3) == 0)
1428 else if (strncmp(p, "on", 2) == 0)
1432 early_param("stp", early_parse_stp);
1435 * Reset STP attachment.
1437 static void __init stp_reset(void)
1441 stp_page = (void *) get_zeroed_page(GFP_ATOMIC);
1442 rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
1444 set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags);
1445 else if (stp_online) {
1446 pr_warning("The real or virtual hardware system does "
1447 "not provide an STP interface\n");
1448 free_page((unsigned long) stp_page);
1454 static void stp_timeout(unsigned long dummy)
1456 queue_work(time_sync_wq, &stp_work);
1459 static int __init stp_init(void)
1461 if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
1463 setup_timer(&stp_timer, stp_timeout, 0UL);
1467 queue_work(time_sync_wq, &stp_work);
1471 arch_initcall(stp_init);
1474 * STP timing alert. There are three causes:
1475 * 1) timing status change
1476 * 2) link availability change
1477 * 3) time control parameter change
1478 * In all three cases we are only interested in the clock source state.
1479 * If a STP clock source is now available use it.
1481 static void stp_timing_alert(struct stp_irq_parm *intparm)
1483 if (intparm->tsc || intparm->lac || intparm->tcpc)
1484 queue_work(time_sync_wq, &stp_work);
1488 * STP sync check machine check. This is called when the timing state
1489 * changes from the synchronized state to the unsynchronized state.
1490 * After a STP sync check the clock is not in sync. The machine check
1491 * is broadcasted to all cpus at the same time.
1493 void stp_sync_check(void)
1495 disable_sync_clock(NULL);
1496 queue_work(time_sync_wq, &stp_work);
1500 * STP island condition machine check. This is called when an attached
1501 * server attempts to communicate over an STP link and the servers
1502 * have matching CTN ids and have a valid stratum-1 configuration
1503 * but the configurations do not match.
1505 void stp_island_check(void)
1507 disable_sync_clock(NULL);
1508 queue_work(time_sync_wq, &stp_work);
1512 static int stp_sync_clock(void *data)
1515 unsigned long long old_clock, delta;
1516 struct clock_sync_data *stp_sync;
1521 if (xchg(&first, 1) == 1) {
1523 clock_sync_cpu(stp_sync);
1527 /* Wait until all other cpus entered the sync function. */
1528 while (atomic_read(&stp_sync->cpus) != 0)
1531 enable_sync_clock();
1534 if (stp_info.todoff[0] || stp_info.todoff[1] ||
1535 stp_info.todoff[2] || stp_info.todoff[3] ||
1536 stp_info.tmd != 2) {
1537 old_clock = get_clock();
1538 rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0);
1540 delta = adjust_time(old_clock, get_clock(), 0);
1541 fixup_clock_comparator(delta);
1542 rc = chsc_sstpi(stp_page, &stp_info,
1543 sizeof(struct stp_sstpi));
1544 if (rc == 0 && stp_info.tmd != 2)
1549 disable_sync_clock(NULL);
1550 stp_sync->in_sync = -EAGAIN;
1552 stp_sync->in_sync = 1;
1558 * STP work. Check for the STP state and take over the clock
1559 * synchronization if the STP clock source is usable.
1561 static void stp_work_fn(struct work_struct *work)
1563 struct clock_sync_data stp_sync;
1566 /* prevent multiple execution. */
1567 mutex_lock(&stp_work_mutex);
1570 chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
1571 del_timer_sync(&stp_timer);
1575 rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0);
1579 rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi));
1580 if (rc || stp_info.c == 0)
1583 /* Skip synchronization if the clock is already in sync. */
1584 if (check_sync_clock())
1587 memset(&stp_sync, 0, sizeof(stp_sync));
1589 atomic_set(&stp_sync.cpus, num_online_cpus() - 1);
1590 stop_machine(stp_sync_clock, &stp_sync, &cpu_online_map);
1593 if (!check_sync_clock())
1595 * There is a usable clock but the synchonization failed.
1596 * Retry after a second.
1598 mod_timer(&stp_timer, jiffies + HZ);
1601 mutex_unlock(&stp_work_mutex);
1605 * STP class sysfs interface functions
1607 static struct sysdev_class stp_sysclass = {
1611 static ssize_t stp_ctn_id_show(struct sysdev_class *class, char *buf)
1615 return sprintf(buf, "%016llx\n",
1616 *(unsigned long long *) stp_info.ctnid);
1619 static SYSDEV_CLASS_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL);
1621 static ssize_t stp_ctn_type_show(struct sysdev_class *class, char *buf)
1625 return sprintf(buf, "%i\n", stp_info.ctn);
1628 static SYSDEV_CLASS_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL);
1630 static ssize_t stp_dst_offset_show(struct sysdev_class *class, char *buf)
1632 if (!stp_online || !(stp_info.vbits & 0x2000))
1634 return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto);
1637 static SYSDEV_CLASS_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL);
1639 static ssize_t stp_leap_seconds_show(struct sysdev_class *class, char *buf)
1641 if (!stp_online || !(stp_info.vbits & 0x8000))
1643 return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps);
1646 static SYSDEV_CLASS_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL);
1648 static ssize_t stp_stratum_show(struct sysdev_class *class, char *buf)
1652 return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum);
1655 static SYSDEV_CLASS_ATTR(stratum, 0400, stp_stratum_show, NULL);
1657 static ssize_t stp_time_offset_show(struct sysdev_class *class, char *buf)
1659 if (!stp_online || !(stp_info.vbits & 0x0800))
1661 return sprintf(buf, "%i\n", (int) stp_info.tto);
1664 static SYSDEV_CLASS_ATTR(time_offset, 0400, stp_time_offset_show, NULL);
1666 static ssize_t stp_time_zone_offset_show(struct sysdev_class *class, char *buf)
1668 if (!stp_online || !(stp_info.vbits & 0x4000))
1670 return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo);
1673 static SYSDEV_CLASS_ATTR(time_zone_offset, 0400,
1674 stp_time_zone_offset_show, NULL);
1676 static ssize_t stp_timing_mode_show(struct sysdev_class *class, char *buf)
1680 return sprintf(buf, "%i\n", stp_info.tmd);
1683 static SYSDEV_CLASS_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL);
1685 static ssize_t stp_timing_state_show(struct sysdev_class *class, char *buf)
1689 return sprintf(buf, "%i\n", stp_info.tst);
1692 static SYSDEV_CLASS_ATTR(timing_state, 0400, stp_timing_state_show, NULL);
1694 static ssize_t stp_online_show(struct sysdev_class *class, char *buf)
1696 return sprintf(buf, "%i\n", stp_online);
1699 static ssize_t stp_online_store(struct sysdev_class *class,
1700 const char *buf, size_t count)
1704 value = simple_strtoul(buf, NULL, 0);
1705 if (value != 0 && value != 1)
1707 if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
1709 mutex_lock(&clock_sync_mutex);
1712 set_bit(CLOCK_SYNC_STP, &clock_sync_flags);
1714 clear_bit(CLOCK_SYNC_STP, &clock_sync_flags);
1715 queue_work(time_sync_wq, &stp_work);
1716 mutex_unlock(&clock_sync_mutex);
1721 * Can't use SYSDEV_CLASS_ATTR because the attribute should be named
1722 * stp/online but attr_online already exists in this file ..
1724 static struct sysdev_class_attribute attr_stp_online = {
1725 .attr = { .name = "online", .mode = 0600 },
1726 .show = stp_online_show,
1727 .store = stp_online_store,
1730 static struct sysdev_class_attribute *stp_attributes[] = {
1738 &attr_time_zone_offset,
1744 static int __init stp_init_sysfs(void)
1746 struct sysdev_class_attribute **attr;
1749 rc = sysdev_class_register(&stp_sysclass);
1752 for (attr = stp_attributes; *attr; attr++) {
1753 rc = sysdev_class_create_file(&stp_sysclass, *attr);
1759 for (; attr >= stp_attributes; attr--)
1760 sysdev_class_remove_file(&stp_sysclass, *attr);
1761 sysdev_class_unregister(&stp_sysclass);
1766 device_initcall(stp_init_sysfs);