5 * TLB flushing on s390 is complicated. The following requirement
6 * from the principles of operation is the most arduous:
8 * "A valid table entry must not be changed while it is attached
9 * to any CPU and may be used for translation by that CPU except to
10 * (1) invalidate the entry by using INVALIDATE PAGE TABLE ENTRY,
11 * or INVALIDATE DAT TABLE ENTRY, (2) alter bits 56-63 of a page
12 * table entry, or (3) make a change by means of a COMPARE AND SWAP
13 * AND PURGE instruction that purges the TLB."
15 * The modification of a pte of an active mm struct therefore is
16 * a two step process: i) invalidate the pte, ii) store the new pte.
17 * This is true for the page protection bit as well.
18 * The only possible optimization is to flush at the beginning of
19 * a tlb_gather_mmu cycle if the mm_struct is currently not in use.
21 * Pages used for the page tables is a different story. FIXME: more
25 #include <linux/pagemap.h>
26 #include <linux/swap.h>
27 #include <asm/processor.h>
28 #include <asm/pgalloc.h>
29 #include <asm/tlbflush.h>
33 struct mmu_table_batch *batch;
35 unsigned long start, end;
38 struct mmu_table_batch {
44 #define MAX_TABLE_BATCH \
45 ((PAGE_SIZE - sizeof(struct mmu_table_batch)) / sizeof(void *))
47 extern void tlb_table_flush(struct mmu_gather *tlb);
48 extern void tlb_remove_table(struct mmu_gather *tlb, void *table);
50 static inline void tlb_gather_mmu(struct mmu_gather *tlb,
58 tlb->fullmm = !(start | (end+1));
64 static inline void tlb_flush_mmu(struct mmu_gather *tlb)
69 static inline void tlb_finish_mmu(struct mmu_gather *tlb,
70 unsigned long start, unsigned long end)
76 * Release the page cache reference for a pte removed by
77 * tlb_ptep_clear_flush. In both flush modes the tlb for a page cache page
78 * has already been freed, so just do free_page_and_swap_cache.
80 static inline int __tlb_remove_page(struct mmu_gather *tlb, struct page *page)
82 free_page_and_swap_cache(page);
83 return 1; /* avoid calling tlb_flush_mmu */
86 static inline void tlb_remove_page(struct mmu_gather *tlb, struct page *page)
88 free_page_and_swap_cache(page);
92 * pte_free_tlb frees a pte table and clears the CRSTE for the
93 * page table from the tlb.
95 static inline void pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte,
96 unsigned long address)
99 return page_table_free_rcu(tlb, (unsigned long *) pte);
100 page_table_free(tlb->mm, (unsigned long *) pte);
104 * pmd_free_tlb frees a pmd table and clears the CRSTE for the
105 * segment table entry from the tlb.
106 * If the mm uses a two level page table the single pmd is freed
107 * as the pgd. pmd_free_tlb checks the asce_limit against 2GB
108 * to avoid the double free of the pmd in this case.
110 static inline void pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd,
111 unsigned long address)
114 if (tlb->mm->context.asce_limit <= (1UL << 31))
117 return tlb_remove_table(tlb, pmd);
118 crst_table_free(tlb->mm, (unsigned long *) pmd);
123 * pud_free_tlb frees a pud table and clears the CRSTE for the
124 * region third table entry from the tlb.
125 * If the mm uses a three level page table the single pud is freed
126 * as the pgd. pud_free_tlb checks the asce_limit against 4TB
127 * to avoid the double free of the pud in this case.
129 static inline void pud_free_tlb(struct mmu_gather *tlb, pud_t *pud,
130 unsigned long address)
133 if (tlb->mm->context.asce_limit <= (1UL << 42))
136 return tlb_remove_table(tlb, pud);
137 crst_table_free(tlb->mm, (unsigned long *) pud);
141 #define tlb_start_vma(tlb, vma) do { } while (0)
142 #define tlb_end_vma(tlb, vma) do { } while (0)
143 #define tlb_remove_tlb_entry(tlb, ptep, addr) do { } while (0)
144 #define tlb_remove_pmd_tlb_entry(tlb, pmdp, addr) do { } while (0)
145 #define tlb_migrate_finish(mm) do { } while (0)
147 #endif /* _S390_TLB_H */