2 * Copyright (c) 2000 Mike Corrigan <mikejc@us.ibm.com>
3 * Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
5 * Module name: iSeries_setup.c
8 * Architecture- / platform-specific boot-time initialization code for
9 * the IBM iSeries LPAR. Adapted from original code by Grant Erickson and
10 * code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License
15 * as published by the Free Software Foundation; either version
16 * 2 of the License, or (at your option) any later version.
21 #include <linux/config.h>
22 #include <linux/init.h>
23 #include <linux/threads.h>
24 #include <linux/smp.h>
25 #include <linux/param.h>
26 #include <linux/string.h>
27 #include <linux/bootmem.h>
28 #include <linux/initrd.h>
29 #include <linux/seq_file.h>
30 #include <linux/kdev_t.h>
31 #include <linux/major.h>
32 #include <linux/root_dev.h>
34 #include <asm/processor.h>
35 #include <asm/machdep.h>
38 #include <asm/pgtable.h>
39 #include <asm/mmu_context.h>
40 #include <asm/cputable.h>
41 #include <asm/sections.h>
42 #include <asm/iommu.h>
45 #include "iSeries_setup.h"
48 #include <asm/cache.h>
49 #include <asm/sections.h>
50 #include <asm/abs_addr.h>
51 #include <asm/iSeries/HvCallHpt.h>
52 #include <asm/iSeries/HvLpConfig.h>
53 #include <asm/iSeries/HvCallEvent.h>
54 #include <asm/iSeries/HvCallSm.h>
55 #include <asm/iSeries/HvCallXm.h>
56 #include <asm/iSeries/ItLpQueue.h>
57 #include <asm/iSeries/IoHriMainStore.h>
58 #include <asm/iSeries/mf.h>
59 #include <asm/iSeries/HvLpEvent.h>
60 #include <asm/iSeries/iSeries_irq.h>
61 #include <asm/iSeries/IoHriProcessorVpd.h>
62 #include <asm/iSeries/ItVpdAreas.h>
63 #include <asm/iSeries/LparMap.h>
65 extern void hvlog(char *fmt, ...);
68 #define DBG(fmt...) hvlog(fmt)
73 /* Function Prototypes */
74 extern void ppcdbg_initialize(void);
76 static void build_iSeries_Memory_Map(void);
77 static void setup_iSeries_cache_sizes(void);
78 static void iSeries_bolt_kernel(unsigned long saddr, unsigned long eaddr);
80 extern void iSeries_pci_final_fixup(void);
82 static void iSeries_pci_final_fixup(void) { }
85 /* Global Variables */
86 static unsigned long procFreqHz;
87 static unsigned long procFreqMhz;
88 static unsigned long procFreqMhzHundreths;
90 static unsigned long tbFreqHz;
91 static unsigned long tbFreqMhz;
92 static unsigned long tbFreqMhzHundreths;
94 int piranha_simulator;
96 extern int rd_size; /* Defined in drivers/block/rd.c */
97 extern unsigned long klimit;
98 extern unsigned long embedded_sysmap_start;
99 extern unsigned long embedded_sysmap_end;
101 extern unsigned long iSeries_recal_tb;
102 extern unsigned long iSeries_recal_titan;
104 static int mf_initialized;
107 unsigned long absStart;
108 unsigned long absEnd;
109 unsigned long logicalStart;
110 unsigned long logicalEnd;
114 * Process the main store vpd to determine where the holes in memory are
115 * and return the number of physical blocks and fill in the array of
118 static unsigned long iSeries_process_Condor_mainstore_vpd(
119 struct MemoryBlock *mb_array, unsigned long max_entries)
121 unsigned long holeFirstChunk, holeSizeChunks;
122 unsigned long numMemoryBlocks = 1;
123 struct IoHriMainStoreSegment4 *msVpd =
124 (struct IoHriMainStoreSegment4 *)xMsVpd;
125 unsigned long holeStart = msVpd->nonInterleavedBlocksStartAdr;
126 unsigned long holeEnd = msVpd->nonInterleavedBlocksEndAdr;
127 unsigned long holeSize = holeEnd - holeStart;
129 printk("Mainstore_VPD: Condor\n");
131 * Determine if absolute memory has any
132 * holes so that we can interpret the
133 * access map we get back from the hypervisor
136 mb_array[0].logicalStart = 0;
137 mb_array[0].logicalEnd = 0x100000000;
138 mb_array[0].absStart = 0;
139 mb_array[0].absEnd = 0x100000000;
143 holeStart = holeStart & 0x000fffffffffffff;
144 holeStart = addr_to_chunk(holeStart);
145 holeFirstChunk = holeStart;
146 holeSize = addr_to_chunk(holeSize);
147 holeSizeChunks = holeSize;
148 printk( "Main store hole: start chunk = %0lx, size = %0lx chunks\n",
149 holeFirstChunk, holeSizeChunks );
150 mb_array[0].logicalEnd = holeFirstChunk;
151 mb_array[0].absEnd = holeFirstChunk;
152 mb_array[1].logicalStart = holeFirstChunk;
153 mb_array[1].logicalEnd = 0x100000000 - holeSizeChunks;
154 mb_array[1].absStart = holeFirstChunk + holeSizeChunks;
155 mb_array[1].absEnd = 0x100000000;
157 return numMemoryBlocks;
160 #define MaxSegmentAreas 32
161 #define MaxSegmentAdrRangeBlocks 128
162 #define MaxAreaRangeBlocks 4
164 static unsigned long iSeries_process_Regatta_mainstore_vpd(
165 struct MemoryBlock *mb_array, unsigned long max_entries)
167 struct IoHriMainStoreSegment5 *msVpdP =
168 (struct IoHriMainStoreSegment5 *)xMsVpd;
169 unsigned long numSegmentBlocks = 0;
170 u32 existsBits = msVpdP->msAreaExists;
171 unsigned long area_num;
173 printk("Mainstore_VPD: Regatta\n");
175 for (area_num = 0; area_num < MaxSegmentAreas; ++area_num ) {
176 unsigned long numAreaBlocks;
177 struct IoHriMainStoreArea4 *currentArea;
179 if (existsBits & 0x80000000) {
180 unsigned long block_num;
182 currentArea = &msVpdP->msAreaArray[area_num];
183 numAreaBlocks = currentArea->numAdrRangeBlocks;
184 printk("ms_vpd: processing area %2ld blocks=%ld",
185 area_num, numAreaBlocks);
186 for (block_num = 0; block_num < numAreaBlocks;
188 /* Process an address range block */
189 struct MemoryBlock tempBlock;
193 (unsigned long)currentArea->xAdrRangeBlock[block_num].blockStart;
195 (unsigned long)currentArea->xAdrRangeBlock[block_num].blockEnd;
196 tempBlock.logicalStart = 0;
197 tempBlock.logicalEnd = 0;
198 printk("\n block %ld absStart=%016lx absEnd=%016lx",
199 block_num, tempBlock.absStart,
202 for (i = 0; i < numSegmentBlocks; ++i) {
203 if (mb_array[i].absStart ==
207 if (i == numSegmentBlocks) {
208 if (numSegmentBlocks == max_entries)
209 panic("iSeries_process_mainstore_vpd: too many memory blocks");
210 mb_array[numSegmentBlocks] = tempBlock;
213 printk(" (duplicate)");
219 /* Now sort the blocks found into ascending sequence */
220 if (numSegmentBlocks > 1) {
223 for (m = 0; m < numSegmentBlocks - 1; ++m) {
224 for (n = numSegmentBlocks - 1; m < n; --n) {
225 if (mb_array[n].absStart <
226 mb_array[n-1].absStart) {
227 struct MemoryBlock tempBlock;
229 tempBlock = mb_array[n];
230 mb_array[n] = mb_array[n-1];
231 mb_array[n-1] = tempBlock;
237 * Assign "logical" addresses to each block. These
238 * addresses correspond to the hypervisor "bitmap" space.
239 * Convert all addresses into units of 256K chunks.
242 unsigned long i, nextBitmapAddress;
244 printk("ms_vpd: %ld sorted memory blocks\n", numSegmentBlocks);
245 nextBitmapAddress = 0;
246 for (i = 0; i < numSegmentBlocks; ++i) {
247 unsigned long length = mb_array[i].absEnd -
248 mb_array[i].absStart;
250 mb_array[i].logicalStart = nextBitmapAddress;
251 mb_array[i].logicalEnd = nextBitmapAddress + length;
252 nextBitmapAddress += length;
253 printk(" Bitmap range: %016lx - %016lx\n"
254 " Absolute range: %016lx - %016lx\n",
255 mb_array[i].logicalStart,
256 mb_array[i].logicalEnd,
257 mb_array[i].absStart, mb_array[i].absEnd);
258 mb_array[i].absStart = addr_to_chunk(mb_array[i].absStart &
260 mb_array[i].absEnd = addr_to_chunk(mb_array[i].absEnd &
262 mb_array[i].logicalStart =
263 addr_to_chunk(mb_array[i].logicalStart);
264 mb_array[i].logicalEnd = addr_to_chunk(mb_array[i].logicalEnd);
268 return numSegmentBlocks;
271 static unsigned long iSeries_process_mainstore_vpd(struct MemoryBlock *mb_array,
272 unsigned long max_entries)
275 unsigned long mem_blocks = 0;
277 if (cpu_has_feature(CPU_FTR_SLB))
278 mem_blocks = iSeries_process_Regatta_mainstore_vpd(mb_array,
281 mem_blocks = iSeries_process_Condor_mainstore_vpd(mb_array,
284 printk("Mainstore_VPD: numMemoryBlocks = %ld \n", mem_blocks);
285 for (i = 0; i < mem_blocks; ++i) {
286 printk("Mainstore_VPD: block %3ld logical chunks %016lx - %016lx\n"
287 " abs chunks %016lx - %016lx\n",
288 i, mb_array[i].logicalStart, mb_array[i].logicalEnd,
289 mb_array[i].absStart, mb_array[i].absEnd);
294 static void __init iSeries_get_cmdline(void)
298 /* copy the command line parameter from the primary VSP */
299 HvCallEvent_dmaToSp(cmd_line, 2 * 64* 1024, 256,
300 HvLpDma_Direction_RemoteToLocal);
305 if (!*p || *p == '\n')
312 static void __init iSeries_init_early(void)
314 extern unsigned long memory_limit;
316 DBG(" -> iSeries_init_early()\n");
320 #if defined(CONFIG_BLK_DEV_INITRD)
322 * If the init RAM disk has been configured and there is
323 * a non-zero starting address for it, set it up
326 initrd_start = (unsigned long)__va(naca.xRamDisk);
327 initrd_end = initrd_start + naca.xRamDiskSize * PAGE_SIZE;
328 initrd_below_start_ok = 1; // ramdisk in kernel space
329 ROOT_DEV = Root_RAM0;
330 if (((rd_size * 1024) / PAGE_SIZE) < naca.xRamDiskSize)
331 rd_size = (naca.xRamDiskSize * PAGE_SIZE) / 1024;
333 #endif /* CONFIG_BLK_DEV_INITRD */
335 /* ROOT_DEV = MKDEV(VIODASD_MAJOR, 1); */
338 iSeries_recal_tb = get_tb();
339 iSeries_recal_titan = HvCallXm_loadTod();
342 * Cache sizes must be initialized before hpte_init_iSeries is called
343 * as the later need them for flush_icache_range()
345 setup_iSeries_cache_sizes();
348 * Initialize the hash table management pointers
353 * Initialize the DMA/TCE management
355 iommu_init_early_iSeries();
358 * Initialize the table which translate Linux physical addresses to
359 * AS/400 absolute addresses
361 build_iSeries_Memory_Map();
363 iSeries_get_cmdline();
365 /* Save unparsed command line copy for /proc/cmdline */
366 strlcpy(saved_command_line, cmd_line, COMMAND_LINE_SIZE);
368 /* Parse early parameters, in particular mem=x */
372 if (memory_limit < systemcfg->physicalMemorySize)
373 systemcfg->physicalMemorySize = memory_limit;
375 printk("Ignoring mem=%lu >= ram_top.\n", memory_limit);
380 /* Bolt kernel mappings for all of memory (or just a bit if we've got a limit) */
381 iSeries_bolt_kernel(0, systemcfg->physicalMemorySize);
384 lmb_add(0, systemcfg->physicalMemorySize);
386 lmb_reserve(0, __pa(klimit));
388 /* Initialize machine-dependency vectors */
392 if (itLpNaca.xPirEnvironMode == 0)
393 piranha_simulator = 1;
395 /* Associate Lp Event Queue 0 with processor 0 */
396 HvCallEvent_setLpEventQueueInterruptProc(0, 0);
402 /* If we were passed an initrd, set the ROOT_DEV properly if the values
403 * look sensible. If not, clear initrd reference.
405 #ifdef CONFIG_BLK_DEV_INITRD
406 if (initrd_start >= KERNELBASE && initrd_end >= KERNELBASE &&
407 initrd_end > initrd_start)
408 ROOT_DEV = Root_RAM0;
410 initrd_start = initrd_end = 0;
411 #endif /* CONFIG_BLK_DEV_INITRD */
413 DBG(" <- iSeries_init_early()\n");
417 * The iSeries may have very large memories ( > 128 GB ) and a partition
418 * may get memory in "chunks" that may be anywhere in the 2**52 real
419 * address space. The chunks are 256K in size. To map this to the
420 * memory model Linux expects, the AS/400 specific code builds a
421 * translation table to translate what Linux thinks are "physical"
422 * addresses to the actual real addresses. This allows us to make
423 * it appear to Linux that we have contiguous memory starting at
424 * physical address zero while in fact this could be far from the truth.
425 * To avoid confusion, I'll let the words physical and/or real address
426 * apply to the Linux addresses while I'll use "absolute address" to
427 * refer to the actual hardware real address.
429 * build_iSeries_Memory_Map gets information from the Hypervisor and
430 * looks at the Main Store VPD to determine the absolute addresses
431 * of the memory that has been assigned to our partition and builds
432 * a table used to translate Linux's physical addresses to these
433 * absolute addresses. Absolute addresses are needed when
434 * communicating with the hypervisor (e.g. to build HPT entries)
437 static void __init build_iSeries_Memory_Map(void)
439 u32 loadAreaFirstChunk, loadAreaLastChunk, loadAreaSize;
441 u32 hptFirstChunk, hptLastChunk, hptSizeChunks, hptSizePages;
443 u32 totalChunks,moreChunks;
444 u32 currChunk, thisChunk, absChunk;
448 struct MemoryBlock mb[32];
449 unsigned long numMemoryBlocks, curBlock;
451 /* Chunk size on iSeries is 256K bytes */
452 totalChunks = (u32)HvLpConfig_getMsChunks();
453 klimit = msChunks_alloc(klimit, totalChunks, 1UL << 18);
456 * Get absolute address of our load area
457 * and map it to physical address 0
458 * This guarantees that the loadarea ends up at physical 0
459 * otherwise, it might not be returned by PLIC as the first
463 loadAreaFirstChunk = (u32)addr_to_chunk(itLpNaca.xLoadAreaAddr);
464 loadAreaSize = itLpNaca.xLoadAreaChunks;
467 * Only add the pages already mapped here.
468 * Otherwise we might add the hpt pages
469 * The rest of the pages of the load area
470 * aren't in the HPT yet and can still
471 * be assigned an arbitrary physical address
473 if ((loadAreaSize * 64) > HvPagesToMap)
474 loadAreaSize = HvPagesToMap / 64;
476 loadAreaLastChunk = loadAreaFirstChunk + loadAreaSize - 1;
479 * TODO Do we need to do something if the HPT is in the 64MB load area?
480 * This would be required if the itLpNaca.xLoadAreaChunks includes
484 printk("Mapping load area - physical addr = 0000000000000000\n"
485 " absolute addr = %016lx\n",
486 chunk_to_addr(loadAreaFirstChunk));
487 printk("Load area size %dK\n", loadAreaSize * 256);
489 for (nextPhysChunk = 0; nextPhysChunk < loadAreaSize; ++nextPhysChunk)
490 msChunks.abs[nextPhysChunk] =
491 loadAreaFirstChunk + nextPhysChunk;
494 * Get absolute address of our HPT and remember it so
495 * we won't map it to any physical address
497 hptFirstChunk = (u32)addr_to_chunk(HvCallHpt_getHptAddress());
498 hptSizePages = (u32)HvCallHpt_getHptPages();
499 hptSizeChunks = hptSizePages >> (msChunks.chunk_shift - PAGE_SHIFT);
500 hptLastChunk = hptFirstChunk + hptSizeChunks - 1;
502 printk("HPT absolute addr = %016lx, size = %dK\n",
503 chunk_to_addr(hptFirstChunk), hptSizeChunks * 256);
505 /* Fill in the hashed page table hash mask */
506 num_ptegs = hptSizePages *
507 (PAGE_SIZE / (sizeof(HPTE) * HPTES_PER_GROUP));
508 htab_hash_mask = num_ptegs - 1;
511 * The actual hashed page table is in the hypervisor,
512 * we have no direct access
517 * Determine if absolute memory has any
518 * holes so that we can interpret the
519 * access map we get back from the hypervisor
522 numMemoryBlocks = iSeries_process_mainstore_vpd(mb, 32);
525 * Process the main store access map from the hypervisor
526 * to build up our physical -> absolute translation table
531 moreChunks = totalChunks;
534 map = HvCallSm_get64BitsOfAccessMap(itLpNaca.xLpIndex,
536 thisChunk = currChunk;
538 chunkBit = map >> 63;
542 while (thisChunk >= mb[curBlock].logicalEnd) {
544 if (curBlock >= numMemoryBlocks)
545 panic("out of memory blocks");
547 if (thisChunk < mb[curBlock].logicalStart)
548 panic("memory block error");
550 absChunk = mb[curBlock].absStart +
551 (thisChunk - mb[curBlock].logicalStart);
552 if (((absChunk < hptFirstChunk) ||
553 (absChunk > hptLastChunk)) &&
554 ((absChunk < loadAreaFirstChunk) ||
555 (absChunk > loadAreaLastChunk))) {
556 msChunks.abs[nextPhysChunk] = absChunk;
567 * main store size (in chunks) is
568 * totalChunks - hptSizeChunks
569 * which should be equal to
572 systemcfg->physicalMemorySize = chunk_to_addr(nextPhysChunk);
576 * Set up the variables that describe the cache line sizes
579 static void __init setup_iSeries_cache_sizes(void)
582 unsigned int procIx = get_paca()->lppaca.dyn_hv_phys_proc_index;
584 systemcfg->icache_size =
585 ppc64_caches.isize = xIoHriProcessorVpd[procIx].xInstCacheSize * 1024;
586 systemcfg->icache_line_size =
587 ppc64_caches.iline_size =
588 xIoHriProcessorVpd[procIx].xInstCacheOperandSize;
589 systemcfg->dcache_size =
591 xIoHriProcessorVpd[procIx].xDataL1CacheSizeKB * 1024;
592 systemcfg->dcache_line_size =
593 ppc64_caches.dline_size =
594 xIoHriProcessorVpd[procIx].xDataCacheOperandSize;
595 ppc64_caches.ilines_per_page = PAGE_SIZE / ppc64_caches.iline_size;
596 ppc64_caches.dlines_per_page = PAGE_SIZE / ppc64_caches.dline_size;
598 i = ppc64_caches.iline_size;
600 while ((i = (i / 2)))
602 ppc64_caches.log_iline_size = n;
604 i = ppc64_caches.dline_size;
606 while ((i = (i / 2)))
608 ppc64_caches.log_dline_size = n;
610 printk("D-cache line size = %d\n",
611 (unsigned int)ppc64_caches.dline_size);
612 printk("I-cache line size = %d\n",
613 (unsigned int)ppc64_caches.iline_size);
617 * Create a pte. Used during initialization only.
619 static void iSeries_make_pte(unsigned long va, unsigned long pa,
622 HPTE local_hpte, rhpte;
623 unsigned long hash, vpn;
626 vpn = va >> PAGE_SHIFT;
627 hash = hpt_hash(vpn, 0);
629 local_hpte.dw1.dword1 = pa | mode;
630 local_hpte.dw0.dword0 = 0;
631 local_hpte.dw0.dw0.avpn = va >> 23;
632 local_hpte.dw0.dw0.bolted = 1; /* bolted */
633 local_hpte.dw0.dw0.v = 1;
635 slot = HvCallHpt_findValid(&rhpte, vpn);
637 /* Must find space in primary group */
638 panic("hash_page: hpte already exists\n");
640 HvCallHpt_addValidate(slot, 0, (HPTE *)&local_hpte );
644 * Bolt the kernel addr space into the HPT
646 static void __init iSeries_bolt_kernel(unsigned long saddr, unsigned long eaddr)
649 unsigned long mode_rw = _PAGE_ACCESSED | _PAGE_COHERENT | PP_RWXX;
652 for (pa = saddr; pa < eaddr ;pa += PAGE_SIZE) {
653 unsigned long ea = (unsigned long)__va(pa);
654 unsigned long vsid = get_kernel_vsid(ea);
655 unsigned long va = (vsid << 28) | (pa & 0xfffffff);
656 unsigned long vpn = va >> PAGE_SHIFT;
657 unsigned long slot = HvCallHpt_findValid(&hpte, vpn);
659 /* Make non-kernel text non-executable */
660 if (!in_kernel_text(ea))
661 mode_rw |= HW_NO_EXEC;
663 if (hpte.dw0.dw0.v) {
664 /* HPTE exists, so just bolt it */
665 HvCallHpt_setSwBits(slot, 0x10, 0);
666 /* And make sure the pp bits are correct */
667 HvCallHpt_setPp(slot, PP_RWXX);
669 /* No HPTE exists, so create a new bolted one */
670 iSeries_make_pte(va, phys_to_abs(pa), mode_rw);
677 static void __init iSeries_setup_arch(void)
680 unsigned procIx = get_paca()->lppaca.dyn_hv_phys_proc_index;
682 /* Add an eye catcher and the systemcfg layout version number */
683 strcpy(systemcfg->eye_catcher, "SYSTEMCFG:PPC64");
684 systemcfg->version.major = SYSTEMCFG_MAJOR;
685 systemcfg->version.minor = SYSTEMCFG_MINOR;
687 /* Setup the Lp Event Queue */
689 /* Allocate a page for the Event Stack
690 * The hypervisor wants the absolute real address, so
691 * we subtract out the KERNELBASE and add in the
692 * absolute real address of the kernel load area
694 eventStack = alloc_bootmem_pages(LpEventStackSize);
695 memset(eventStack, 0, LpEventStackSize);
697 /* Invoke the hypervisor to initialize the event stack */
698 HvCallEvent_setLpEventStack(0, eventStack, LpEventStackSize);
700 /* Initialize fields in our Lp Event Queue */
701 xItLpQueue.xSlicEventStackPtr = (char *)eventStack;
702 xItLpQueue.xSlicCurEventPtr = (char *)eventStack;
703 xItLpQueue.xSlicLastValidEventPtr = (char *)eventStack +
704 (LpEventStackSize - LpEventMaxSize);
705 xItLpQueue.xIndex = 0;
707 /* Compute processor frequency */
708 procFreqHz = ((1UL << 34) * 1000000) /
709 xIoHriProcessorVpd[procIx].xProcFreq;
710 procFreqMhz = procFreqHz / 1000000;
711 procFreqMhzHundreths = (procFreqHz / 10000) - (procFreqMhz * 100);
712 ppc_proc_freq = procFreqHz;
714 /* Compute time base frequency */
715 tbFreqHz = ((1UL << 32) * 1000000) /
716 xIoHriProcessorVpd[procIx].xTimeBaseFreq;
717 tbFreqMhz = tbFreqHz / 1000000;
718 tbFreqMhzHundreths = (tbFreqHz / 10000) - (tbFreqMhz * 100);
719 ppc_tb_freq = tbFreqHz;
721 printk("Max logical processors = %d\n",
722 itVpdAreas.xSlicMaxLogicalProcs);
723 printk("Max physical processors = %d\n",
724 itVpdAreas.xSlicMaxPhysicalProcs);
725 printk("Processor frequency = %lu.%02lu\n", procFreqMhz,
726 procFreqMhzHundreths);
727 printk("Time base frequency = %lu.%02lu\n", tbFreqMhz,
729 systemcfg->processor = xIoHriProcessorVpd[procIx].xPVR;
730 printk("Processor version = %x\n", systemcfg->processor);
733 static void iSeries_get_cpuinfo(struct seq_file *m)
735 seq_printf(m, "machine\t\t: 64-bit iSeries Logical Partition\n");
742 static int iSeries_get_irq(struct pt_regs *regs)
744 /* -2 means ignore this interrupt */
751 static void iSeries_restart(char *cmd)
759 static void iSeries_power_off(void)
767 static void iSeries_halt(void)
773 * void __init iSeries_calibrate_decr()
776 * This routine retrieves the internal processor frequency from the VPD,
777 * and sets up the kernel timer decrementer based on that value.
780 static void __init iSeries_calibrate_decr(void)
782 unsigned long cyclesPerUsec;
783 struct div_result divres;
785 /* Compute decrementer (and TB) frequency in cycles/sec */
786 cyclesPerUsec = ppc_tb_freq / 1000000;
789 * Set the amount to refresh the decrementer by. This
790 * is the number of decrementer ticks it takes for
793 tb_ticks_per_jiffy = ppc_tb_freq / HZ;
796 /* TEST CODE FOR ADJTIME */
797 tb_ticks_per_jiffy += tb_ticks_per_jiffy / 5000;
798 /* END OF TEST CODE */
802 * tb_ticks_per_sec = freq; would give better accuracy
803 * but tb_ticks_per_sec = tb_ticks_per_jiffy*HZ; assures
804 * that jiffies (and xtime) will match the time returned
805 * by do_gettimeofday.
807 tb_ticks_per_sec = tb_ticks_per_jiffy * HZ;
808 tb_ticks_per_usec = cyclesPerUsec;
809 tb_to_us = mulhwu_scale_factor(ppc_tb_freq, 1000000);
810 div128_by_32(1024 * 1024, 0, tb_ticks_per_sec, &divres);
811 tb_to_xs = divres.result_low;
812 setup_default_decr();
815 static void __init iSeries_progress(char * st, unsigned short code)
817 printk("Progress: [%04x] - %s\n", (unsigned)code, st);
818 if (!piranha_simulator && mf_initialized) {
820 mf_display_progress(code);
826 static void __init iSeries_fixup_klimit(void)
829 * Change klimit to take into account any ram disk
830 * that may be included
833 klimit = KERNELBASE + (u64)naca.xRamDisk +
834 (naca.xRamDiskSize * PAGE_SIZE);
837 * No ram disk was included - check and see if there
838 * was an embedded system map. Change klimit to take
839 * into account any embedded system map
841 if (embedded_sysmap_end)
842 klimit = KERNELBASE + ((embedded_sysmap_end + 4095) &
847 static int __init iSeries_src_init(void)
849 /* clear the progress line */
850 ppc_md.progress(" ", 0xffff);
854 late_initcall(iSeries_src_init);
857 void __init iSeries_init_IRQ(void) { }
860 void __init iSeries_early_setup(void)
862 iSeries_fixup_klimit();
864 ppc_md.setup_arch = iSeries_setup_arch;
865 ppc_md.get_cpuinfo = iSeries_get_cpuinfo;
866 ppc_md.init_IRQ = iSeries_init_IRQ;
867 ppc_md.get_irq = iSeries_get_irq;
868 ppc_md.init_early = iSeries_init_early,
870 ppc_md.pcibios_fixup = iSeries_pci_final_fixup;
872 ppc_md.restart = iSeries_restart;
873 ppc_md.power_off = iSeries_power_off;
874 ppc_md.halt = iSeries_halt;
876 ppc_md.get_boot_time = iSeries_get_boot_time;
877 ppc_md.set_rtc_time = iSeries_set_rtc_time;
878 ppc_md.get_rtc_time = iSeries_get_rtc_time;
879 ppc_md.calibrate_decr = iSeries_calibrate_decr;
880 ppc_md.progress = iSeries_progress;