5 This option selects whether a 32-bit or a 64-bit kernel
8 menu "Processor support"
10 prompt "Processor Type"
13 There are five families of 32 bit PowerPC chips supported.
14 The most common ones are the desktop and server CPUs (601, 603,
15 604, 740, 750, 74xx) CPUs from Freescale and IBM, with their
16 embedded 512x/52xx/82xx/83xx/86xx counterparts.
17 The other embeeded parts, namely 4xx, 8xx, e200 (55xx) and e500
18 (85xx) each form a family of their own that is not compatible
21 If unsure, select 52xx/6xx/7xx/74xx/82xx/83xx/86xx.
24 bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx"
45 bool "AMCC 44x, 46x or 47x"
58 prompt "Processor Type"
61 There are two families of 64 bit PowerPC chips supported.
62 The most common ones are the desktop and server CPUs
63 (POWER3, RS64, POWER4, POWER5, POWER5+, POWER6, ...)
65 The other are the "embedded" processors compliant with the
66 "Book 3E" variant of the architecture
69 bool "Server processors"
71 select PPC_HAVE_PMU_SUPPORT
72 select SYS_SUPPORTS_HUGETLBFS
75 bool "Embedded processors"
76 select PPC_FPU # Make it a choice ?
77 select PPC_SMP_MUXED_IPI
82 prompt "CPU selection"
86 This will create a kernel which is optimised for a particular CPU.
87 The resulting kernel may not run on other CPUs, so use this with care.
89 If unsure, select Generic.
95 bool "Cell Broadband Engine"
113 depends on PPC_BOOK3S_32 || PPC_BOOK3S_64
117 depends on PPC_BOOK3E_64
121 depends on PPC32 && PPC_BOOK3S
122 select PPC_HAVE_PMU_SUPPORT
126 depends on PPC64 && PPC_BOOK3S
127 default y if !POWER4_ONLY
130 depends on PPC64 && PPC_BOOK3S
135 depends on PPC_BOOK3E_64
138 bool "Optimize for Cell Broadband Engine"
139 depends on PPC64 && PPC_BOOK3S
141 Cause the compiler to optimize for the PPE of the Cell Broadband
142 Engine. This will make the code run considerably faster on Cell
143 but somewhat slower on other machines. This option only changes
144 the scheduling of instructions, not the selection of instructions
145 itself, so the resulting kernel will keep running on all other
146 machines. When building a kernel that is supposed to run only
147 on Cell, you should also select the POWER4_ONLY option.
149 # this is temp to handle compat with arch=ppc
154 select FSL_EMB_PERFMON
155 select PPC_FSL_BOOK3E
159 bool "e500mc Support"
167 config FSL_EMB_PERFMON
168 bool "Freescale Embedded Perfmon"
169 depends on E500 || PPC_83xx
171 This is the Performance Monitor support found on the e500 core
172 and some e300 cores (c3 and c4). Select this only if your
173 core supports the Embedded Performance Monitor APU
175 config FSL_EMB_PERF_EVENT
177 depends on FSL_EMB_PERFMON && PERF_EVENTS && !PPC_PERF_CTRS
180 config FSL_EMB_PERF_EVENT_E500
182 depends on FSL_EMB_PERF_EVENT && E500
187 depends on 40x || 44x
192 depends on E200 || E500 || 44x || PPC_BOOK3E
197 depends on (E200 || E500) && PPC32
200 # this is for common code between PPC32 & PPC64 FSL BOOKE
201 config PPC_FSL_BOOK3E
203 select FSL_EMB_PERFMON
204 select PPC_SMP_MUXED_IPI
205 select SYS_SUPPORTS_HUGETLBFS if PHYS_64BIT || PPC64
206 default y if FSL_BOOKE
210 depends on 44x || E500 || PPC_86xx
211 default y if PHYS_64BIT
214 bool 'Large physical address support' if E500 || PPC_86xx
215 depends on (44x || E500 || PPC_86xx) && !PPC_83xx && !PPC_82xx
217 This option enables kernel support for larger than 32-bit physical
218 addresses. This feature may not be available on all cores.
220 If you have more than 3.5GB of RAM or so, you also need to enable
221 SWIOTLB under Kernel Options for this to work. The actual number
222 is platform-dependent.
224 If in doubt, say N here.
227 bool "AltiVec Support"
228 depends on 6xx || POWER4
230 This option enables kernel support for the Altivec extensions to the
231 PowerPC processor. The kernel currently supports saving and restoring
232 altivec registers, and turning on the 'altivec enable' bit so user
233 processes can execute altivec instructions.
235 This option is only usefully if you have a processor that supports
236 altivec (G4, otherwise known as 74xx series), but does not have
237 any affect on a non-altivec cpu (it does, however add code to the
240 If in doubt, say Y here.
244 depends on POWER4 && ALTIVEC && PPC_FPU
247 This option enables kernel support for the Vector Scaler extensions
248 to the PowerPC processor. The kernel currently supports saving and
249 restoring VSX registers, and turning on the 'VSX enable' bit so user
250 processes can execute VSX instructions.
252 This option is only useful if you have a processor that supports
253 VSX (P7 and above), but does not have any affect on a non-VSX
254 CPUs (it does, however add code to the kernel).
256 If in doubt, say Y here.
259 bool "Support for PowerPC icswx coprocessor instruction"
260 depends on POWER4 || PPC_A2
264 This option enables kernel support for the PowerPC Initiate
265 Coprocessor Store Word (icswx) coprocessor instruction on POWER7
268 This option is only useful if you have a processor that supports
269 the icswx coprocessor instruction. It does not have any effect
270 on processors without the icswx coprocessor instruction.
272 This option slightly increases kernel memory usage.
274 If in doubt, say N here.
277 bool "icswx requires direct PID management"
278 depends on PPC_ICSWX && POWER4
281 The PID register in server is used explicitly for ICSWX. In
282 embedded systems PID management is done by the system.
284 config PPC_ICSWX_USE_SIGILL
285 bool "Should a bad CT cause a SIGILL?"
289 Should a bad CT used for "non-record form ICSWX" cause an
290 illegal instruction signal or should it be silent as
293 If in doubt, say N here.
297 depends on E200 || (E500 && !PPC_E500MC)
300 This option enables kernel support for the Signal Processing
301 Extensions (SPE) to the PowerPC processor. The kernel currently
302 supports saving and restoring SPE registers, and turning on the
303 'spe enable' bit so user processes can execute SPE instructions.
305 This option is only useful if you have a processor that supports
306 SPE (e500, otherwise known as 85xx series), but does not have any
307 effect on a non-spe cpu (it does, however add code to the kernel).
309 If in doubt, say Y here.
313 depends on PPC_BOOK3S
315 config PPC_STD_MMU_32
317 depends on PPC_STD_MMU && PPC32
319 config PPC_STD_MMU_64
321 depends on PPC_STD_MMU && PPC64
323 config PPC_MMU_NOHASH
325 depends on !PPC_STD_MMU
327 config PPC_BOOK3E_MMU
329 depends on FSL_BOOKE || PPC_BOOK3E
333 default y if (!PPC_FSL_BOOK3E && PPC64 && HUGETLB_PAGE) || (PPC_STD_MMU_64 && PPC_64K_PAGES)
336 config VIRT_CPU_ACCOUNTING
337 bool "Deterministic task and CPU time accounting"
341 Select this option to enable more accurate task and CPU time
342 accounting. This is done by reading a CPU counter on each
343 kernel entry and exit and on transitions within the kernel
344 between system, softirq and hardirq state, so there is a
345 small performance impact. This also enables accounting of
346 stolen time on logically-partitioned systems running on
347 IBM POWER5-based machines.
349 If in doubt, say Y here.
351 config PPC_HAVE_PMU_SUPPORT
356 depends on PERF_EVENTS && PPC_HAVE_PMU_SUPPORT
358 This enables the powerpc-specific perf_event back-end.
361 depends on PPC_BOOK3S || PPC_BOOK3E || FSL_BOOKE || PPC_47x
362 bool "Symmetric multi-processing support"
364 This enables support for systems with more than one CPU. If you have
365 a system with only one CPU, say N. If you have a system with more
366 than one CPU, say Y. Note that the kernel does not currently
367 support SMP machines with 603/603e/603ev or PPC750 ("G3") processors
368 since they have inadequate hardware support for multiprocessor
371 If you say N here, the kernel will run on single and multiprocessor
372 machines, but will use only one CPU of a multiprocessor machine. If
373 you say Y here, the kernel will run on single-processor machines.
374 On a single-processor machine, the kernel will run faster if you say
377 If you don't know what to do here, say N.
380 int "Maximum number of CPUs (2-8192)"
383 default "32" if PPC64
386 config NOT_COHERENT_CACHE
388 depends on 4xx || 8xx || E200 || PPC_MPC512x || GAMECUBE_COMMON
392 config CHECK_CACHE_COHERENCY