2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
15 * Copyright IBM Corp. 2007
16 * Copyright 2011 Freescale Semiconductor, Inc.
18 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
21 #include <linux/jiffies.h>
22 #include <linux/hrtimer.h>
23 #include <linux/types.h>
24 #include <linux/string.h>
25 #include <linux/kvm_host.h>
26 #include <linux/clockchips.h>
30 #include <asm/byteorder.h>
31 #include <asm/kvm_ppc.h>
32 #include <asm/disassemble.h>
39 #define OP_31_XOP_TRAP 4
40 #define OP_31_XOP_LWZX 23
41 #define OP_31_XOP_TRAP_64 68
42 #define OP_31_XOP_DCBF 86
43 #define OP_31_XOP_LBZX 87
44 #define OP_31_XOP_STWX 151
45 #define OP_31_XOP_STBX 215
46 #define OP_31_XOP_LBZUX 119
47 #define OP_31_XOP_STBUX 247
48 #define OP_31_XOP_LHZX 279
49 #define OP_31_XOP_LHZUX 311
50 #define OP_31_XOP_MFSPR 339
51 #define OP_31_XOP_LHAX 343
52 #define OP_31_XOP_STHX 407
53 #define OP_31_XOP_STHUX 439
54 #define OP_31_XOP_MTSPR 467
55 #define OP_31_XOP_DCBI 470
56 #define OP_31_XOP_LWBRX 534
57 #define OP_31_XOP_TLBSYNC 566
58 #define OP_31_XOP_STWBRX 662
59 #define OP_31_XOP_LHBRX 790
60 #define OP_31_XOP_STHBRX 918
79 void kvmppc_emulate_dec(struct kvm_vcpu *vcpu)
81 unsigned long dec_nsec;
82 unsigned long long dec_time;
84 pr_debug("mtDEC: %x\n", vcpu->arch.dec);
85 hrtimer_try_to_cancel(&vcpu->arch.dec_timer);
87 #ifdef CONFIG_PPC_BOOK3S
88 /* mtdec lowers the interrupt line when positive. */
89 kvmppc_core_dequeue_dec(vcpu);
91 /* POWER4+ triggers a dec interrupt if the value is < 0 */
92 if (vcpu->arch.dec & 0x80000000) {
93 kvmppc_core_queue_dec(vcpu);
99 /* On BOOKE, DEC = 0 is as good as decrementer not enabled */
100 if (vcpu->arch.dec == 0)
105 * The decrementer ticks at the same rate as the timebase, so
106 * that's how we convert the guest DEC value to the number of
110 dec_time = vcpu->arch.dec;
112 * Guest timebase ticks at the same frequency as host decrementer.
113 * So use the host decrementer calculations for decrementer emulation.
115 dec_time = dec_time << decrementer_clockevent.shift;
116 do_div(dec_time, decrementer_clockevent.mult);
117 dec_nsec = do_div(dec_time, NSEC_PER_SEC);
118 hrtimer_start(&vcpu->arch.dec_timer,
119 ktime_set(dec_time, dec_nsec), HRTIMER_MODE_REL);
120 vcpu->arch.dec_jiffies = get_tb();
123 u32 kvmppc_get_dec(struct kvm_vcpu *vcpu, u64 tb)
125 u64 jd = tb - vcpu->arch.dec_jiffies;
128 if (vcpu->arch.dec < jd)
132 return vcpu->arch.dec - jd;
135 static int kvmppc_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
137 enum emulation_result emulated = EMULATE_DONE;
138 ulong spr_val = kvmppc_get_gpr(vcpu, rs);
142 vcpu->arch.shared->srr0 = spr_val;
145 vcpu->arch.shared->srr1 = spr_val;
148 /* XXX We need to context-switch the timebase for
149 * watchdog and FIT. */
150 case SPRN_TBWL: break;
151 case SPRN_TBWU: break;
154 vcpu->arch.dec = spr_val;
155 kvmppc_emulate_dec(vcpu);
159 vcpu->arch.shared->sprg0 = spr_val;
162 vcpu->arch.shared->sprg1 = spr_val;
165 vcpu->arch.shared->sprg2 = spr_val;
168 vcpu->arch.shared->sprg3 = spr_val;
172 emulated = kvmppc_core_emulate_mtspr(vcpu, sprn,
174 if (emulated == EMULATE_FAIL)
175 printk(KERN_INFO "mtspr: unknown spr "
180 kvmppc_set_exit_type(vcpu, EMULATED_MTSPR_EXITS);
185 static int kvmppc_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
187 enum emulation_result emulated = EMULATE_DONE;
192 spr_val = vcpu->arch.shared->srr0;
195 spr_val = vcpu->arch.shared->srr1;
198 spr_val = vcpu->arch.pvr;
201 spr_val = vcpu->vcpu_id;
204 /* Note: mftb and TBRL/TBWL are user-accessible, so
205 * the guest can always access the real TB anyways.
206 * In fact, we probably will never see these traps. */
208 spr_val = get_tb() >> 32;
215 spr_val = vcpu->arch.shared->sprg0;
218 spr_val = vcpu->arch.shared->sprg1;
221 spr_val = vcpu->arch.shared->sprg2;
224 spr_val = vcpu->arch.shared->sprg3;
226 /* Note: SPRG4-7 are user-readable, so we don't get
230 spr_val = kvmppc_get_dec(vcpu, get_tb());
233 emulated = kvmppc_core_emulate_mfspr(vcpu, sprn,
235 if (unlikely(emulated == EMULATE_FAIL)) {
236 printk(KERN_INFO "mfspr: unknown spr "
242 if (emulated == EMULATE_DONE)
243 kvmppc_set_gpr(vcpu, rt, spr_val);
244 kvmppc_set_exit_type(vcpu, EMULATED_MFSPR_EXITS);
261 * XXX is_bigendian should depend on MMU mapping or MSR[LE]
263 /* XXX Should probably auto-generate instruction decoding for a particular core
264 * from opcode tables in the future. */
265 int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
267 u32 inst = kvmppc_get_last_inst(vcpu);
268 int ra = get_ra(inst);
269 int rs = get_rs(inst);
270 int rt = get_rt(inst);
271 int sprn = get_sprn(inst);
272 enum emulation_result emulated = EMULATE_DONE;
275 /* this default type might be overwritten by subcategories */
276 kvmppc_set_exit_type(vcpu, EMULATED_INST_EXITS);
278 pr_debug("Emulating opcode %d / %d\n", get_op(inst), get_xop(inst));
280 switch (get_op(inst)) {
282 #ifdef CONFIG_PPC_BOOK3S
284 kvmppc_core_queue_program(vcpu, SRR1_PROGTRAP);
286 kvmppc_core_queue_program(vcpu,
287 vcpu->arch.shared->esr | ESR_PTR);
293 switch (get_xop(inst)) {
297 case OP_31_XOP_TRAP_64:
299 #ifdef CONFIG_PPC_BOOK3S
300 kvmppc_core_queue_program(vcpu, SRR1_PROGTRAP);
302 kvmppc_core_queue_program(vcpu,
303 vcpu->arch.shared->esr | ESR_PTR);
308 emulated = kvmppc_handle_load(run, vcpu, rt, 4, 1);
312 emulated = kvmppc_handle_load(run, vcpu, rt, 1, 1);
315 case OP_31_XOP_LBZUX:
316 emulated = kvmppc_handle_load(run, vcpu, rt, 1, 1);
317 kvmppc_set_gpr(vcpu, ra, vcpu->arch.vaddr_accessed);
321 emulated = kvmppc_handle_store(run, vcpu,
322 kvmppc_get_gpr(vcpu, rs),
327 emulated = kvmppc_handle_store(run, vcpu,
328 kvmppc_get_gpr(vcpu, rs),
332 case OP_31_XOP_STBUX:
333 emulated = kvmppc_handle_store(run, vcpu,
334 kvmppc_get_gpr(vcpu, rs),
336 kvmppc_set_gpr(vcpu, ra, vcpu->arch.vaddr_accessed);
340 emulated = kvmppc_handle_loads(run, vcpu, rt, 2, 1);
344 emulated = kvmppc_handle_load(run, vcpu, rt, 2, 1);
347 case OP_31_XOP_LHZUX:
348 emulated = kvmppc_handle_load(run, vcpu, rt, 2, 1);
349 kvmppc_set_gpr(vcpu, ra, vcpu->arch.vaddr_accessed);
352 case OP_31_XOP_MFSPR:
353 emulated = kvmppc_emulate_mfspr(vcpu, sprn, rt);
357 emulated = kvmppc_handle_store(run, vcpu,
358 kvmppc_get_gpr(vcpu, rs),
362 case OP_31_XOP_STHUX:
363 emulated = kvmppc_handle_store(run, vcpu,
364 kvmppc_get_gpr(vcpu, rs),
366 kvmppc_set_gpr(vcpu, ra, vcpu->arch.vaddr_accessed);
369 case OP_31_XOP_MTSPR:
370 emulated = kvmppc_emulate_mtspr(vcpu, sprn, rs);
375 /* Do nothing. The guest is performing dcbi because
376 * hardware DMA is not snooped by the dcache, but
377 * emulated DMA either goes through the dcache as
378 * normal writes, or the host kernel has handled dcache
382 case OP_31_XOP_LWBRX:
383 emulated = kvmppc_handle_load(run, vcpu, rt, 4, 0);
386 case OP_31_XOP_TLBSYNC:
389 case OP_31_XOP_STWBRX:
390 emulated = kvmppc_handle_store(run, vcpu,
391 kvmppc_get_gpr(vcpu, rs),
395 case OP_31_XOP_LHBRX:
396 emulated = kvmppc_handle_load(run, vcpu, rt, 2, 0);
399 case OP_31_XOP_STHBRX:
400 emulated = kvmppc_handle_store(run, vcpu,
401 kvmppc_get_gpr(vcpu, rs),
406 /* Attempt core-specific emulation below. */
407 emulated = EMULATE_FAIL;
412 emulated = kvmppc_handle_load(run, vcpu, rt, 4, 1);
415 /* TBD: Add support for other 64 bit load variants like ldu, ldux, ldx etc. */
418 emulated = kvmppc_handle_load(run, vcpu, rt, 8, 1);
422 emulated = kvmppc_handle_load(run, vcpu, rt, 4, 1);
423 kvmppc_set_gpr(vcpu, ra, vcpu->arch.vaddr_accessed);
427 emulated = kvmppc_handle_load(run, vcpu, rt, 1, 1);
431 emulated = kvmppc_handle_load(run, vcpu, rt, 1, 1);
432 kvmppc_set_gpr(vcpu, ra, vcpu->arch.vaddr_accessed);
436 emulated = kvmppc_handle_store(run, vcpu,
437 kvmppc_get_gpr(vcpu, rs),
441 /* TBD: Add support for other 64 bit store variants like stdu, stdux, stdx etc. */
444 emulated = kvmppc_handle_store(run, vcpu,
445 kvmppc_get_gpr(vcpu, rs),
450 emulated = kvmppc_handle_store(run, vcpu,
451 kvmppc_get_gpr(vcpu, rs),
453 kvmppc_set_gpr(vcpu, ra, vcpu->arch.vaddr_accessed);
457 emulated = kvmppc_handle_store(run, vcpu,
458 kvmppc_get_gpr(vcpu, rs),
463 emulated = kvmppc_handle_store(run, vcpu,
464 kvmppc_get_gpr(vcpu, rs),
466 kvmppc_set_gpr(vcpu, ra, vcpu->arch.vaddr_accessed);
470 emulated = kvmppc_handle_load(run, vcpu, rt, 2, 1);
474 emulated = kvmppc_handle_load(run, vcpu, rt, 2, 1);
475 kvmppc_set_gpr(vcpu, ra, vcpu->arch.vaddr_accessed);
479 emulated = kvmppc_handle_loads(run, vcpu, rt, 2, 1);
483 emulated = kvmppc_handle_loads(run, vcpu, rt, 2, 1);
484 kvmppc_set_gpr(vcpu, ra, vcpu->arch.vaddr_accessed);
488 emulated = kvmppc_handle_store(run, vcpu,
489 kvmppc_get_gpr(vcpu, rs),
494 emulated = kvmppc_handle_store(run, vcpu,
495 kvmppc_get_gpr(vcpu, rs),
497 kvmppc_set_gpr(vcpu, ra, vcpu->arch.vaddr_accessed);
501 emulated = EMULATE_FAIL;
504 if (emulated == EMULATE_FAIL) {
505 emulated = kvmppc_core_emulate_op(run, vcpu, inst, &advance);
506 if (emulated == EMULATE_AGAIN) {
508 } else if (emulated == EMULATE_FAIL) {
510 printk(KERN_ERR "Couldn't emulate instruction 0x%08x "
511 "(op %d xop %d)\n", inst, get_op(inst), get_xop(inst));
512 kvmppc_core_queue_program(vcpu, 0);
516 trace_kvm_ppc_instr(inst, kvmppc_get_pc(vcpu), emulated);
518 /* Advance past emulated instruction. */
520 kvmppc_set_pc(vcpu, kvmppc_get_pc(vcpu) + 4);