2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
15 * Copyright Novell Inc 2010
17 * Authors: Alexander Graf <agraf@suse.de>
21 #include <asm/kvm_ppc.h>
22 #include <asm/disassemble.h>
23 #include <asm/kvm_book3s.h>
24 #include <asm/kvm_fpu.h>
26 #include <asm/cacheflush.h>
27 #include <asm/switch_to.h>
28 #include <linux/vmalloc.h>
33 #define dprintk printk
35 #define dprintk(...) do { } while(0);
51 #define OP_31_LFSX 535
52 #define OP_31_LFSUX 567
53 #define OP_31_LFDX 599
54 #define OP_31_LFDUX 631
55 #define OP_31_STFSX 663
56 #define OP_31_STFSUX 695
57 #define OP_31_STFX 727
58 #define OP_31_STFUX 759
59 #define OP_31_LWIZX 887
60 #define OP_31_STFIWX 983
62 #define OP_59_FADDS 21
63 #define OP_59_FSUBS 20
64 #define OP_59_FSQRTS 22
65 #define OP_59_FDIVS 18
67 #define OP_59_FMULS 25
68 #define OP_59_FRSQRTES 26
69 #define OP_59_FMSUBS 28
70 #define OP_59_FMADDS 29
71 #define OP_59_FNMSUBS 30
72 #define OP_59_FNMADDS 31
75 #define OP_63_FCPSGN 8
77 #define OP_63_FCTIW 14
78 #define OP_63_FCTIWZ 15
81 #define OP_63_FSQRT 22
85 #define OP_63_FRSQRTE 26
86 #define OP_63_FMSUB 28
87 #define OP_63_FMADD 29
88 #define OP_63_FNMSUB 30
89 #define OP_63_FNMADD 31
90 #define OP_63_FCMPO 32
91 #define OP_63_MTFSB1 38 // XXX
94 #define OP_63_MCRFS 64
95 #define OP_63_MTFSB0 70
97 #define OP_63_MTFSFI 134
98 #define OP_63_FABS 264
99 #define OP_63_MFFS 583
100 #define OP_63_MTFSF 711
102 #define OP_4X_PS_CMPU0 0
103 #define OP_4X_PSQ_LX 6
104 #define OP_4XW_PSQ_STX 7
105 #define OP_4A_PS_SUM0 10
106 #define OP_4A_PS_SUM1 11
107 #define OP_4A_PS_MULS0 12
108 #define OP_4A_PS_MULS1 13
109 #define OP_4A_PS_MADDS0 14
110 #define OP_4A_PS_MADDS1 15
111 #define OP_4A_PS_DIV 18
112 #define OP_4A_PS_SUB 20
113 #define OP_4A_PS_ADD 21
114 #define OP_4A_PS_SEL 23
115 #define OP_4A_PS_RES 24
116 #define OP_4A_PS_MUL 25
117 #define OP_4A_PS_RSQRTE 26
118 #define OP_4A_PS_MSUB 28
119 #define OP_4A_PS_MADD 29
120 #define OP_4A_PS_NMSUB 30
121 #define OP_4A_PS_NMADD 31
122 #define OP_4X_PS_CMPO0 32
123 #define OP_4X_PSQ_LUX 38
124 #define OP_4XW_PSQ_STUX 39
125 #define OP_4X_PS_NEG 40
126 #define OP_4X_PS_CMPU1 64
127 #define OP_4X_PS_MR 72
128 #define OP_4X_PS_CMPO1 96
129 #define OP_4X_PS_NABS 136
130 #define OP_4X_PS_ABS 264
131 #define OP_4X_PS_MERGE00 528
132 #define OP_4X_PS_MERGE01 560
133 #define OP_4X_PS_MERGE10 592
134 #define OP_4X_PS_MERGE11 624
136 #define SCALAR_NONE 0
137 #define SCALAR_HIGH (1 << 0)
138 #define SCALAR_LOW (1 << 1)
139 #define SCALAR_NO_PS0 (1 << 2)
140 #define SCALAR_NO_PS1 (1 << 3)
142 #define GQR_ST_TYPE_MASK 0x00000007
143 #define GQR_ST_TYPE_SHIFT 0
144 #define GQR_ST_SCALE_MASK 0x00003f00
145 #define GQR_ST_SCALE_SHIFT 8
146 #define GQR_LD_TYPE_MASK 0x00070000
147 #define GQR_LD_TYPE_SHIFT 16
148 #define GQR_LD_SCALE_MASK 0x3f000000
149 #define GQR_LD_SCALE_SHIFT 24
151 #define GQR_QUANTIZE_FLOAT 0
152 #define GQR_QUANTIZE_U8 4
153 #define GQR_QUANTIZE_U16 5
154 #define GQR_QUANTIZE_S8 6
155 #define GQR_QUANTIZE_S16 7
157 #define FPU_LS_SINGLE 0
158 #define FPU_LS_DOUBLE 1
159 #define FPU_LS_SINGLE_LOW 2
161 static inline void kvmppc_sync_qpr(struct kvm_vcpu *vcpu, int rt)
163 kvm_cvt_df(&VCPU_FPR(vcpu, rt), &vcpu->arch.qpr[rt]);
166 static void kvmppc_inject_pf(struct kvm_vcpu *vcpu, ulong eaddr, bool is_store)
169 u64 msr = kvmppc_get_msr(vcpu);
171 msr = kvmppc_set_field(msr, 33, 36, 0);
172 msr = kvmppc_set_field(msr, 42, 47, 0);
173 kvmppc_set_msr(vcpu, msr);
174 kvmppc_set_dar(vcpu, eaddr);
176 dsisr = kvmppc_set_field(0, 33, 33, 1);
178 dsisr = kvmppc_set_field(dsisr, 38, 38, 1);
179 kvmppc_set_dsisr(vcpu, dsisr);
180 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_DATA_STORAGE);
183 static int kvmppc_emulate_fpr_load(struct kvm_run *run, struct kvm_vcpu *vcpu,
184 int rs, ulong addr, int ls_type)
186 int emulated = EMULATE_FAIL;
189 int len = sizeof(u32);
191 if (ls_type == FPU_LS_DOUBLE)
194 /* read from memory */
195 r = kvmppc_ld(vcpu, &addr, len, tmp, true);
196 vcpu->arch.paddr_accessed = addr;
199 kvmppc_inject_pf(vcpu, addr, false);
201 } else if (r == EMULATE_DO_MMIO) {
202 emulated = kvmppc_handle_load(run, vcpu, KVM_MMIO_REG_FPR | rs,
207 emulated = EMULATE_DONE;
209 /* put in registers */
212 kvm_cvt_fd((u32*)tmp, &VCPU_FPR(vcpu, rs));
213 vcpu->arch.qpr[rs] = *((u32*)tmp);
216 VCPU_FPR(vcpu, rs) = *((u64*)tmp);
220 dprintk(KERN_INFO "KVM: FPR_LD [0x%llx] at 0x%lx (%d)\n", *(u64*)tmp,
227 static int kvmppc_emulate_fpr_store(struct kvm_run *run, struct kvm_vcpu *vcpu,
228 int rs, ulong addr, int ls_type)
230 int emulated = EMULATE_FAIL;
238 kvm_cvt_df(&VCPU_FPR(vcpu, rs), (u32*)tmp);
242 case FPU_LS_SINGLE_LOW:
243 *((u32*)tmp) = VCPU_FPR(vcpu, rs);
244 val = VCPU_FPR(vcpu, rs) & 0xffffffff;
248 *((u64*)tmp) = VCPU_FPR(vcpu, rs);
249 val = VCPU_FPR(vcpu, rs);
257 r = kvmppc_st(vcpu, &addr, len, tmp, true);
258 vcpu->arch.paddr_accessed = addr;
260 kvmppc_inject_pf(vcpu, addr, true);
261 } else if (r == EMULATE_DO_MMIO) {
262 emulated = kvmppc_handle_store(run, vcpu, val, len, 1);
264 emulated = EMULATE_DONE;
267 dprintk(KERN_INFO "KVM: FPR_ST [0x%llx] at 0x%lx (%d)\n",
273 static int kvmppc_emulate_psq_load(struct kvm_run *run, struct kvm_vcpu *vcpu,
274 int rs, ulong addr, bool w, int i)
276 int emulated = EMULATE_FAIL;
281 /* read from memory */
283 r = kvmppc_ld(vcpu, &addr, sizeof(u32), tmp, true);
284 memcpy(&tmp[1], &one, sizeof(u32));
286 r = kvmppc_ld(vcpu, &addr, sizeof(u32) * 2, tmp, true);
288 vcpu->arch.paddr_accessed = addr;
290 kvmppc_inject_pf(vcpu, addr, false);
292 } else if ((r == EMULATE_DO_MMIO) && w) {
293 emulated = kvmppc_handle_load(run, vcpu, KVM_MMIO_REG_FPR | rs,
295 vcpu->arch.qpr[rs] = tmp[1];
297 } else if (r == EMULATE_DO_MMIO) {
298 emulated = kvmppc_handle_load(run, vcpu, KVM_MMIO_REG_FQPR | rs,
303 emulated = EMULATE_DONE;
305 /* put in registers */
306 kvm_cvt_fd(&tmp[0], &VCPU_FPR(vcpu, rs));
307 vcpu->arch.qpr[rs] = tmp[1];
309 dprintk(KERN_INFO "KVM: PSQ_LD [0x%x, 0x%x] at 0x%lx (%d)\n", tmp[0],
310 tmp[1], addr, w ? 4 : 8);
316 static int kvmppc_emulate_psq_store(struct kvm_run *run, struct kvm_vcpu *vcpu,
317 int rs, ulong addr, bool w, int i)
319 int emulated = EMULATE_FAIL;
322 int len = w ? sizeof(u32) : sizeof(u64);
324 kvm_cvt_df(&VCPU_FPR(vcpu, rs), &tmp[0]);
325 tmp[1] = vcpu->arch.qpr[rs];
327 r = kvmppc_st(vcpu, &addr, len, tmp, true);
328 vcpu->arch.paddr_accessed = addr;
330 kvmppc_inject_pf(vcpu, addr, true);
331 } else if ((r == EMULATE_DO_MMIO) && w) {
332 emulated = kvmppc_handle_store(run, vcpu, tmp[0], 4, 1);
333 } else if (r == EMULATE_DO_MMIO) {
334 u64 val = ((u64)tmp[0] << 32) | tmp[1];
335 emulated = kvmppc_handle_store(run, vcpu, val, 8, 1);
337 emulated = EMULATE_DONE;
340 dprintk(KERN_INFO "KVM: PSQ_ST [0x%x, 0x%x] at 0x%lx (%d)\n",
341 tmp[0], tmp[1], addr, len);
347 * Cuts out inst bits with ordering according to spec.
348 * That means the leftmost bit is zero. All given bits are included.
350 static inline u32 inst_get_field(u32 inst, int msb, int lsb)
352 return kvmppc_get_field(inst, msb + 32, lsb + 32);
356 * Replaces inst bits with ordering according to spec.
358 static inline u32 inst_set_field(u32 inst, int msb, int lsb, int value)
360 return kvmppc_set_field(inst, msb + 32, lsb + 32, value);
363 bool kvmppc_inst_is_paired_single(struct kvm_vcpu *vcpu, u32 inst)
365 if (!(vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE))
368 switch (get_op(inst)) {
384 switch (inst_get_field(inst, 21, 30)) {
395 case OP_4X_PS_MERGE00:
396 case OP_4X_PS_MERGE01:
397 case OP_4X_PS_MERGE10:
398 case OP_4X_PS_MERGE11:
402 switch (inst_get_field(inst, 25, 30)) {
404 case OP_4XW_PSQ_STUX:
408 switch (inst_get_field(inst, 26, 30)) {
413 case OP_4A_PS_MADDS0:
414 case OP_4A_PS_MADDS1:
421 case OP_4A_PS_RSQRTE:
430 switch (inst_get_field(inst, 21, 30)) {
438 switch (inst_get_field(inst, 26, 30)) {
448 switch (inst_get_field(inst, 21, 30)) {
470 switch (inst_get_field(inst, 26, 30)) {
481 switch (inst_get_field(inst, 21, 30)) {
499 static int get_d_signext(u32 inst)
501 int d = inst & 0x8ff;
509 static int kvmppc_ps_three_in(struct kvm_vcpu *vcpu, bool rc,
510 int reg_out, int reg_in1, int reg_in2,
511 int reg_in3, int scalar,
512 void (*func)(u64 *fpscr,
514 u32 *src2, u32 *src3))
516 u32 *qpr = vcpu->arch.qpr;
518 u32 ps0_in1, ps0_in2, ps0_in3;
519 u32 ps1_in1, ps1_in2, ps1_in3;
525 kvm_cvt_df(&VCPU_FPR(vcpu, reg_in1), &ps0_in1);
526 kvm_cvt_df(&VCPU_FPR(vcpu, reg_in2), &ps0_in2);
527 kvm_cvt_df(&VCPU_FPR(vcpu, reg_in3), &ps0_in3);
529 if (scalar & SCALAR_LOW)
530 ps0_in2 = qpr[reg_in2];
532 func(&vcpu->arch.fp.fpscr, &ps0_out, &ps0_in1, &ps0_in2, &ps0_in3);
534 dprintk(KERN_INFO "PS3 ps0 -> f(0x%x, 0x%x, 0x%x) = 0x%x\n",
535 ps0_in1, ps0_in2, ps0_in3, ps0_out);
537 if (!(scalar & SCALAR_NO_PS0))
538 kvm_cvt_fd(&ps0_out, &VCPU_FPR(vcpu, reg_out));
541 ps1_in1 = qpr[reg_in1];
542 ps1_in2 = qpr[reg_in2];
543 ps1_in3 = qpr[reg_in3];
545 if (scalar & SCALAR_HIGH)
548 if (!(scalar & SCALAR_NO_PS1))
549 func(&vcpu->arch.fp.fpscr, &qpr[reg_out], &ps1_in1, &ps1_in2, &ps1_in3);
551 dprintk(KERN_INFO "PS3 ps1 -> f(0x%x, 0x%x, 0x%x) = 0x%x\n",
552 ps1_in1, ps1_in2, ps1_in3, qpr[reg_out]);
557 static int kvmppc_ps_two_in(struct kvm_vcpu *vcpu, bool rc,
558 int reg_out, int reg_in1, int reg_in2,
560 void (*func)(u64 *fpscr,
564 u32 *qpr = vcpu->arch.qpr;
566 u32 ps0_in1, ps0_in2;
568 u32 ps1_in1, ps1_in2;
574 kvm_cvt_df(&VCPU_FPR(vcpu, reg_in1), &ps0_in1);
576 if (scalar & SCALAR_LOW)
577 ps0_in2 = qpr[reg_in2];
579 kvm_cvt_df(&VCPU_FPR(vcpu, reg_in2), &ps0_in2);
581 func(&vcpu->arch.fp.fpscr, &ps0_out, &ps0_in1, &ps0_in2);
583 if (!(scalar & SCALAR_NO_PS0)) {
584 dprintk(KERN_INFO "PS2 ps0 -> f(0x%x, 0x%x) = 0x%x\n",
585 ps0_in1, ps0_in2, ps0_out);
587 kvm_cvt_fd(&ps0_out, &VCPU_FPR(vcpu, reg_out));
591 ps1_in1 = qpr[reg_in1];
592 ps1_in2 = qpr[reg_in2];
594 if (scalar & SCALAR_HIGH)
597 func(&vcpu->arch.fp.fpscr, &ps1_out, &ps1_in1, &ps1_in2);
599 if (!(scalar & SCALAR_NO_PS1)) {
600 qpr[reg_out] = ps1_out;
602 dprintk(KERN_INFO "PS2 ps1 -> f(0x%x, 0x%x) = 0x%x\n",
603 ps1_in1, ps1_in2, qpr[reg_out]);
609 static int kvmppc_ps_one_in(struct kvm_vcpu *vcpu, bool rc,
610 int reg_out, int reg_in,
612 u32 *dst, u32 *src1))
614 u32 *qpr = vcpu->arch.qpr;
622 kvm_cvt_df(&VCPU_FPR(vcpu, reg_in), &ps0_in);
623 func(&vcpu->arch.fp.fpscr, &ps0_out, &ps0_in);
625 dprintk(KERN_INFO "PS1 ps0 -> f(0x%x) = 0x%x\n",
628 kvm_cvt_fd(&ps0_out, &VCPU_FPR(vcpu, reg_out));
631 ps1_in = qpr[reg_in];
632 func(&vcpu->arch.fp.fpscr, &qpr[reg_out], &ps1_in);
634 dprintk(KERN_INFO "PS1 ps1 -> f(0x%x) = 0x%x\n",
635 ps1_in, qpr[reg_out]);
640 int kvmppc_emulate_paired_single(struct kvm_run *run, struct kvm_vcpu *vcpu)
642 u32 inst = kvmppc_get_last_inst(vcpu);
643 enum emulation_result emulated = EMULATE_DONE;
645 int ax_rd = inst_get_field(inst, 6, 10);
646 int ax_ra = inst_get_field(inst, 11, 15);
647 int ax_rb = inst_get_field(inst, 16, 20);
648 int ax_rc = inst_get_field(inst, 21, 25);
649 short full_d = inst_get_field(inst, 16, 31);
651 u64 *fpr_d = &VCPU_FPR(vcpu, ax_rd);
652 u64 *fpr_a = &VCPU_FPR(vcpu, ax_ra);
653 u64 *fpr_b = &VCPU_FPR(vcpu, ax_rb);
654 u64 *fpr_c = &VCPU_FPR(vcpu, ax_rc);
656 bool rcomp = (inst & 1) ? true : false;
657 u32 cr = kvmppc_get_cr(vcpu);
662 if (!kvmppc_inst_is_paired_single(vcpu, inst))
665 if (!(kvmppc_get_msr(vcpu) & MSR_FP)) {
666 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL);
667 return EMULATE_AGAIN;
670 kvmppc_giveup_ext(vcpu, MSR_FP);
673 /* Do we need to clear FE0 / FE1 here? Don't think so. */
676 for (i = 0; i < ARRAY_SIZE(vcpu->arch.fp.fpr); i++) {
678 kvm_cvt_df(&VCPU_FPR(vcpu, i), &f);
679 dprintk(KERN_INFO "FPR[%d] = 0x%x / 0x%llx QPR[%d] = 0x%x\n",
680 i, f, VCPU_FPR(vcpu, i), i, vcpu->arch.qpr[i]);
684 switch (get_op(inst)) {
687 ulong addr = ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0;
688 bool w = inst_get_field(inst, 16, 16) ? true : false;
689 int i = inst_get_field(inst, 17, 19);
691 addr += get_d_signext(inst);
692 emulated = kvmppc_emulate_psq_load(run, vcpu, ax_rd, addr, w, i);
697 ulong addr = kvmppc_get_gpr(vcpu, ax_ra);
698 bool w = inst_get_field(inst, 16, 16) ? true : false;
699 int i = inst_get_field(inst, 17, 19);
701 addr += get_d_signext(inst);
702 emulated = kvmppc_emulate_psq_load(run, vcpu, ax_rd, addr, w, i);
704 if (emulated == EMULATE_DONE)
705 kvmppc_set_gpr(vcpu, ax_ra, addr);
710 ulong addr = ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0;
711 bool w = inst_get_field(inst, 16, 16) ? true : false;
712 int i = inst_get_field(inst, 17, 19);
714 addr += get_d_signext(inst);
715 emulated = kvmppc_emulate_psq_store(run, vcpu, ax_rd, addr, w, i);
720 ulong addr = kvmppc_get_gpr(vcpu, ax_ra);
721 bool w = inst_get_field(inst, 16, 16) ? true : false;
722 int i = inst_get_field(inst, 17, 19);
724 addr += get_d_signext(inst);
725 emulated = kvmppc_emulate_psq_store(run, vcpu, ax_rd, addr, w, i);
727 if (emulated == EMULATE_DONE)
728 kvmppc_set_gpr(vcpu, ax_ra, addr);
733 switch (inst_get_field(inst, 21, 30)) {
736 emulated = EMULATE_FAIL;
740 ulong addr = ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0;
741 bool w = inst_get_field(inst, 21, 21) ? true : false;
742 int i = inst_get_field(inst, 22, 24);
744 addr += kvmppc_get_gpr(vcpu, ax_rb);
745 emulated = kvmppc_emulate_psq_load(run, vcpu, ax_rd, addr, w, i);
750 emulated = EMULATE_FAIL;
754 ulong addr = kvmppc_get_gpr(vcpu, ax_ra);
755 bool w = inst_get_field(inst, 21, 21) ? true : false;
756 int i = inst_get_field(inst, 22, 24);
758 addr += kvmppc_get_gpr(vcpu, ax_rb);
759 emulated = kvmppc_emulate_psq_load(run, vcpu, ax_rd, addr, w, i);
761 if (emulated == EMULATE_DONE)
762 kvmppc_set_gpr(vcpu, ax_ra, addr);
766 VCPU_FPR(vcpu, ax_rd) = VCPU_FPR(vcpu, ax_rb);
767 VCPU_FPR(vcpu, ax_rd) ^= 0x8000000000000000ULL;
768 vcpu->arch.qpr[ax_rd] = vcpu->arch.qpr[ax_rb];
769 vcpu->arch.qpr[ax_rd] ^= 0x80000000;
773 emulated = EMULATE_FAIL;
777 VCPU_FPR(vcpu, ax_rd) = VCPU_FPR(vcpu, ax_rb);
778 vcpu->arch.qpr[ax_rd] = vcpu->arch.qpr[ax_rb];
782 emulated = EMULATE_FAIL;
786 VCPU_FPR(vcpu, ax_rd) = VCPU_FPR(vcpu, ax_rb);
787 VCPU_FPR(vcpu, ax_rd) |= 0x8000000000000000ULL;
788 vcpu->arch.qpr[ax_rd] = vcpu->arch.qpr[ax_rb];
789 vcpu->arch.qpr[ax_rd] |= 0x80000000;
793 VCPU_FPR(vcpu, ax_rd) = VCPU_FPR(vcpu, ax_rb);
794 VCPU_FPR(vcpu, ax_rd) &= ~0x8000000000000000ULL;
795 vcpu->arch.qpr[ax_rd] = vcpu->arch.qpr[ax_rb];
796 vcpu->arch.qpr[ax_rd] &= ~0x80000000;
798 case OP_4X_PS_MERGE00:
800 VCPU_FPR(vcpu, ax_rd) = VCPU_FPR(vcpu, ax_ra);
801 /* vcpu->arch.qpr[ax_rd] = VCPU_FPR(vcpu, ax_rb); */
802 kvm_cvt_df(&VCPU_FPR(vcpu, ax_rb),
803 &vcpu->arch.qpr[ax_rd]);
805 case OP_4X_PS_MERGE01:
807 VCPU_FPR(vcpu, ax_rd) = VCPU_FPR(vcpu, ax_ra);
808 vcpu->arch.qpr[ax_rd] = vcpu->arch.qpr[ax_rb];
810 case OP_4X_PS_MERGE10:
812 /* VCPU_FPR(vcpu, ax_rd) = vcpu->arch.qpr[ax_ra]; */
813 kvm_cvt_fd(&vcpu->arch.qpr[ax_ra],
814 &VCPU_FPR(vcpu, ax_rd));
815 /* vcpu->arch.qpr[ax_rd] = VCPU_FPR(vcpu, ax_rb); */
816 kvm_cvt_df(&VCPU_FPR(vcpu, ax_rb),
817 &vcpu->arch.qpr[ax_rd]);
819 case OP_4X_PS_MERGE11:
821 /* VCPU_FPR(vcpu, ax_rd) = vcpu->arch.qpr[ax_ra]; */
822 kvm_cvt_fd(&vcpu->arch.qpr[ax_ra],
823 &VCPU_FPR(vcpu, ax_rd));
824 vcpu->arch.qpr[ax_rd] = vcpu->arch.qpr[ax_rb];
828 switch (inst_get_field(inst, 25, 30)) {
831 ulong addr = ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0;
832 bool w = inst_get_field(inst, 21, 21) ? true : false;
833 int i = inst_get_field(inst, 22, 24);
835 addr += kvmppc_get_gpr(vcpu, ax_rb);
836 emulated = kvmppc_emulate_psq_store(run, vcpu, ax_rd, addr, w, i);
839 case OP_4XW_PSQ_STUX:
841 ulong addr = kvmppc_get_gpr(vcpu, ax_ra);
842 bool w = inst_get_field(inst, 21, 21) ? true : false;
843 int i = inst_get_field(inst, 22, 24);
845 addr += kvmppc_get_gpr(vcpu, ax_rb);
846 emulated = kvmppc_emulate_psq_store(run, vcpu, ax_rd, addr, w, i);
848 if (emulated == EMULATE_DONE)
849 kvmppc_set_gpr(vcpu, ax_ra, addr);
854 switch (inst_get_field(inst, 26, 30)) {
856 emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd,
857 ax_rb, ax_ra, SCALAR_NO_PS0 | SCALAR_HIGH, fps_fadds);
858 VCPU_FPR(vcpu, ax_rd) = VCPU_FPR(vcpu, ax_rc);
861 emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd,
862 ax_ra, ax_rb, SCALAR_NO_PS1 | SCALAR_LOW, fps_fadds);
863 vcpu->arch.qpr[ax_rd] = vcpu->arch.qpr[ax_rc];
866 emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd,
867 ax_ra, ax_rc, SCALAR_HIGH, fps_fmuls);
870 emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd,
871 ax_ra, ax_rc, SCALAR_LOW, fps_fmuls);
873 case OP_4A_PS_MADDS0:
874 emulated = kvmppc_ps_three_in(vcpu, rcomp, ax_rd,
875 ax_ra, ax_rc, ax_rb, SCALAR_HIGH, fps_fmadds);
877 case OP_4A_PS_MADDS1:
878 emulated = kvmppc_ps_three_in(vcpu, rcomp, ax_rd,
879 ax_ra, ax_rc, ax_rb, SCALAR_LOW, fps_fmadds);
882 emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd,
883 ax_ra, ax_rb, SCALAR_NONE, fps_fdivs);
886 emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd,
887 ax_ra, ax_rb, SCALAR_NONE, fps_fsubs);
890 emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd,
891 ax_ra, ax_rb, SCALAR_NONE, fps_fadds);
894 emulated = kvmppc_ps_three_in(vcpu, rcomp, ax_rd,
895 ax_ra, ax_rc, ax_rb, SCALAR_NONE, fps_fsel);
898 emulated = kvmppc_ps_one_in(vcpu, rcomp, ax_rd,
902 emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd,
903 ax_ra, ax_rc, SCALAR_NONE, fps_fmuls);
905 case OP_4A_PS_RSQRTE:
906 emulated = kvmppc_ps_one_in(vcpu, rcomp, ax_rd,
910 emulated = kvmppc_ps_three_in(vcpu, rcomp, ax_rd,
911 ax_ra, ax_rc, ax_rb, SCALAR_NONE, fps_fmsubs);
914 emulated = kvmppc_ps_three_in(vcpu, rcomp, ax_rd,
915 ax_ra, ax_rc, ax_rb, SCALAR_NONE, fps_fmadds);
918 emulated = kvmppc_ps_three_in(vcpu, rcomp, ax_rd,
919 ax_ra, ax_rc, ax_rb, SCALAR_NONE, fps_fnmsubs);
922 emulated = kvmppc_ps_three_in(vcpu, rcomp, ax_rd,
923 ax_ra, ax_rc, ax_rb, SCALAR_NONE, fps_fnmadds);
928 /* Real FPU operations */
932 ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) + full_d;
934 emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd, addr,
940 ulong addr = kvmppc_get_gpr(vcpu, ax_ra) + full_d;
942 emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd, addr,
945 if (emulated == EMULATE_DONE)
946 kvmppc_set_gpr(vcpu, ax_ra, addr);
951 ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) + full_d;
953 emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd, addr,
959 ulong addr = kvmppc_get_gpr(vcpu, ax_ra) + full_d;
961 emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd, addr,
964 if (emulated == EMULATE_DONE)
965 kvmppc_set_gpr(vcpu, ax_ra, addr);
970 ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) + full_d;
972 emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd, addr,
978 ulong addr = kvmppc_get_gpr(vcpu, ax_ra) + full_d;
980 emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd, addr,
983 if (emulated == EMULATE_DONE)
984 kvmppc_set_gpr(vcpu, ax_ra, addr);
989 ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) + full_d;
991 emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd, addr,
997 ulong addr = kvmppc_get_gpr(vcpu, ax_ra) + full_d;
999 emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd, addr,
1002 if (emulated == EMULATE_DONE)
1003 kvmppc_set_gpr(vcpu, ax_ra, addr);
1007 switch (inst_get_field(inst, 21, 30)) {
1010 ulong addr = ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0;
1012 addr += kvmppc_get_gpr(vcpu, ax_rb);
1013 emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd,
1014 addr, FPU_LS_SINGLE);
1019 ulong addr = kvmppc_get_gpr(vcpu, ax_ra) +
1020 kvmppc_get_gpr(vcpu, ax_rb);
1022 emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd,
1023 addr, FPU_LS_SINGLE);
1025 if (emulated == EMULATE_DONE)
1026 kvmppc_set_gpr(vcpu, ax_ra, addr);
1031 ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) +
1032 kvmppc_get_gpr(vcpu, ax_rb);
1034 emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd,
1035 addr, FPU_LS_DOUBLE);
1040 ulong addr = kvmppc_get_gpr(vcpu, ax_ra) +
1041 kvmppc_get_gpr(vcpu, ax_rb);
1043 emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd,
1044 addr, FPU_LS_DOUBLE);
1046 if (emulated == EMULATE_DONE)
1047 kvmppc_set_gpr(vcpu, ax_ra, addr);
1052 ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) +
1053 kvmppc_get_gpr(vcpu, ax_rb);
1055 emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd,
1056 addr, FPU_LS_SINGLE);
1061 ulong addr = kvmppc_get_gpr(vcpu, ax_ra) +
1062 kvmppc_get_gpr(vcpu, ax_rb);
1064 emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd,
1065 addr, FPU_LS_SINGLE);
1067 if (emulated == EMULATE_DONE)
1068 kvmppc_set_gpr(vcpu, ax_ra, addr);
1073 ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) +
1074 kvmppc_get_gpr(vcpu, ax_rb);
1076 emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd,
1077 addr, FPU_LS_DOUBLE);
1082 ulong addr = kvmppc_get_gpr(vcpu, ax_ra) +
1083 kvmppc_get_gpr(vcpu, ax_rb);
1085 emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd,
1086 addr, FPU_LS_DOUBLE);
1088 if (emulated == EMULATE_DONE)
1089 kvmppc_set_gpr(vcpu, ax_ra, addr);
1094 ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) +
1095 kvmppc_get_gpr(vcpu, ax_rb);
1097 emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd,
1106 switch (inst_get_field(inst, 21, 30)) {
1108 fpd_fadds(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_b);
1109 kvmppc_sync_qpr(vcpu, ax_rd);
1112 fpd_fsubs(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_b);
1113 kvmppc_sync_qpr(vcpu, ax_rd);
1116 fpd_fdivs(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_b);
1117 kvmppc_sync_qpr(vcpu, ax_rd);
1120 fpd_fres(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_b);
1121 kvmppc_sync_qpr(vcpu, ax_rd);
1123 case OP_59_FRSQRTES:
1124 fpd_frsqrtes(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_b);
1125 kvmppc_sync_qpr(vcpu, ax_rd);
1128 switch (inst_get_field(inst, 26, 30)) {
1130 fpd_fmuls(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_c);
1131 kvmppc_sync_qpr(vcpu, ax_rd);
1134 fpd_fmsubs(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b);
1135 kvmppc_sync_qpr(vcpu, ax_rd);
1138 fpd_fmadds(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b);
1139 kvmppc_sync_qpr(vcpu, ax_rd);
1142 fpd_fnmsubs(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b);
1143 kvmppc_sync_qpr(vcpu, ax_rd);
1146 fpd_fnmadds(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b);
1147 kvmppc_sync_qpr(vcpu, ax_rd);
1152 switch (inst_get_field(inst, 21, 30)) {
1157 /* XXX need to implement */
1160 /* XXX missing CR */
1161 *fpr_d = vcpu->arch.fp.fpscr;
1164 /* XXX missing fm bits */
1165 /* XXX missing CR */
1166 vcpu->arch.fp.fpscr = *fpr_b;
1171 u32 cr0_mask = 0xf0000000;
1172 u32 cr_shift = inst_get_field(inst, 6, 8) * 4;
1174 fpd_fcmpu(&vcpu->arch.fp.fpscr, &tmp_cr, fpr_a, fpr_b);
1175 cr &= ~(cr0_mask >> cr_shift);
1176 cr |= (cr & cr0_mask) >> cr_shift;
1182 u32 cr0_mask = 0xf0000000;
1183 u32 cr_shift = inst_get_field(inst, 6, 8) * 4;
1185 fpd_fcmpo(&vcpu->arch.fp.fpscr, &tmp_cr, fpr_a, fpr_b);
1186 cr &= ~(cr0_mask >> cr_shift);
1187 cr |= (cr & cr0_mask) >> cr_shift;
1191 fpd_fneg(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_b);
1197 fpd_fabs(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_b);
1200 fpd_fcpsgn(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_b);
1203 fpd_fdiv(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_b);
1206 fpd_fadd(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_b);
1209 fpd_fsub(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_b);
1212 fpd_fctiw(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_b);
1215 fpd_fctiwz(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_b);
1218 fpd_frsp(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_b);
1219 kvmppc_sync_qpr(vcpu, ax_rd);
1226 fpd_fsqrt(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_b);
1227 /* fD = 1.0f / fD */
1228 fpd_fdiv(&vcpu->arch.fp.fpscr, &cr, fpr_d, (u64*)&one, fpr_d);
1232 switch (inst_get_field(inst, 26, 30)) {
1234 fpd_fmul(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_c);
1237 fpd_fsel(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b);
1240 fpd_fmsub(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b);
1243 fpd_fmadd(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b);
1246 fpd_fnmsub(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b);
1249 fpd_fnmadd(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b);
1256 for (i = 0; i < ARRAY_SIZE(vcpu->arch.fp.fpr); i++) {
1258 kvm_cvt_df(&VCPU_FPR(vcpu, i), &f);
1259 dprintk(KERN_INFO "FPR[%d] = 0x%x\n", i, f);
1264 kvmppc_set_cr(vcpu, cr);