2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
15 * Copyright SUSE Linux Products GmbH 2009
17 * Authors: Alexander Graf <agraf@suse.de>
20 #include <asm/kvm_ppc.h>
21 #include <asm/disassemble.h>
22 #include <asm/kvm_book3s.h>
25 #define OP_19_XOP_RFID 18
26 #define OP_19_XOP_RFI 50
28 #define OP_31_XOP_MFMSR 83
29 #define OP_31_XOP_MTMSR 146
30 #define OP_31_XOP_MTMSRD 178
31 #define OP_31_XOP_MTSRIN 242
32 #define OP_31_XOP_TLBIEL 274
33 #define OP_31_XOP_TLBIE 306
34 #define OP_31_XOP_SLBMTE 402
35 #define OP_31_XOP_SLBIE 434
36 #define OP_31_XOP_SLBIA 498
37 #define OP_31_XOP_MFSRIN 659
38 #define OP_31_XOP_SLBMFEV 851
39 #define OP_31_XOP_EIOIO 854
40 #define OP_31_XOP_SLBMFEE 915
42 /* DCBZ is actually 1014, but we patch it to 1010 so we get a trap */
43 #define OP_31_XOP_DCBZ 1010
45 int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
46 unsigned int inst, int *advance)
48 int emulated = EMULATE_DONE;
50 switch (get_op(inst)) {
52 switch (get_xop(inst)) {
55 vcpu->arch.pc = vcpu->arch.srr0;
56 kvmppc_set_msr(vcpu, vcpu->arch.srr1);
61 emulated = EMULATE_FAIL;
66 switch (get_xop(inst)) {
68 vcpu->arch.gpr[get_rt(inst)] = vcpu->arch.msr;
70 case OP_31_XOP_MTMSRD:
72 ulong rs = vcpu->arch.gpr[get_rs(inst)];
74 vcpu->arch.msr &= ~(MSR_RI | MSR_EE);
75 vcpu->arch.msr |= rs & (MSR_RI | MSR_EE);
77 kvmppc_set_msr(vcpu, rs);
81 kvmppc_set_msr(vcpu, vcpu->arch.gpr[get_rs(inst)]);
83 case OP_31_XOP_MFSRIN:
87 srnum = (vcpu->arch.gpr[get_rb(inst)] >> 28) & 0xf;
88 if (vcpu->arch.mmu.mfsrin) {
90 sr = vcpu->arch.mmu.mfsrin(vcpu, srnum);
91 vcpu->arch.gpr[get_rt(inst)] = sr;
95 case OP_31_XOP_MTSRIN:
96 vcpu->arch.mmu.mtsrin(vcpu,
97 (vcpu->arch.gpr[get_rb(inst)] >> 28) & 0xf,
98 vcpu->arch.gpr[get_rs(inst)]);
100 case OP_31_XOP_TLBIE:
101 case OP_31_XOP_TLBIEL:
103 bool large = (inst & 0x00200000) ? true : false;
104 ulong addr = vcpu->arch.gpr[get_rb(inst)];
105 vcpu->arch.mmu.tlbie(vcpu, addr, large);
108 case OP_31_XOP_EIOIO:
110 case OP_31_XOP_SLBMTE:
111 if (!vcpu->arch.mmu.slbmte)
114 vcpu->arch.mmu.slbmte(vcpu, vcpu->arch.gpr[get_rs(inst)],
115 vcpu->arch.gpr[get_rb(inst)]);
117 case OP_31_XOP_SLBIE:
118 if (!vcpu->arch.mmu.slbie)
121 vcpu->arch.mmu.slbie(vcpu, vcpu->arch.gpr[get_rb(inst)]);
123 case OP_31_XOP_SLBIA:
124 if (!vcpu->arch.mmu.slbia)
127 vcpu->arch.mmu.slbia(vcpu);
129 case OP_31_XOP_SLBMFEE:
130 if (!vcpu->arch.mmu.slbmfee) {
131 emulated = EMULATE_FAIL;
135 rb = vcpu->arch.gpr[get_rb(inst)];
136 t = vcpu->arch.mmu.slbmfee(vcpu, rb);
137 vcpu->arch.gpr[get_rt(inst)] = t;
140 case OP_31_XOP_SLBMFEV:
141 if (!vcpu->arch.mmu.slbmfev) {
142 emulated = EMULATE_FAIL;
146 rb = vcpu->arch.gpr[get_rb(inst)];
147 t = vcpu->arch.mmu.slbmfev(vcpu, rb);
148 vcpu->arch.gpr[get_rt(inst)] = t;
153 ulong rb = vcpu->arch.gpr[get_rb(inst)];
156 u32 zeros[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
159 ra = vcpu->arch.gpr[get_ra(inst)];
161 addr = (ra + rb) & ~31ULL;
162 if (!(vcpu->arch.msr & MSR_SF))
165 if (kvmppc_st(vcpu, addr, 32, zeros)) {
166 vcpu->arch.dear = addr;
167 vcpu->arch.fault_dear = addr;
168 to_book3s(vcpu)->dsisr = DSISR_PROTFAULT |
170 kvmppc_book3s_queue_irqprio(vcpu,
171 BOOK3S_INTERRUPT_DATA_STORAGE);
172 kvmppc_mmu_pte_flush(vcpu, addr, ~0xFFFULL);
178 emulated = EMULATE_FAIL;
182 emulated = EMULATE_FAIL;
188 void kvmppc_set_bat(struct kvm_vcpu *vcpu, struct kvmppc_bat *bat, bool upper,
193 u32 bl = (val >> 2) & 0x7ff;
194 bat->bepi_mask = (~bl << 17);
195 bat->bepi = val & 0xfffe0000;
196 bat->vs = (val & 2) ? 1 : 0;
197 bat->vp = (val & 1) ? 1 : 0;
198 bat->raw = (bat->raw & 0xffffffff00000000ULL) | val;
201 bat->brpn = val & 0xfffe0000;
202 bat->wimg = (val >> 3) & 0xf;
204 bat->raw = (bat->raw & 0x00000000ffffffffULL) | ((u64)val << 32);
208 static void kvmppc_write_bat(struct kvm_vcpu *vcpu, int sprn, u32 val)
210 struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
211 struct kvmppc_bat *bat;
214 case SPRN_IBAT0U ... SPRN_IBAT3L:
215 bat = &vcpu_book3s->ibat[(sprn - SPRN_IBAT0U) / 2];
217 case SPRN_IBAT4U ... SPRN_IBAT7L:
218 bat = &vcpu_book3s->ibat[(sprn - SPRN_IBAT4U) / 2];
220 case SPRN_DBAT0U ... SPRN_DBAT3L:
221 bat = &vcpu_book3s->dbat[(sprn - SPRN_DBAT0U) / 2];
223 case SPRN_DBAT4U ... SPRN_DBAT7L:
224 bat = &vcpu_book3s->dbat[(sprn - SPRN_DBAT4U) / 2];
230 kvmppc_set_bat(vcpu, bat, !(sprn % 2), val);
233 int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
235 int emulated = EMULATE_DONE;
239 to_book3s(vcpu)->sdr1 = vcpu->arch.gpr[rs];
242 to_book3s(vcpu)->dsisr = vcpu->arch.gpr[rs];
245 vcpu->arch.dear = vcpu->arch.gpr[rs];
248 to_book3s(vcpu)->hior = vcpu->arch.gpr[rs];
250 case SPRN_IBAT0U ... SPRN_IBAT3L:
251 case SPRN_IBAT4U ... SPRN_IBAT7L:
252 case SPRN_DBAT0U ... SPRN_DBAT3L:
253 case SPRN_DBAT4U ... SPRN_DBAT7L:
254 kvmppc_write_bat(vcpu, sprn, (u32)vcpu->arch.gpr[rs]);
255 /* BAT writes happen so rarely that we're ok to flush
257 kvmppc_mmu_pte_flush(vcpu, 0, 0);
260 to_book3s(vcpu)->hid[0] = vcpu->arch.gpr[rs];
263 to_book3s(vcpu)->hid[1] = vcpu->arch.gpr[rs];
266 to_book3s(vcpu)->hid[2] = vcpu->arch.gpr[rs];
269 to_book3s(vcpu)->hid[4] = vcpu->arch.gpr[rs];
272 to_book3s(vcpu)->hid[5] = vcpu->arch.gpr[rs];
273 /* guest HID5 set can change is_dcbz32 */
274 if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
276 vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32;
286 printk(KERN_INFO "KVM: invalid SPR write: %d\n", sprn);
288 emulated = EMULATE_FAIL;
296 int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
298 int emulated = EMULATE_DONE;
302 vcpu->arch.gpr[rt] = to_book3s(vcpu)->sdr1;
305 vcpu->arch.gpr[rt] = to_book3s(vcpu)->dsisr;
308 vcpu->arch.gpr[rt] = vcpu->arch.dear;
311 vcpu->arch.gpr[rt] = to_book3s(vcpu)->hior;
314 vcpu->arch.gpr[rt] = to_book3s(vcpu)->hid[0];
317 vcpu->arch.gpr[rt] = to_book3s(vcpu)->hid[1];
320 vcpu->arch.gpr[rt] = to_book3s(vcpu)->hid[2];
323 vcpu->arch.gpr[rt] = to_book3s(vcpu)->hid[4];
326 vcpu->arch.gpr[rt] = to_book3s(vcpu)->hid[5];
333 vcpu->arch.gpr[rt] = 0;
336 printk(KERN_INFO "KVM: invalid SPR read: %d\n", sprn);
338 emulated = EMULATE_FAIL;