2 * This file contains the 64-bit "server" PowerPC variant
3 * of the low level exception handling including exception
4 * vectors, exception return, part of the slb and stab
5 * handling and other fixed offset specific things.
7 * This file is meant to be #included from head_64.S due to
8 * position dependent assembly.
10 * Most of this originates from head_64.S and thus has the same
15 #include <asm/hw_irq.h>
16 #include <asm/exception-64s.h>
17 #include <asm/ptrace.h>
20 * We layout physical memory as follows:
21 * 0x0000 - 0x00ff : Secondary processor spin code
22 * 0x0100 - 0x2fff : pSeries Interrupt prologs
23 * 0x3000 - 0x5fff : interrupt support common interrupt prologs
24 * 0x6000 - 0x6fff : Initial (CPU0) segment table
25 * 0x7000 - 0x7fff : FWNMI data area
26 * 0x8000 - : Early init and support code
30 * This is the start of the interrupt handlers for pSeries
31 * This code runs with relocation off.
32 * Code from here to __end_interrupts gets copied down to real
33 * address 0x100 when we are running a relocatable kernel.
34 * Therefore any relative branches in this section must only
35 * branch to labels in this section.
38 .globl __start_interrupts
41 .globl system_reset_pSeries;
45 #ifdef CONFIG_PPC_P7_NAP
47 /* Running native on arch 2.06 or later, check if we are
48 * waking up from nap. We only handle no state loss and
49 * supervisor state loss. We do -not- handle hypervisor
50 * state loss at this time.
53 rlwinm. r13,r13,47-31,30,31
56 /* waking up from powersave (nap) state */
58 /* Total loss of HV state is fatal, we could try to use the
59 * PIR to locate a PACA, then use an emergency stack etc...
60 * but for now, let's just stay stuck here
65 #ifdef CONFIG_KVM_BOOK3S_64_HV
66 lbz r0,PACAPROCSTART(r13)
70 stb r0,PACAPROCSTART(r13)
76 b .power7_wakeup_noloss
77 2: b .power7_wakeup_loss
79 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
80 #endif /* CONFIG_PPC_P7_NAP */
81 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
85 machine_check_pSeries_1:
86 /* This is moved out of line as it can be patched by FW, but
87 * some code path might still want to branch into the original
90 b machine_check_pSeries
93 .globl data_access_pSeries
98 b data_access_check_stab
100 END_MMU_FTR_SECTION_IFCLR(MMU_FTR_SLB)
101 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common, EXC_STD,
105 .globl data_access_slb_pSeries
106 data_access_slb_pSeries:
109 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST, 0x380)
110 std r3,PACA_EXSLB+EX_R3(r13)
113 /* Keep that around for when we re-implement dynamic VSIDs */
115 bge slb_miss_user_pseries
116 #endif /* __DISABLED__ */
118 #ifndef CONFIG_RELOCATABLE
122 * We can't just use a direct branch to .slb_miss_realmode
123 * because the distance from here to there depends on where
124 * the kernel ends up being put.
127 ld r10,PACAKBASE(r13)
128 LOAD_HANDLER(r10, .slb_miss_realmode)
133 STD_EXCEPTION_PSERIES(0x400, 0x400, instruction_access)
136 .globl instruction_access_slb_pSeries
137 instruction_access_slb_pSeries:
140 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST_PR, 0x480)
141 std r3,PACA_EXSLB+EX_R3(r13)
142 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
144 /* Keep that around for when we re-implement dynamic VSIDs */
146 bge slb_miss_user_pseries
147 #endif /* __DISABLED__ */
149 #ifndef CONFIG_RELOCATABLE
153 ld r10,PACAKBASE(r13)
154 LOAD_HANDLER(r10, .slb_miss_realmode)
159 /* We open code these as we can't have a ". = x" (even with
160 * x = "." within a feature section
163 .globl hardware_interrupt_pSeries;
164 .globl hardware_interrupt_hv;
165 hardware_interrupt_pSeries:
166 hardware_interrupt_hv:
168 _MASKABLE_EXCEPTION_PSERIES(0x502, hardware_interrupt,
169 EXC_HV, SOFTEN_TEST_HV)
170 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x502)
172 _MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt,
173 EXC_STD, SOFTEN_TEST_HV_201)
174 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x500)
175 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
177 STD_EXCEPTION_PSERIES(0x600, 0x600, alignment)
178 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x600)
180 STD_EXCEPTION_PSERIES(0x700, 0x700, program_check)
181 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x700)
183 STD_EXCEPTION_PSERIES(0x800, 0x800, fp_unavailable)
184 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x800)
186 MASKABLE_EXCEPTION_PSERIES(0x900, 0x900, decrementer)
187 MASKABLE_EXCEPTION_HV(0x980, 0x982, decrementer)
189 STD_EXCEPTION_PSERIES(0xa00, 0xa00, trap_0a)
190 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xa00)
192 STD_EXCEPTION_PSERIES(0xb00, 0xb00, trap_0b)
193 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xb00)
196 .globl system_call_pSeries
199 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
202 std r9,PACA_EXGEN+EX_R9(r13)
203 std r10,PACA_EXGEN+EX_R10(r13)
211 END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE)
216 ld r10,PACAKBASE(r13)
217 LOAD_HANDLER(r10, system_call_entry)
222 b . /* prevent speculative execution */
224 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xc00)
226 /* Fast LE/BE switch system call */
227 1: mfspr r12,SPRN_SRR1
230 rfid /* return to userspace */
233 STD_EXCEPTION_PSERIES(0xd00, 0xd00, single_step)
234 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xd00)
236 /* At 0xe??? we have a bunch of hypervisor exceptions, we branch
237 * out of line to handle them
244 b emulation_assist_hv
250 /* We need to deal with the Altivec unavailable exception
251 * here which is at 0xf20, thus in the middle of the
252 * prolog code of the PerformanceMonitor one. A little
253 * trickery is thus necessary
255 performance_monitor_pSeries_1:
257 b performance_monitor_pSeries
259 altivec_unavailable_pSeries_1:
261 b altivec_unavailable_pSeries
263 vsx_unavailable_pSeries_1:
265 b vsx_unavailable_pSeries
267 #ifdef CONFIG_CBE_RAS
268 STD_EXCEPTION_HV(0x1200, 0x1202, cbe_system_error)
269 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1202)
270 #endif /* CONFIG_CBE_RAS */
272 STD_EXCEPTION_PSERIES(0x1300, 0x1300, instruction_breakpoint)
273 KVM_HANDLER_PR_SKIP(PACA_EXGEN, EXC_STD, 0x1300)
275 #ifdef CONFIG_CBE_RAS
276 STD_EXCEPTION_HV(0x1600, 0x1602, cbe_maintenance)
277 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1602)
278 #endif /* CONFIG_CBE_RAS */
280 STD_EXCEPTION_PSERIES(0x1700, 0x1700, altivec_assist)
281 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x1700)
283 #ifdef CONFIG_CBE_RAS
284 STD_EXCEPTION_HV(0x1800, 0x1802, cbe_thermal)
285 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1802)
286 #endif /* CONFIG_CBE_RAS */
290 /*** Out of line interrupts support ***/
292 /* moved from 0x200 */
293 machine_check_pSeries:
294 .globl machine_check_fwnmi
297 SET_SCRATCH0(r13) /* save r13 */
298 EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common,
299 EXC_STD, KVMTEST, 0x200)
300 KVM_HANDLER_SKIP(PACA_EXMC, EXC_STD, 0x200)
302 /* moved from 0x300 */
303 data_access_check_stab:
305 std r9,PACA_EXSLB+EX_R9(r13)
306 std r10,PACA_EXSLB+EX_R10(r13)
310 rlwimi r10,r9,16,0x20
311 #ifdef CONFIG_KVM_BOOK3S_PR
312 lbz r9,HSTATE_IN_GUEST(r13)
313 rlwimi r10,r9,8,0x300
317 beq do_stab_bolted_pSeries
319 ld r9,PACA_EXSLB+EX_R9(r13)
320 ld r10,PACA_EXSLB+EX_R10(r13)
321 b data_access_not_stab
322 do_stab_bolted_pSeries:
323 std r11,PACA_EXSLB+EX_R11(r13)
324 std r12,PACA_EXSLB+EX_R12(r13)
326 std r10,PACA_EXSLB+EX_R13(r13)
327 EXCEPTION_PROLOG_PSERIES_1(.do_stab_bolted, EXC_STD)
329 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x300)
330 KVM_HANDLER_SKIP(PACA_EXSLB, EXC_STD, 0x380)
331 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x400)
332 KVM_HANDLER_PR(PACA_EXSLB, EXC_STD, 0x480)
333 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x900)
334 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x982)
337 /* moved from 0xe00 */
338 STD_EXCEPTION_HV(., 0xe02, h_data_storage)
339 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0xe02)
340 STD_EXCEPTION_HV(., 0xe22, h_instr_storage)
341 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe22)
342 STD_EXCEPTION_HV(., 0xe42, emulation_assist)
343 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe42)
344 STD_EXCEPTION_HV(., 0xe62, hmi_exception) /* need to flush cache ? */
345 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe62)
347 /* moved from 0xf00 */
348 STD_EXCEPTION_PSERIES(., 0xf00, performance_monitor)
349 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf00)
350 STD_EXCEPTION_PSERIES(., 0xf20, altivec_unavailable)
351 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf20)
352 STD_EXCEPTION_PSERIES(., 0xf40, vsx_unavailable)
353 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf40)
356 * An interrupt came in while soft-disabled. We set paca->irq_happened,
357 * then, if it was a decrementer interrupt, we bump the dec to max and
358 * and return, else we hard disable and return. This is called with
359 * r10 containing the value to OR to the paca field.
361 #define MASKED_INTERRUPT(_H) \
362 masked_##_H##interrupt: \
363 std r11,PACA_EXGEN+EX_R11(r13); \
364 lbz r11,PACAIRQHAPPENED(r13); \
366 stb r11,PACAIRQHAPPENED(r13); \
367 andi. r10,r10,PACA_IRQ_DEC; \
370 ori r10,r10,0xffff; \
371 mtspr SPRN_DEC,r10; \
373 1: mfspr r10,SPRN_##_H##SRR1; \
374 rldicl r10,r10,48,1; /* clear MSR_EE */ \
376 mtspr SPRN_##_H##SRR1,r10; \
378 ld r9,PACA_EXGEN+EX_R9(r13); \
379 ld r10,PACA_EXGEN+EX_R10(r13); \
380 ld r11,PACA_EXGEN+EX_R11(r13); \
389 * Called from arch_local_irq_enable when an interrupt needs
390 * to be resent. r3 contains 0x500 or 0x900 to indicate which
391 * kind of interrupt. MSR:EE is already off. We generate a
392 * stackframe like if a real interrupt had happened.
394 * Note: While MSR:EE is off, we need to make sure that _MSR
395 * in the generated frame has EE set to 1 or the exception
396 * handler will not properly re-enable them.
398 _GLOBAL(__replay_interrupt)
399 /* We are going to jump to the exception common code which
400 * will retrieve various register values from the PACA which
401 * we don't give a damn about, so we don't bother storing them.
408 bne decrementer_common
409 b hardware_interrupt_common
411 #ifdef CONFIG_PPC_PSERIES
413 * Vectors for the FWNMI option. Share common code.
415 .globl system_reset_fwnmi
419 SET_SCRATCH0(r13) /* save r13 */
420 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
423 #endif /* CONFIG_PPC_PSERIES */
427 * This is used for when the SLB miss handler has to go virtual,
428 * which doesn't happen for now anymore but will once we re-implement
429 * dynamic VSIDs for shared page tables
431 slb_miss_user_pseries:
432 std r10,PACA_EXGEN+EX_R10(r13)
433 std r11,PACA_EXGEN+EX_R11(r13)
434 std r12,PACA_EXGEN+EX_R12(r13)
436 ld r11,PACA_EXSLB+EX_R9(r13)
437 ld r12,PACA_EXSLB+EX_R3(r13)
438 std r10,PACA_EXGEN+EX_R13(r13)
439 std r11,PACA_EXGEN+EX_R9(r13)
440 std r12,PACA_EXGEN+EX_R3(r13)
443 mfspr r11,SRR0 /* save SRR0 */
444 ori r12,r12,slb_miss_user_common@l /* virt addr of handler */
445 ori r10,r10,MSR_IR|MSR_DR|MSR_RI
447 mfspr r12,SRR1 /* and SRR1 */
450 b . /* prevent spec. execution */
451 #endif /* __DISABLED__ */
454 .globl __end_interrupts
458 * Code from here down to __end_handlers is invoked from the
459 * exception prologs above. Because the prologs assemble the
460 * addresses of these handlers using the LOAD_HANDLER macro,
461 * which uses an addi instruction, these handlers must be in
462 * the first 32k of the kernel image.
465 /*** Common interrupt handlers ***/
467 STD_EXCEPTION_COMMON(0x100, system_reset, .system_reset_exception)
470 * Machine check is different because we use a different
471 * save area: PACA_EXMC instead of PACA_EXGEN.
474 .globl machine_check_common
475 machine_check_common:
476 EXCEPTION_PROLOG_COMMON(0x200, PACA_EXMC)
480 addi r3,r1,STACK_FRAME_OVERHEAD
481 bl .machine_check_exception
484 STD_EXCEPTION_COMMON_ASYNC(0x500, hardware_interrupt, do_IRQ)
485 STD_EXCEPTION_COMMON_ASYNC(0x900, decrementer, .timer_interrupt)
486 STD_EXCEPTION_COMMON(0xa00, trap_0a, .unknown_exception)
487 STD_EXCEPTION_COMMON(0xb00, trap_0b, .unknown_exception)
488 STD_EXCEPTION_COMMON(0xd00, single_step, .single_step_exception)
489 STD_EXCEPTION_COMMON(0xe00, trap_0e, .unknown_exception)
490 STD_EXCEPTION_COMMON(0xe40, emulation_assist, .program_check_exception)
491 STD_EXCEPTION_COMMON(0xe60, hmi_exception, .unknown_exception)
492 STD_EXCEPTION_COMMON_ASYNC(0xf00, performance_monitor, .performance_monitor_exception)
493 STD_EXCEPTION_COMMON(0x1300, instruction_breakpoint, .instruction_breakpoint_exception)
494 #ifdef CONFIG_ALTIVEC
495 STD_EXCEPTION_COMMON(0x1700, altivec_assist, .altivec_assist_exception)
497 STD_EXCEPTION_COMMON(0x1700, altivec_assist, .unknown_exception)
499 #ifdef CONFIG_CBE_RAS
500 STD_EXCEPTION_COMMON(0x1200, cbe_system_error, .cbe_system_error_exception)
501 STD_EXCEPTION_COMMON(0x1600, cbe_maintenance, .cbe_maintenance_exception)
502 STD_EXCEPTION_COMMON(0x1800, cbe_thermal, .cbe_thermal_exception)
503 #endif /* CONFIG_CBE_RAS */
509 ppc64_runlatch_on_trampoline:
510 b .__ppc64_runlatch_on
513 * Here we have detected that the kernel stack pointer is bad.
514 * R9 contains the saved CR, r13 points to the paca,
515 * r10 contains the (bad) kernel stack pointer,
516 * r11 and r12 contain the saved SRR0 and SRR1.
517 * We switch to using an emergency stack, save the registers there,
518 * and call kernel_bad_stack(), which panics.
521 ld r1,PACAEMERGSP(r13)
522 subi r1,r1,64+INT_FRAME_SIZE
554 std r10,ORIG_GPR3(r1)
555 END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
558 lhz r12,PACA_TRAP_SAVE(r13)
560 addi r11,r1,INT_FRAME_SIZE
565 ld r11,exception_marker@toc(r2)
567 std r11,STACK_FRAME_OVERHEAD-16(r1)
568 1: addi r3,r1,STACK_FRAME_OVERHEAD
573 * Here r13 points to the paca, r9 contains the saved CR,
574 * SRR0 and SRR1 are saved in r11 and r12,
575 * r9 - r13 are saved in paca->exgen.
578 .globl data_access_common
581 std r10,PACA_EXGEN+EX_DAR(r13)
583 stw r10,PACA_EXGEN+EX_DSISR(r13)
584 EXCEPTION_PROLOG_COMMON(0x300, PACA_EXGEN)
587 ld r3,PACA_EXGEN+EX_DAR(r13)
588 lwz r4,PACA_EXGEN+EX_DSISR(r13)
590 b .do_hash_page /* Try to handle as hpte fault */
593 .globl h_data_storage_common
594 h_data_storage_common:
596 std r10,PACA_EXGEN+EX_DAR(r13)
597 mfspr r10,SPRN_HDSISR
598 stw r10,PACA_EXGEN+EX_DSISR(r13)
599 EXCEPTION_PROLOG_COMMON(0xe00, PACA_EXGEN)
602 addi r3,r1,STACK_FRAME_OVERHEAD
603 bl .unknown_exception
607 .globl instruction_access_common
608 instruction_access_common:
609 EXCEPTION_PROLOG_COMMON(0x400, PACA_EXGEN)
615 b .do_hash_page /* Try to handle as hpte fault */
617 STD_EXCEPTION_COMMON(0xe20, h_instr_storage, .unknown_exception)
620 * Here is the common SLB miss user that is used when going to virtual
621 * mode for SLB misses, that is currently not used
625 .globl slb_miss_user_common
626 slb_miss_user_common:
628 std r3,PACA_EXGEN+EX_DAR(r13)
629 stw r9,PACA_EXGEN+EX_CCR(r13)
630 std r10,PACA_EXGEN+EX_LR(r13)
631 std r11,PACA_EXGEN+EX_SRR0(r13)
632 bl .slb_allocate_user
634 ld r10,PACA_EXGEN+EX_LR(r13)
635 ld r3,PACA_EXGEN+EX_R3(r13)
636 lwz r9,PACA_EXGEN+EX_CCR(r13)
637 ld r11,PACA_EXGEN+EX_SRR0(r13)
641 andi. r10,r12,MSR_RI /* check for unrecoverable exception */
642 beq- unrecov_user_slb
650 clrrdi r10,r10,2 /* clear RI before setting SRR0/1 */
656 ld r9,PACA_EXGEN+EX_R9(r13)
657 ld r10,PACA_EXGEN+EX_R10(r13)
658 ld r11,PACA_EXGEN+EX_R11(r13)
659 ld r12,PACA_EXGEN+EX_R12(r13)
660 ld r13,PACA_EXGEN+EX_R13(r13)
665 EXCEPTION_PROLOG_COMMON(0x380, PACA_EXGEN)
666 ld r4,PACA_EXGEN+EX_DAR(r13)
673 EXCEPTION_PROLOG_COMMON(0x4200, PACA_EXGEN)
676 1: addi r3,r1,STACK_FRAME_OVERHEAD
677 bl .unrecoverable_exception
680 #endif /* __DISABLED__ */
684 * r13 points to the PACA, r9 contains the saved CR,
685 * r12 contain the saved SRR1, SRR0 is still ready for return
686 * r3 has the faulting address
687 * r9 - r13 are saved in paca->exslb.
688 * r3 is saved in paca->slb_r3
689 * We assume we aren't going to take any exceptions during this procedure.
691 _GLOBAL(slb_miss_realmode)
693 #ifdef CONFIG_RELOCATABLE
697 stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
698 std r10,PACA_EXSLB+EX_LR(r13) /* save LR */
700 bl .slb_allocate_realmode
702 /* All done -- return from exception. */
704 ld r10,PACA_EXSLB+EX_LR(r13)
705 ld r3,PACA_EXSLB+EX_R3(r13)
706 lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
710 andi. r10,r12,MSR_RI /* check for unrecoverable exception */
716 mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */
719 ld r9,PACA_EXSLB+EX_R9(r13)
720 ld r10,PACA_EXSLB+EX_R10(r13)
721 ld r11,PACA_EXSLB+EX_R11(r13)
722 ld r12,PACA_EXSLB+EX_R12(r13)
723 ld r13,PACA_EXSLB+EX_R13(r13)
725 b . /* prevent speculative execution */
727 2: mfspr r11,SPRN_SRR0
728 ld r10,PACAKBASE(r13)
729 LOAD_HANDLER(r10,unrecov_slb)
737 EXCEPTION_PROLOG_COMMON(0x4100, PACA_EXSLB)
740 1: addi r3,r1,STACK_FRAME_OVERHEAD
741 bl .unrecoverable_exception
745 #ifdef CONFIG_PPC_970_NAP
748 std r9,TI_LOCAL_FLAGS(r11)
749 ld r10,_LINK(r1) /* make idle task do the */
750 std r10,_NIP(r1) /* equivalent of a blr */
755 .globl alignment_common
758 std r10,PACA_EXGEN+EX_DAR(r13)
760 stw r10,PACA_EXGEN+EX_DSISR(r13)
761 EXCEPTION_PROLOG_COMMON(0x600, PACA_EXGEN)
762 ld r3,PACA_EXGEN+EX_DAR(r13)
763 lwz r4,PACA_EXGEN+EX_DSISR(r13)
768 addi r3,r1,STACK_FRAME_OVERHEAD
769 bl .alignment_exception
773 .globl program_check_common
774 program_check_common:
775 EXCEPTION_PROLOG_COMMON(0x700, PACA_EXGEN)
778 addi r3,r1,STACK_FRAME_OVERHEAD
779 bl .program_check_exception
783 .globl fp_unavailable_common
784 fp_unavailable_common:
785 EXCEPTION_PROLOG_COMMON(0x800, PACA_EXGEN)
786 bne 1f /* if from user, just load it up */
789 addi r3,r1,STACK_FRAME_OVERHEAD
790 bl .kernel_fp_unavailable_exception
793 b fast_exception_return
796 .globl altivec_unavailable_common
797 altivec_unavailable_common:
798 EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN)
799 #ifdef CONFIG_ALTIVEC
803 b fast_exception_return
805 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
809 addi r3,r1,STACK_FRAME_OVERHEAD
810 bl .altivec_unavailable_exception
814 .globl vsx_unavailable_common
815 vsx_unavailable_common:
816 EXCEPTION_PROLOG_COMMON(0xf40, PACA_EXGEN)
822 END_FTR_SECTION_IFSET(CPU_FTR_VSX)
826 addi r3,r1,STACK_FRAME_OVERHEAD
827 bl .vsx_unavailable_exception
831 .globl __end_handlers
838 _STATIC(do_hash_page)
842 andis. r0,r4,0xa410 /* weird error? */
843 bne- handle_page_fault /* if not, try to insert a HPTE */
844 andis. r0,r4,DSISR_DABRMATCH@h
845 bne- handle_dabr_fault
848 andis. r0,r4,0x0020 /* Is it a segment table fault? */
849 bne- do_ste_alloc /* If so handle it */
850 END_MMU_FTR_SECTION_IFCLR(MMU_FTR_SLB)
852 clrrdi r11,r1,THREAD_SHIFT
853 lwz r0,TI_PREEMPT(r11) /* If we're in an "NMI" */
854 andis. r0,r0,NMI_MASK@h /* (i.e. an irq when soft-disabled) */
855 bne 77f /* then don't call hash_page now */
857 * We need to set the _PAGE_USER bit if MSR_PR is set or if we are
858 * accessing a userspace segment (even from the kernel). We assume
859 * kernel addresses always have the high bit set.
861 rlwinm r4,r4,32-25+9,31-9,31-9 /* DSISR_STORE -> _PAGE_RW */
862 rotldi r0,r3,15 /* Move high bit into MSR_PR posn */
863 orc r0,r12,r0 /* MSR_PR | ~high_bit */
864 rlwimi r4,r0,32-13,30,30 /* becomes _PAGE_USER access bit */
865 ori r4,r4,1 /* add _PAGE_PRESENT */
866 rlwimi r4,r5,22+2,31-2,31-2 /* Set _PAGE_EXEC if trap is 0x400 */
869 * r3 contains the faulting address
870 * r4 contains the required access permissions
871 * r5 contains the trap number
873 * at return r3 = 0 for success, 1 for page fault, negative for error
875 bl .hash_page /* build HPTE if possible */
876 cmpdi r3,0 /* see if hash_page succeeded */
879 beq fast_exc_return_irq /* Return from exception on success */
884 /* Here we have a page fault that hash_page can't handle. */
888 addi r3,r1,STACK_FRAME_OVERHEAD
894 addi r3,r1,STACK_FRAME_OVERHEAD
899 /* We have a data breakpoint exception - handle it */
904 addi r3,r1,STACK_FRAME_OVERHEAD
906 12: b .ret_from_except_lite
909 /* We have a page fault that hash_page could handle but HV refused
914 addi r3,r1,STACK_FRAME_OVERHEAD
920 * We come here as a result of a DSI at a point where we don't want
921 * to call hash_page, such as when we are accessing memory (possibly
922 * user memory) inside a PMU interrupt that occurred while interrupts
923 * were soft-disabled. We want to invoke the exception handler for
924 * the access, or panic if there isn't a handler.
928 addi r3,r1,STACK_FRAME_OVERHEAD
933 /* here we have a segment miss */
935 bl .ste_allocate /* try to insert stab entry */
937 bne- handle_page_fault
938 b fast_exception_return
941 * r13 points to the PACA, r9 contains the saved CR,
942 * r11 and r12 contain the saved SRR0 and SRR1.
943 * r9 - r13 are saved in paca->exslb.
944 * We assume we aren't going to take any exceptions during this procedure.
945 * We assume (DAR >> 60) == 0xc.
948 _GLOBAL(do_stab_bolted)
949 stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
950 std r11,PACA_EXSLB+EX_SRR0(r13) /* save SRR0 in exc. frame */
952 /* Hash to the primary group */
953 ld r10,PACASTABVIRT(r13)
956 rldimi r10,r11,7,52 /* r10 = first ste of the group */
959 /* This is a kernel address, so protovsid = ESID */
960 ASM_VSID_SCRAMBLE(r11, r9, 256M)
961 rldic r9,r11,12,16 /* r9 = vsid << 12 */
963 /* Search the primary group for a free entry */
964 1: ld r11,0(r10) /* Test valid bit of the current ste */
971 /* Stick for only searching the primary group for now. */
972 /* At least for now, we use a very simple random castout scheme */
973 /* Use the TB as a random number ; OR in 1 to avoid entry 0 */
975 rldic r11,r11,4,57 /* r11 = (r11 << 4) & 0x70 */
978 /* r10 currently points to an ste one past the group of interest */
979 /* make it point to the randomly selected entry */
981 or r10,r10,r11 /* r10 is the entry to invalidate */
983 isync /* mark the entry invalid */
985 rldicl r11,r11,56,1 /* clear the valid bit */
990 clrrdi r11,r11,28 /* Get the esid part of the ste */
993 2: std r9,8(r10) /* Store the vsid part of the ste */
996 mfspr r11,SPRN_DAR /* Get the new esid */
997 clrrdi r11,r11,28 /* Permits a full 32b of ESID */
998 ori r11,r11,0x90 /* Turn on valid and kp */
999 std r11,0(r10) /* Put new entry back into the stab */
1003 /* All done -- return from exception. */
1004 lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
1005 ld r11,PACA_EXSLB+EX_SRR0(r13) /* get saved SRR0 */
1007 andi. r10,r12,MSR_RI
1010 mtcrf 0x80,r9 /* restore CR */
1018 ld r9,PACA_EXSLB+EX_R9(r13)
1019 ld r10,PACA_EXSLB+EX_R10(r13)
1020 ld r11,PACA_EXSLB+EX_R11(r13)
1021 ld r12,PACA_EXSLB+EX_R12(r13)
1022 ld r13,PACA_EXSLB+EX_R13(r13)
1024 b . /* prevent speculative execution */
1026 #if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV)
1028 * Data area reserved for FWNMI option.
1029 * This address (0x7000) is fixed by the RPA.
1032 .globl fwnmi_data_area
1035 /* pseries and powernv need to keep the whole page from
1036 * 0x7000 to 0x8000 free for use by the firmware
1039 #endif /* defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) */
1041 /* Space for CPU0's segment table */
1047 #ifdef CONFIG_PPC_POWERNV
1048 _GLOBAL(opal_mc_secondary_handler)
1054 std r3,PACA_OPAL_MC_EVT(r13)
1055 ld r13,OPAL_MC_SRR0(r3)
1057 ld r13,OPAL_MC_SRR1(r3)
1059 ld r3,OPAL_MC_GPR3(r3)
1061 b machine_check_pSeries
1062 #endif /* CONFIG_PPC_POWERNV */