2 * Copyright IBM Corporation 2001, 2005, 2006
3 * Copyright Dave Engebretsen & Todd Inglett 2001
4 * Copyright Linas Vepstas 2005, 2006
5 * Copyright 2001-2012 IBM Corporation.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 * Please address comments and feedback to Linas Vepstas <linas@austin.ibm.com>
24 #include <linux/delay.h>
25 #include <linux/debugfs.h>
26 #include <linux/sched.h>
27 #include <linux/init.h>
28 #include <linux/list.h>
29 #include <linux/pci.h>
30 #include <linux/proc_fs.h>
31 #include <linux/rbtree.h>
32 #include <linux/reboot.h>
33 #include <linux/seq_file.h>
34 #include <linux/spinlock.h>
35 #include <linux/export.h>
38 #include <linux/atomic.h>
39 #include <asm/debug.h>
41 #include <asm/eeh_event.h>
43 #include <asm/iommu.h>
44 #include <asm/machdep.h>
45 #include <asm/ppc-pci.h>
50 * EEH, or "Extended Error Handling" is a PCI bridge technology for
51 * dealing with PCI bus errors that can't be dealt with within the
52 * usual PCI framework, except by check-stopping the CPU. Systems
53 * that are designed for high-availability/reliability cannot afford
54 * to crash due to a "mere" PCI error, thus the need for EEH.
55 * An EEH-capable bridge operates by converting a detected error
56 * into a "slot freeze", taking the PCI adapter off-line, making
57 * the slot behave, from the OS'es point of view, as if the slot
58 * were "empty": all reads return 0xff's and all writes are silently
59 * ignored. EEH slot isolation events can be triggered by parity
60 * errors on the address or data busses (e.g. during posted writes),
61 * which in turn might be caused by low voltage on the bus, dust,
62 * vibration, humidity, radioactivity or plain-old failed hardware.
64 * Note, however, that one of the leading causes of EEH slot
65 * freeze events are buggy device drivers, buggy device microcode,
66 * or buggy device hardware. This is because any attempt by the
67 * device to bus-master data to a memory address that is not
68 * assigned to the device will trigger a slot freeze. (The idea
69 * is to prevent devices-gone-wild from corrupting system memory).
70 * Buggy hardware/drivers will have a miserable time co-existing
73 * Ideally, a PCI device driver, when suspecting that an isolation
74 * event has occurred (e.g. by reading 0xff's), will then ask EEH
75 * whether this is the case, and then take appropriate steps to
76 * reset the PCI slot, the PCI device, and then resume operations.
77 * However, until that day, the checking is done here, with the
78 * eeh_check_failure() routine embedded in the MMIO macros. If
79 * the slot is found to be isolated, an "EEH Event" is synthesized
80 * and sent out for processing.
83 /* If a device driver keeps reading an MMIO register in an interrupt
84 * handler after a slot isolation event, it might be broken.
85 * This sets the threshold for how many read attempts we allow
86 * before printing an error message.
88 #define EEH_MAX_FAILS 2100000
90 /* Time to wait for a PCI slot to report status, in milliseconds */
91 #define PCI_BUS_RESET_WAIT_MSEC (5*60*1000)
94 * EEH probe mode support, which is part of the flags,
95 * is to support multiple platforms for EEH. Some platforms
96 * like pSeries do PCI emunation based on device tree.
97 * However, other platforms like powernv probe PCI devices
98 * from hardware. The flag is used to distinguish that.
99 * In addition, struct eeh_ops::probe would be invoked for
100 * particular OF node or PCI device so that the corresponding
101 * PE would be created there.
103 int eeh_subsystem_flags;
104 EXPORT_SYMBOL(eeh_subsystem_flags);
106 /* Platform dependent EEH operations */
107 struct eeh_ops *eeh_ops = NULL;
109 /* Lock to avoid races due to multiple reports of an error */
110 DEFINE_RAW_SPINLOCK(confirm_error_lock);
112 /* Lock to protect passed flags */
113 static DEFINE_MUTEX(eeh_dev_mutex);
115 /* Buffer for reporting pci register dumps. Its here in BSS, and
116 * not dynamically alloced, so that it ends up in RMO where RTAS
119 #define EEH_PCI_REGS_LOG_LEN 4096
120 static unsigned char pci_regs_buf[EEH_PCI_REGS_LOG_LEN];
123 * The struct is used to maintain the EEH global statistic
124 * information. Besides, the EEH global statistics will be
125 * exported to user space through procfs
128 u64 no_device; /* PCI device not found */
129 u64 no_dn; /* OF node not found */
130 u64 no_cfg_addr; /* Config address not found */
131 u64 ignored_check; /* EEH check skipped */
132 u64 total_mmio_ffs; /* Total EEH checks */
133 u64 false_positives; /* Unnecessary EEH checks */
134 u64 slot_resets; /* PE reset */
137 static struct eeh_stats eeh_stats;
139 #define IS_BRIDGE(class_code) (((class_code)<<16) == PCI_BASE_CLASS_BRIDGE)
141 static int __init eeh_setup(char *str)
143 if (!strcmp(str, "off"))
144 eeh_subsystem_flags |= EEH_FORCE_DISABLED;
148 __setup("eeh=", eeh_setup);
151 * eeh_gather_pci_data - Copy assorted PCI config space registers to buff
152 * @edev: device to report data for
153 * @buf: point to buffer in which to log
154 * @len: amount of room in buffer
156 * This routine captures assorted PCI configuration space data,
157 * and puts them into a buffer for RTAS error logging.
159 static size_t eeh_gather_pci_data(struct eeh_dev *edev, char * buf, size_t len)
161 struct device_node *dn = eeh_dev_to_of_node(edev);
166 n += scnprintf(buf+n, len-n, "%s\n", dn->full_name);
167 pr_warn("EEH: of node=%s\n", dn->full_name);
169 eeh_ops->read_config(dn, PCI_VENDOR_ID, 4, &cfg);
170 n += scnprintf(buf+n, len-n, "dev/vend:%08x\n", cfg);
171 pr_warn("EEH: PCI device/vendor: %08x\n", cfg);
173 eeh_ops->read_config(dn, PCI_COMMAND, 4, &cfg);
174 n += scnprintf(buf+n, len-n, "cmd/stat:%x\n", cfg);
175 pr_warn("EEH: PCI cmd/status register: %08x\n", cfg);
177 /* Gather bridge-specific registers */
178 if (edev->mode & EEH_DEV_BRIDGE) {
179 eeh_ops->read_config(dn, PCI_SEC_STATUS, 2, &cfg);
180 n += scnprintf(buf+n, len-n, "sec stat:%x\n", cfg);
181 pr_warn("EEH: Bridge secondary status: %04x\n", cfg);
183 eeh_ops->read_config(dn, PCI_BRIDGE_CONTROL, 2, &cfg);
184 n += scnprintf(buf+n, len-n, "brdg ctl:%x\n", cfg);
185 pr_warn("EEH: Bridge control: %04x\n", cfg);
188 /* Dump out the PCI-X command and status regs */
189 cap = edev->pcix_cap;
191 eeh_ops->read_config(dn, cap, 4, &cfg);
192 n += scnprintf(buf+n, len-n, "pcix-cmd:%x\n", cfg);
193 pr_warn("EEH: PCI-X cmd: %08x\n", cfg);
195 eeh_ops->read_config(dn, cap+4, 4, &cfg);
196 n += scnprintf(buf+n, len-n, "pcix-stat:%x\n", cfg);
197 pr_warn("EEH: PCI-X status: %08x\n", cfg);
200 /* If PCI-E capable, dump PCI-E cap 10 */
201 cap = edev->pcie_cap;
203 n += scnprintf(buf+n, len-n, "pci-e cap10:\n");
204 pr_warn("EEH: PCI-E capabilities and status follow:\n");
206 for (i=0; i<=8; i++) {
207 eeh_ops->read_config(dn, cap+4*i, 4, &cfg);
208 n += scnprintf(buf+n, len-n, "%02x:%x\n", 4*i, cfg);
209 pr_warn("EEH: PCI-E %02x: %08x\n", i, cfg);
213 /* If AER capable, dump it */
216 n += scnprintf(buf+n, len-n, "pci-e AER:\n");
217 pr_warn("EEH: PCI-E AER capability register set follows:\n");
219 for (i=0; i<14; i++) {
220 eeh_ops->read_config(dn, cap+4*i, 4, &cfg);
221 n += scnprintf(buf+n, len-n, "%02x:%x\n", 4*i, cfg);
222 pr_warn("EEH: PCI-E AER %02x: %08x\n", i, cfg);
230 * eeh_slot_error_detail - Generate combined log including driver log and error log
232 * @severity: temporary or permanent error log
234 * This routine should be called to generate the combined log, which
235 * is comprised of driver log and error log. The driver log is figured
236 * out from the config space of the corresponding PCI device, while
237 * the error log is fetched through platform dependent function call.
239 void eeh_slot_error_detail(struct eeh_pe *pe, int severity)
242 struct eeh_dev *edev, *tmp;
245 * When the PHB is fenced or dead, it's pointless to collect
246 * the data from PCI config space because it should return
247 * 0xFF's. For ER, we still retrieve the data from the PCI
250 * For pHyp, we have to enable IO for log retrieval. Otherwise,
251 * 0xFF's is always returned from PCI config space.
253 if (!(pe->type & EEH_PE_PHB)) {
254 if (eeh_probe_mode_devtree())
255 eeh_pci_enable(pe, EEH_OPT_THAW_MMIO);
256 eeh_ops->configure_bridge(pe);
257 eeh_pe_restore_bars(pe);
260 eeh_pe_for_each_dev(pe, edev, tmp) {
261 loglen += eeh_gather_pci_data(edev, pci_regs_buf + loglen,
262 EEH_PCI_REGS_LOG_LEN - loglen);
266 eeh_ops->get_log(pe, severity, pci_regs_buf, loglen);
270 * eeh_token_to_phys - Convert EEH address token to phys address
271 * @token: I/O token, should be address in the form 0xA....
273 * This routine should be called to convert virtual I/O address
276 static inline unsigned long eeh_token_to_phys(unsigned long token)
283 * We won't find hugepages here, iomem
285 ptep = find_linux_pte_or_hugepte(init_mm.pgd, token, &hugepage_shift);
288 WARN_ON(hugepage_shift);
289 pa = pte_pfn(*ptep) << PAGE_SHIFT;
291 return pa | (token & (PAGE_SIZE-1));
295 * On PowerNV platform, we might already have fenced PHB there.
296 * For that case, it's meaningless to recover frozen PE. Intead,
297 * We have to handle fenced PHB firstly.
299 static int eeh_phb_check_failure(struct eeh_pe *pe)
301 struct eeh_pe *phb_pe;
305 if (!eeh_probe_mode_dev())
308 /* Find the PHB PE */
309 phb_pe = eeh_phb_pe_get(pe->phb);
311 pr_warning("%s Can't find PE for PHB#%d\n",
312 __func__, pe->phb->global_number);
316 /* If the PHB has been in problematic state */
317 eeh_serialize_lock(&flags);
318 if (phb_pe->state & EEH_PE_ISOLATED) {
323 /* Check PHB state */
324 ret = eeh_ops->get_state(phb_pe, NULL);
326 (ret == EEH_STATE_NOT_SUPPORT) ||
327 (ret & (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) ==
328 (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) {
333 /* Isolate the PHB and send event */
334 eeh_pe_state_mark(phb_pe, EEH_PE_ISOLATED);
335 eeh_serialize_unlock(flags);
337 pr_err("EEH: PHB#%x failure detected, location: %s\n",
338 phb_pe->phb->global_number, eeh_pe_loc_get(phb_pe));
340 eeh_send_failure_event(phb_pe);
344 eeh_serialize_unlock(flags);
349 * eeh_dev_check_failure - Check if all 1's data is due to EEH slot freeze
352 * Check for an EEH failure for the given device node. Call this
353 * routine if the result of a read was all 0xff's and you want to
354 * find out if this is due to an EEH slot freeze. This routine
355 * will query firmware for the EEH status.
357 * Returns 0 if there has not been an EEH error; otherwise returns
358 * a non-zero value and queues up a slot isolation event notification.
360 * It is safe to call this routine in an interrupt context.
362 int eeh_dev_check_failure(struct eeh_dev *edev)
365 int active_flags = (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE);
367 struct device_node *dn;
369 struct eeh_pe *pe, *parent_pe, *phb_pe;
371 const char *location;
373 eeh_stats.total_mmio_ffs++;
382 dn = eeh_dev_to_of_node(edev);
383 dev = eeh_dev_to_pci_dev(edev);
386 /* Access to IO BARs might get this far and still not want checking. */
388 eeh_stats.ignored_check++;
389 pr_debug("EEH: Ignored check for %s %s\n",
390 eeh_pci_name(dev), dn->full_name);
394 if (!pe->addr && !pe->config_addr) {
395 eeh_stats.no_cfg_addr++;
400 * On PowerNV platform, we might already have fenced PHB
401 * there and we need take care of that firstly.
403 ret = eeh_phb_check_failure(pe);
408 * If the PE isn't owned by us, we shouldn't check the
409 * state. Instead, let the owner handle it if the PE has
412 if (eeh_pe_passed(pe))
415 /* If we already have a pending isolation event for this
416 * slot, we know it's bad already, we don't need to check.
417 * Do this checking under a lock; as multiple PCI devices
418 * in one slot might report errors simultaneously, and we
419 * only want one error recovery routine running.
421 eeh_serialize_lock(&flags);
423 if (pe->state & EEH_PE_ISOLATED) {
425 if (pe->check_count % EEH_MAX_FAILS == 0) {
426 location = of_get_property(dn, "ibm,loc-code", NULL);
427 printk(KERN_ERR "EEH: %d reads ignored for recovering device at "
428 "location=%s driver=%s pci addr=%s\n",
429 pe->check_count, location,
430 eeh_driver_name(dev), eeh_pci_name(dev));
431 printk(KERN_ERR "EEH: Might be infinite loop in %s driver\n",
432 eeh_driver_name(dev));
439 * Now test for an EEH failure. This is VERY expensive.
440 * Note that the eeh_config_addr may be a parent device
441 * in the case of a device behind a bridge, or it may be
442 * function zero of a multi-function device.
443 * In any case they must share a common PHB.
445 ret = eeh_ops->get_state(pe, NULL);
447 /* Note that config-io to empty slots may fail;
448 * they are empty when they don't have children.
449 * We will punt with the following conditions: Failure to get
450 * PE's state, EEH not support and Permanently unavailable
451 * state, PE is in good state.
454 (ret == EEH_STATE_NOT_SUPPORT) ||
455 ((ret & active_flags) == active_flags)) {
456 eeh_stats.false_positives++;
457 pe->false_positives++;
463 * It should be corner case that the parent PE has been
464 * put into frozen state as well. We should take care
467 parent_pe = pe->parent;
469 /* Hit the ceiling ? */
470 if (parent_pe->type & EEH_PE_PHB)
473 /* Frozen parent PE ? */
474 ret = eeh_ops->get_state(parent_pe, NULL);
476 (ret & active_flags) != active_flags)
479 /* Next parent level */
480 parent_pe = parent_pe->parent;
483 eeh_stats.slot_resets++;
485 /* Avoid repeated reports of this failure, including problems
486 * with other functions on this device, and functions under
489 eeh_pe_state_mark(pe, EEH_PE_ISOLATED);
490 eeh_serialize_unlock(flags);
492 /* Most EEH events are due to device driver bugs. Having
493 * a stack trace will help the device-driver authors figure
494 * out what happened. So print that out.
496 phb_pe = eeh_phb_pe_get(pe->phb);
497 pr_err("EEH: Frozen PHB#%x-PE#%x detected\n",
498 pe->phb->global_number, pe->addr);
499 pr_err("EEH: PE location: %s, PHB location: %s\n",
500 eeh_pe_loc_get(pe), eeh_pe_loc_get(phb_pe));
503 eeh_send_failure_event(pe);
508 eeh_serialize_unlock(flags);
512 EXPORT_SYMBOL_GPL(eeh_dev_check_failure);
515 * eeh_check_failure - Check if all 1's data is due to EEH slot freeze
516 * @token: I/O token, should be address in the form 0xA....
517 * @val: value, should be all 1's (XXX why do we need this arg??)
519 * Check for an EEH failure at the given token address. Call this
520 * routine if the result of a read was all 0xff's and you want to
521 * find out if this is due to an EEH slot freeze event. This routine
522 * will query firmware for the EEH status.
524 * Note this routine is safe to call in an interrupt context.
526 unsigned long eeh_check_failure(const volatile void __iomem *token, unsigned long val)
529 struct eeh_dev *edev;
531 /* Finding the phys addr + pci device; this is pretty quick. */
532 addr = eeh_token_to_phys((unsigned long __force) token);
533 edev = eeh_addr_cache_get_dev(addr);
535 eeh_stats.no_device++;
539 eeh_dev_check_failure(edev);
543 EXPORT_SYMBOL(eeh_check_failure);
547 * eeh_pci_enable - Enable MMIO or DMA transfers for this slot
550 * This routine should be called to reenable frozen MMIO or DMA
551 * so that it would work correctly again. It's useful while doing
552 * recovery or log collection on the indicated device.
554 int eeh_pci_enable(struct eeh_pe *pe, int function)
556 int rc, flags = (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE);
559 * pHyp doesn't allow to enable IO or DMA on unfrozen PE.
560 * Also, it's pointless to enable them on unfrozen PE. So
561 * we have the check here.
563 if (function == EEH_OPT_THAW_MMIO ||
564 function == EEH_OPT_THAW_DMA) {
565 rc = eeh_ops->get_state(pe, NULL);
569 /* Needn't to enable or already enabled */
570 if ((rc == EEH_STATE_NOT_SUPPORT) ||
571 ((rc & flags) == flags))
575 rc = eeh_ops->set_option(pe, function);
577 pr_warn("%s: Unexpected state change %d on "
578 "PHB#%d-PE#%x, err=%d\n",
579 __func__, function, pe->phb->global_number,
582 rc = eeh_ops->wait_state(pe, PCI_BUS_RESET_WAIT_MSEC);
586 if ((function == EEH_OPT_THAW_MMIO) &&
587 (rc & EEH_STATE_MMIO_ENABLED))
590 if ((function == EEH_OPT_THAW_DMA) &&
591 (rc & EEH_STATE_DMA_ENABLED))
598 * pcibios_set_pcie_slot_reset - Set PCI-E reset state
599 * @dev: pci device struct
600 * @state: reset state to enter
605 int pcibios_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state)
607 struct eeh_dev *edev = pci_dev_to_eeh_dev(dev);
608 struct eeh_pe *pe = edev->pe;
611 pr_err("%s: No PE found on PCI device %s\n",
612 __func__, pci_name(dev));
617 case pcie_deassert_reset:
618 eeh_ops->reset(pe, EEH_RESET_DEACTIVATE);
621 eeh_ops->reset(pe, EEH_RESET_HOT);
623 case pcie_warm_reset:
624 eeh_ops->reset(pe, EEH_RESET_FUNDAMENTAL);
634 * eeh_set_pe_freset - Check the required reset for the indicated device
636 * @flag: return value
638 * Each device might have its preferred reset type: fundamental or
639 * hot reset. The routine is used to collected the information for
640 * the indicated device and its children so that the bunch of the
641 * devices could be reset properly.
643 static void *eeh_set_dev_freset(void *data, void *flag)
646 unsigned int *freset = (unsigned int *)flag;
647 struct eeh_dev *edev = (struct eeh_dev *)data;
649 dev = eeh_dev_to_pci_dev(edev);
651 *freset |= dev->needs_freset;
657 * eeh_reset_pe_once - Assert the pci #RST line for 1/4 second
660 * Assert the PCI #RST line for 1/4 second.
662 static void eeh_reset_pe_once(struct eeh_pe *pe)
664 unsigned int freset = 0;
666 /* Determine type of EEH reset required for
667 * Partitionable Endpoint, a hot-reset (1)
668 * or a fundamental reset (3).
669 * A fundamental reset required by any device under
670 * Partitionable Endpoint trumps hot-reset.
672 eeh_pe_dev_traverse(pe, eeh_set_dev_freset, &freset);
675 eeh_ops->reset(pe, EEH_RESET_FUNDAMENTAL);
677 eeh_ops->reset(pe, EEH_RESET_HOT);
679 eeh_ops->reset(pe, EEH_RESET_DEACTIVATE);
683 * eeh_reset_pe - Reset the indicated PE
686 * This routine should be called to reset indicated device, including
687 * PE. A PE might include multiple PCI devices and sometimes PCI bridges
688 * might be involved as well.
690 int eeh_reset_pe(struct eeh_pe *pe)
692 int flags = (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE);
695 /* Take three shots at resetting the bus */
696 for (i=0; i<3; i++) {
697 eeh_reset_pe_once(pe);
700 * EEH_PE_ISOLATED is expected to be removed after
703 rc = eeh_ops->wait_state(pe, PCI_BUS_RESET_WAIT_MSEC);
704 if ((rc & flags) == flags)
708 pr_err("%s: Unrecoverable slot failure on PHB#%d-PE#%x",
709 __func__, pe->phb->global_number, pe->addr);
712 pr_err("EEH: bus reset %d failed on PHB#%d-PE#%x, rc=%d\n",
713 i+1, pe->phb->global_number, pe->addr, rc);
720 * eeh_save_bars - Save device bars
721 * @edev: PCI device associated EEH device
723 * Save the values of the device bars. Unlike the restore
724 * routine, this routine is *not* recursive. This is because
725 * PCI devices are added individually; but, for the restore,
726 * an entire slot is reset at a time.
728 void eeh_save_bars(struct eeh_dev *edev)
731 struct device_node *dn;
735 dn = eeh_dev_to_of_node(edev);
737 for (i = 0; i < 16; i++)
738 eeh_ops->read_config(dn, i * 4, 4, &edev->config_space[i]);
741 * For PCI bridges including root port, we need enable bus
742 * master explicitly. Otherwise, it can't fetch IODA table
743 * entries correctly. So we cache the bit in advance so that
744 * we can restore it after reset, either PHB range or PE range.
746 if (edev->mode & EEH_DEV_BRIDGE)
747 edev->config_space[1] |= PCI_COMMAND_MASTER;
751 * eeh_ops_register - Register platform dependent EEH operations
752 * @ops: platform dependent EEH operations
754 * Register the platform dependent EEH operation callback
755 * functions. The platform should call this function before
756 * any other EEH operations.
758 int __init eeh_ops_register(struct eeh_ops *ops)
761 pr_warning("%s: Invalid EEH ops name for %p\n",
766 if (eeh_ops && eeh_ops != ops) {
767 pr_warning("%s: EEH ops of platform %s already existing (%s)\n",
768 __func__, eeh_ops->name, ops->name);
778 * eeh_ops_unregister - Unreigster platform dependent EEH operations
779 * @name: name of EEH platform operations
781 * Unregister the platform dependent EEH operation callback
784 int __exit eeh_ops_unregister(const char *name)
786 if (!name || !strlen(name)) {
787 pr_warning("%s: Invalid EEH ops name\n",
792 if (eeh_ops && !strcmp(eeh_ops->name, name)) {
800 static int eeh_reboot_notifier(struct notifier_block *nb,
801 unsigned long action, void *unused)
803 eeh_set_enable(false);
807 static struct notifier_block eeh_reboot_nb = {
808 .notifier_call = eeh_reboot_notifier,
812 * eeh_init - EEH initialization
814 * Initialize EEH by trying to enable it for all of the adapters in the system.
815 * As a side effect we can determine here if eeh is supported at all.
816 * Note that we leave EEH on so failed config cycles won't cause a machine
817 * check. If a user turns off EEH for a particular adapter they are really
818 * telling Linux to ignore errors. Some hardware (e.g. POWER5) won't
819 * grant access to a slot if EEH isn't enabled, and so we always enable
820 * EEH for all slots/all devices.
822 * The eeh-force-off option disables EEH checking globally, for all slots.
823 * Even if force-off is set, the EEH hardware is still enabled, so that
824 * newer systems can boot.
828 struct pci_controller *hose, *tmp;
829 struct device_node *phb;
834 * We have to delay the initialization on PowerNV after
835 * the PCI hierarchy tree has been built because the PEs
836 * are figured out based on PCI devices instead of device
839 if (machine_is(powernv) && cnt++ <= 0)
842 /* Register reboot notifier */
843 ret = register_reboot_notifier(&eeh_reboot_nb);
845 pr_warn("%s: Failed to register notifier (%d)\n",
850 /* call platform initialization function */
852 pr_warning("%s: Platform EEH operation not found\n",
855 } else if ((ret = eeh_ops->init())) {
856 pr_warning("%s: Failed to call platform init function (%d)\n",
861 /* Initialize EEH event */
862 ret = eeh_event_init();
866 /* Enable EEH for all adapters */
867 if (eeh_probe_mode_devtree()) {
868 list_for_each_entry_safe(hose, tmp,
869 &hose_list, list_node) {
871 traverse_pci_devices(phb, eeh_ops->of_probe, NULL);
873 } else if (eeh_probe_mode_dev()) {
874 list_for_each_entry_safe(hose, tmp,
875 &hose_list, list_node)
876 pci_walk_bus(hose->bus, eeh_ops->dev_probe, NULL);
878 pr_warn("%s: Invalid probe mode %x",
879 __func__, eeh_subsystem_flags);
884 * Call platform post-initialization. Actually, It's good chance
885 * to inform platform that EEH is ready to supply service if the
886 * I/O cache stuff has been built up.
888 if (eeh_ops->post_init) {
889 ret = eeh_ops->post_init();
895 pr_info("EEH: PCI Enhanced I/O Error Handling Enabled\n");
897 pr_warning("EEH: No capable adapters found\n");
902 core_initcall_sync(eeh_init);
905 * eeh_add_device_early - Enable EEH for the indicated device_node
906 * @dn: device node for which to set up EEH
908 * This routine must be used to perform EEH initialization for PCI
909 * devices that were added after system boot (e.g. hotplug, dlpar).
910 * This routine must be called before any i/o is performed to the
911 * adapter (inluding any config-space i/o).
912 * Whether this actually enables EEH or not for this device depends
913 * on the CEC architecture, type of the device, on earlier boot
914 * command-line arguments & etc.
916 void eeh_add_device_early(struct device_node *dn)
918 struct pci_controller *phb;
921 * If we're doing EEH probe based on PCI device, we
922 * would delay the probe until late stage because
923 * the PCI device isn't available this moment.
925 if (!eeh_probe_mode_devtree())
928 if (!of_node_to_eeh_dev(dn))
930 phb = of_node_to_eeh_dev(dn)->phb;
932 /* USB Bus children of PCI devices will not have BUID's */
933 if (NULL == phb || 0 == phb->buid)
936 eeh_ops->of_probe(dn, NULL);
940 * eeh_add_device_tree_early - Enable EEH for the indicated device
943 * This routine must be used to perform EEH initialization for the
944 * indicated PCI device that was added after system boot (e.g.
947 void eeh_add_device_tree_early(struct device_node *dn)
949 struct device_node *sib;
951 for_each_child_of_node(dn, sib)
952 eeh_add_device_tree_early(sib);
953 eeh_add_device_early(dn);
955 EXPORT_SYMBOL_GPL(eeh_add_device_tree_early);
958 * eeh_add_device_late - Perform EEH initialization for the indicated pci device
959 * @dev: pci device for which to set up EEH
961 * This routine must be used to complete EEH initialization for PCI
962 * devices that were added after system boot (e.g. hotplug, dlpar).
964 void eeh_add_device_late(struct pci_dev *dev)
966 struct device_node *dn;
967 struct eeh_dev *edev;
969 if (!dev || !eeh_enabled())
972 pr_debug("EEH: Adding device %s\n", pci_name(dev));
974 dn = pci_device_to_OF_node(dev);
975 edev = of_node_to_eeh_dev(dn);
976 if (edev->pdev == dev) {
977 pr_debug("EEH: Already referenced !\n");
982 * The EEH cache might not be removed correctly because of
983 * unbalanced kref to the device during unplug time, which
984 * relies on pcibios_release_device(). So we have to remove
985 * that here explicitly.
988 eeh_rmv_from_parent_pe(edev);
989 eeh_addr_cache_rmv_dev(edev->pdev);
990 eeh_sysfs_remove_device(edev->pdev);
991 edev->mode &= ~EEH_DEV_SYSFS;
994 * We definitely should have the PCI device removed
995 * though it wasn't correctly. So we needn't call
996 * into error handler afterwards.
998 edev->mode |= EEH_DEV_NO_HANDLER;
1001 dev->dev.archdata.edev = NULL;
1005 dev->dev.archdata.edev = edev;
1008 * We have to do the EEH probe here because the PCI device
1009 * hasn't been created yet in the early stage.
1011 if (eeh_probe_mode_dev())
1012 eeh_ops->dev_probe(dev, NULL);
1014 eeh_addr_cache_insert_dev(dev);
1018 * eeh_add_device_tree_late - Perform EEH initialization for the indicated PCI bus
1021 * This routine must be used to perform EEH initialization for PCI
1022 * devices which are attached to the indicated PCI bus. The PCI bus
1023 * is added after system boot through hotplug or dlpar.
1025 void eeh_add_device_tree_late(struct pci_bus *bus)
1027 struct pci_dev *dev;
1029 list_for_each_entry(dev, &bus->devices, bus_list) {
1030 eeh_add_device_late(dev);
1031 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
1032 struct pci_bus *subbus = dev->subordinate;
1034 eeh_add_device_tree_late(subbus);
1038 EXPORT_SYMBOL_GPL(eeh_add_device_tree_late);
1041 * eeh_add_sysfs_files - Add EEH sysfs files for the indicated PCI bus
1044 * This routine must be used to add EEH sysfs files for PCI
1045 * devices which are attached to the indicated PCI bus. The PCI bus
1046 * is added after system boot through hotplug or dlpar.
1048 void eeh_add_sysfs_files(struct pci_bus *bus)
1050 struct pci_dev *dev;
1052 list_for_each_entry(dev, &bus->devices, bus_list) {
1053 eeh_sysfs_add_device(dev);
1054 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
1055 struct pci_bus *subbus = dev->subordinate;
1057 eeh_add_sysfs_files(subbus);
1061 EXPORT_SYMBOL_GPL(eeh_add_sysfs_files);
1064 * eeh_remove_device - Undo EEH setup for the indicated pci device
1065 * @dev: pci device to be removed
1067 * This routine should be called when a device is removed from
1068 * a running system (e.g. by hotplug or dlpar). It unregisters
1069 * the PCI device from the EEH subsystem. I/O errors affecting
1070 * this device will no longer be detected after this call; thus,
1071 * i/o errors affecting this slot may leave this device unusable.
1073 void eeh_remove_device(struct pci_dev *dev)
1075 struct eeh_dev *edev;
1077 if (!dev || !eeh_enabled())
1079 edev = pci_dev_to_eeh_dev(dev);
1081 /* Unregister the device with the EEH/PCI address search system */
1082 pr_debug("EEH: Removing device %s\n", pci_name(dev));
1084 if (!edev || !edev->pdev || !edev->pe) {
1085 pr_debug("EEH: Not referenced !\n");
1090 * During the hotplug for EEH error recovery, we need the EEH
1091 * device attached to the parent PE in order for BAR restore
1092 * a bit later. So we keep it for BAR restore and remove it
1093 * from the parent PE during the BAR resotre.
1096 dev->dev.archdata.edev = NULL;
1097 if (!(edev->pe->state & EEH_PE_KEEP))
1098 eeh_rmv_from_parent_pe(edev);
1100 edev->mode |= EEH_DEV_DISCONNECTED;
1103 * We're removing from the PCI subsystem, that means
1104 * the PCI device driver can't support EEH or not
1105 * well. So we rely on hotplug completely to do recovery
1106 * for the specific PCI device.
1108 edev->mode |= EEH_DEV_NO_HANDLER;
1110 eeh_addr_cache_rmv_dev(dev);
1111 eeh_sysfs_remove_device(dev);
1112 edev->mode &= ~EEH_DEV_SYSFS;
1116 * eeh_dev_open - Increase count of pass through devices for PE
1119 * Increase count of passed through devices for the indicated
1120 * PE. In the result, the EEH errors detected on the PE won't be
1121 * reported. The PE owner will be responsible for detection
1124 int eeh_dev_open(struct pci_dev *pdev)
1126 struct eeh_dev *edev;
1128 mutex_lock(&eeh_dev_mutex);
1130 /* No PCI device ? */
1134 /* No EEH device or PE ? */
1135 edev = pci_dev_to_eeh_dev(pdev);
1136 if (!edev || !edev->pe)
1139 /* Increase PE's pass through count */
1140 atomic_inc(&edev->pe->pass_dev_cnt);
1141 mutex_unlock(&eeh_dev_mutex);
1145 mutex_unlock(&eeh_dev_mutex);
1148 EXPORT_SYMBOL_GPL(eeh_dev_open);
1151 * eeh_dev_release - Decrease count of pass through devices for PE
1154 * Decrease count of pass through devices for the indicated PE. If
1155 * there is no passed through device in PE, the EEH errors detected
1156 * on the PE will be reported and handled as usual.
1158 void eeh_dev_release(struct pci_dev *pdev)
1160 struct eeh_dev *edev;
1162 mutex_lock(&eeh_dev_mutex);
1164 /* No PCI device ? */
1168 /* No EEH device ? */
1169 edev = pci_dev_to_eeh_dev(pdev);
1170 if (!edev || !edev->pe || !eeh_pe_passed(edev->pe))
1173 /* Decrease PE's pass through count */
1174 atomic_dec(&edev->pe->pass_dev_cnt);
1175 WARN_ON(atomic_read(&edev->pe->pass_dev_cnt) < 0);
1177 mutex_unlock(&eeh_dev_mutex);
1179 EXPORT_SYMBOL(eeh_dev_release);
1182 * eeh_iommu_group_to_pe - Convert IOMMU group to EEH PE
1183 * @group: IOMMU group
1185 * The routine is called to convert IOMMU group to EEH PE.
1187 struct eeh_pe *eeh_iommu_group_to_pe(struct iommu_group *group)
1189 struct iommu_table *tbl;
1190 struct pci_dev *pdev = NULL;
1191 struct eeh_dev *edev;
1194 /* No IOMMU group ? */
1198 /* No PCI device ? */
1199 for_each_pci_dev(pdev) {
1200 tbl = get_iommu_table_base(&pdev->dev);
1201 if (tbl && tbl->it_group == group) {
1209 /* No EEH device or PE ? */
1210 edev = pci_dev_to_eeh_dev(pdev);
1211 if (!edev || !edev->pe)
1218 * eeh_pe_set_option - Set options for the indicated PE
1220 * @option: requested option
1222 * The routine is called to enable or disable EEH functionality
1223 * on the indicated PE, to enable IO or DMA for the frozen PE.
1225 int eeh_pe_set_option(struct eeh_pe *pe, int option)
1234 * EEH functionality could possibly be disabled, just
1235 * return error for the case. And the EEH functinality
1236 * isn't expected to be disabled on one specific PE.
1239 case EEH_OPT_ENABLE:
1244 case EEH_OPT_DISABLE:
1246 case EEH_OPT_THAW_MMIO:
1247 case EEH_OPT_THAW_DMA:
1248 if (!eeh_ops || !eeh_ops->set_option) {
1253 ret = eeh_ops->set_option(pe, option);
1256 pr_debug("%s: Option %d out of range (%d, %d)\n",
1257 __func__, option, EEH_OPT_DISABLE, EEH_OPT_THAW_DMA);
1263 EXPORT_SYMBOL_GPL(eeh_pe_set_option);
1266 * eeh_pe_get_state - Retrieve PE's state
1269 * Retrieve the PE's state, which includes 3 aspects: enabled
1270 * DMA, enabled IO and asserted reset.
1272 int eeh_pe_get_state(struct eeh_pe *pe)
1274 int result, ret = 0;
1275 bool rst_active, dma_en, mmio_en;
1281 if (!eeh_ops || !eeh_ops->get_state)
1284 result = eeh_ops->get_state(pe, NULL);
1285 rst_active = !!(result & EEH_STATE_RESET_ACTIVE);
1286 dma_en = !!(result & EEH_STATE_DMA_ENABLED);
1287 mmio_en = !!(result & EEH_STATE_MMIO_ENABLED);
1290 ret = EEH_PE_STATE_RESET;
1291 else if (dma_en && mmio_en)
1292 ret = EEH_PE_STATE_NORMAL;
1293 else if (!dma_en && !mmio_en)
1294 ret = EEH_PE_STATE_STOPPED_IO_DMA;
1295 else if (!dma_en && mmio_en)
1296 ret = EEH_PE_STATE_STOPPED_DMA;
1298 ret = EEH_PE_STATE_UNAVAIL;
1302 EXPORT_SYMBOL_GPL(eeh_pe_get_state);
1305 * eeh_pe_reset - Issue PE reset according to specified type
1307 * @option: reset type
1309 * The routine is called to reset the specified PE with the
1310 * indicated type, either fundamental reset or hot reset.
1311 * PE reset is the most important part for error recovery.
1313 int eeh_pe_reset(struct eeh_pe *pe, int option)
1321 if (!eeh_ops || !eeh_ops->set_option || !eeh_ops->reset)
1325 case EEH_RESET_DEACTIVATE:
1326 ret = eeh_ops->reset(pe, option);
1331 * The PE is still in frozen state and we need to clear
1332 * that. It's good to clear frozen state after deassert
1333 * to avoid messy IO access during reset, which might
1334 * cause recursive frozen PE.
1336 ret = eeh_ops->set_option(pe, EEH_OPT_THAW_MMIO);
1338 ret = eeh_ops->set_option(pe, EEH_OPT_THAW_DMA);
1340 eeh_pe_state_clear(pe, EEH_PE_ISOLATED);
1343 case EEH_RESET_FUNDAMENTAL:
1344 ret = eeh_ops->reset(pe, option);
1347 pr_debug("%s: Unsupported option %d\n",
1354 EXPORT_SYMBOL_GPL(eeh_pe_reset);
1357 * eeh_pe_configure - Configure PCI bridges after PE reset
1360 * The routine is called to restore the PCI config space for
1361 * those PCI devices, especially PCI bridges affected by PE
1362 * reset issued previously.
1364 int eeh_pe_configure(struct eeh_pe *pe)
1372 /* Restore config space for the affected devices */
1373 eeh_pe_restore_bars(pe);
1377 EXPORT_SYMBOL_GPL(eeh_pe_configure);
1379 static int proc_eeh_show(struct seq_file *m, void *v)
1381 if (!eeh_enabled()) {
1382 seq_printf(m, "EEH Subsystem is globally disabled\n");
1383 seq_printf(m, "eeh_total_mmio_ffs=%llu\n", eeh_stats.total_mmio_ffs);
1385 seq_printf(m, "EEH Subsystem is enabled\n");
1388 "no device node=%llu\n"
1389 "no config address=%llu\n"
1390 "check not wanted=%llu\n"
1391 "eeh_total_mmio_ffs=%llu\n"
1392 "eeh_false_positives=%llu\n"
1393 "eeh_slot_resets=%llu\n",
1394 eeh_stats.no_device,
1396 eeh_stats.no_cfg_addr,
1397 eeh_stats.ignored_check,
1398 eeh_stats.total_mmio_ffs,
1399 eeh_stats.false_positives,
1400 eeh_stats.slot_resets);
1406 static int proc_eeh_open(struct inode *inode, struct file *file)
1408 return single_open(file, proc_eeh_show, NULL);
1411 static const struct file_operations proc_eeh_operations = {
1412 .open = proc_eeh_open,
1414 .llseek = seq_lseek,
1415 .release = single_release,
1418 #ifdef CONFIG_DEBUG_FS
1419 static int eeh_enable_dbgfs_set(void *data, u64 val)
1422 eeh_subsystem_flags &= ~EEH_FORCE_DISABLED;
1424 eeh_subsystem_flags |= EEH_FORCE_DISABLED;
1426 /* Notify the backend */
1427 if (eeh_ops->post_init)
1428 eeh_ops->post_init();
1433 static int eeh_enable_dbgfs_get(void *data, u64 *val)
1442 DEFINE_SIMPLE_ATTRIBUTE(eeh_enable_dbgfs_ops, eeh_enable_dbgfs_get,
1443 eeh_enable_dbgfs_set, "0x%llx\n");
1446 static int __init eeh_init_proc(void)
1448 if (machine_is(pseries) || machine_is(powernv)) {
1449 proc_create("powerpc/eeh", 0, NULL, &proc_eeh_operations);
1450 #ifdef CONFIG_DEBUG_FS
1451 debugfs_create_file("eeh_enable", 0600,
1452 powerpc_debugfs_root, NULL,
1453 &eeh_enable_dbgfs_ops);
1459 __initcall(eeh_init_proc);