1 #ifndef _ASM_POWERPC_EXCEPTION_H
2 #define _ASM_POWERPC_EXCEPTION_H
4 * Extracted from head_64.S
7 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
9 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
10 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
11 * Adapted for Power Macintosh by Paul Mackerras.
12 * Low-level exception handlers and MMU support
13 * rewritten by Paul Mackerras.
14 * Copyright (C) 1996 Paul Mackerras.
16 * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
17 * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
19 * This file contains the low-level support and setup for the
20 * PowerPC-64 platform, including trap and interrupt dispatch.
22 * This program is free software; you can redistribute it and/or
23 * modify it under the terms of the GNU General Public License
24 * as published by the Free Software Foundation; either version
25 * 2 of the License, or (at your option) any later version.
28 * The following macros define the code that appears as
29 * the prologue to each of the exception handlers. They
30 * are split into two parts to allow a single kernel binary
31 * to be used for pSeries and iSeries.
33 * We make as much of the exception code common between native
34 * exception handlers (including pSeries LPAR) and iSeries LPAR
35 * implementations as possible.
52 * We're short on space and time in the exception prolog, so we can't
53 * use the normal SET_REG_IMMEDIATE macro. Normally we just need the
54 * low halfword of the address, but for Kdump we need the whole low
57 #define LOAD_HANDLER(reg, label) \
58 addi reg,reg,(label)-_stext; /* virt addr of handler ... */
60 /* Exception register prefixes */
64 #define __EXCEPTION_PROLOG_1(area, extra, vec) \
66 std r9,area+EX_R9(r13); /* save r9 - r12 */ \
67 std r10,area+EX_R10(r13); \
68 BEGIN_FTR_SECTION_NESTED(66); \
69 mfspr r10,SPRN_CFAR; \
70 std r10,area+EX_CFAR(r13); \
71 END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \
74 std r11,area+EX_R11(r13); \
75 std r12,area+EX_R12(r13); \
77 std r10,area+EX_R13(r13)
78 #define EXCEPTION_PROLOG_1(area, extra, vec) \
79 __EXCEPTION_PROLOG_1(area, extra, vec)
81 #define __EXCEPTION_PROLOG_PSERIES_1(label, h) \
82 ld r12,PACAKBASE(r13); /* get high part of &label */ \
83 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \
84 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
85 LOAD_HANDLER(r12,label) \
86 mtspr SPRN_##h##SRR0,r12; \
87 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
88 mtspr SPRN_##h##SRR1,r10; \
90 b . /* prevent speculative execution */
91 #define EXCEPTION_PROLOG_PSERIES_1(label, h) \
92 __EXCEPTION_PROLOG_PSERIES_1(label, h)
94 #define EXCEPTION_PROLOG_PSERIES(area, label, h, extra, vec) \
95 EXCEPTION_PROLOG_1(area, extra, vec); \
96 EXCEPTION_PROLOG_PSERIES_1(label, h);
98 #define __KVMTEST(n) \
99 lbz r10,HSTATE_IN_GUEST(r13); \
103 #define __KVM_HANDLER(area, h, n) \
105 ld r10,area+EX_R10(r13); \
106 stw r9,HSTATE_SCRATCH1(r13); \
107 ld r9,area+EX_R9(r13); \
108 std r12,HSTATE_SCRATCH0(r13); \
112 #define __KVM_HANDLER_SKIP(area, h, n) \
114 cmpwi r10,KVM_GUEST_MODE_SKIP; \
115 ld r10,area+EX_R10(r13); \
117 stw r9,HSTATE_SCRATCH1(r13); \
118 ld r9,area+EX_R9(r13); \
119 std r12,HSTATE_SCRATCH0(r13); \
121 b kvmppc_interrupt; \
122 89: mtocrf 0x80,r9; \
123 ld r9,area+EX_R9(r13); \
124 b kvmppc_skip_##h##interrupt
126 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
127 #define KVMTEST(n) __KVMTEST(n)
128 #define KVM_HANDLER(area, h, n) __KVM_HANDLER(area, h, n)
129 #define KVM_HANDLER_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n)
133 #define KVM_HANDLER(area, h, n)
134 #define KVM_HANDLER_SKIP(area, h, n)
137 #ifdef CONFIG_KVM_BOOK3S_PR
138 #define KVMTEST_PR(n) __KVMTEST(n)
139 #define KVM_HANDLER_PR(area, h, n) __KVM_HANDLER(area, h, n)
140 #define KVM_HANDLER_PR_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n)
143 #define KVMTEST_PR(n)
144 #define KVM_HANDLER_PR(area, h, n)
145 #define KVM_HANDLER_PR_SKIP(area, h, n)
151 * The common exception prolog is used for all except a few exceptions
152 * such as a segment miss on a kernel address. We have to be prepared
153 * to take another exception from the point where we first touch the
154 * kernel stack onwards.
156 * On entry r13 points to the paca, r9-r13 are saved in the paca,
157 * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and
158 * SRR1, and relocation is on.
160 #define EXCEPTION_PROLOG_COMMON(n, area) \
161 andi. r10,r12,MSR_PR; /* See if coming from user */ \
162 mr r10,r1; /* Save r1 */ \
163 subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \
165 ld r1,PACAKSAVE(r13); /* kernel stack to use */ \
166 1: cmpdi cr1,r1,0; /* check if r1 is in userspace */ \
167 blt+ cr1,3f; /* abort if it is */ \
168 li r1,(n); /* will be reloaded later */ \
169 sth r1,PACA_TRAP_SAVE(r13); \
170 std r3,area+EX_R3(r13); \
171 addi r3,r13,area; /* r3 -> where regs are saved*/ \
173 3: std r9,_CCR(r1); /* save CR in stackframe */ \
174 std r11,_NIP(r1); /* save SRR0 in stackframe */ \
175 std r12,_MSR(r1); /* save SRR1 in stackframe */ \
176 std r10,0(r1); /* make stack chain pointer */ \
177 std r0,GPR0(r1); /* save r0 in stackframe */ \
178 std r10,GPR1(r1); /* save r1 in stackframe */ \
179 ACCOUNT_CPU_USER_ENTRY(r9, r10); \
180 std r2,GPR2(r1); /* save r2 in stackframe */ \
181 SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \
182 SAVE_2GPRS(7, r1); /* save r7, r8 in stackframe */ \
183 ld r9,area+EX_R9(r13); /* move r9, r10 to stackframe */ \
184 ld r10,area+EX_R10(r13); \
187 ld r9,area+EX_R11(r13); /* move r11 - r13 to stackframe */ \
188 ld r10,area+EX_R12(r13); \
189 ld r11,area+EX_R13(r13); \
193 BEGIN_FTR_SECTION_NESTED(66); \
194 ld r10,area+EX_CFAR(r13); \
195 std r10,ORIG_GPR3(r1); \
196 END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \
197 ld r2,PACATOC(r13); /* get kernel TOC into r2 */ \
198 mflr r9; /* save LR in stackframe */ \
200 mfctr r10; /* save CTR in stackframe */ \
202 lbz r10,PACASOFTIRQEN(r13); \
203 mfspr r11,SPRN_XER; /* save XER in stackframe */ \
207 std r9,_TRAP(r1); /* set trap number */ \
209 ld r11,exception_marker@toc(r2); \
210 std r10,RESULT(r1); /* clear regs->result */ \
211 std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */ \
217 #define STD_EXCEPTION_PSERIES(loc, vec, label) \
219 .globl label##_pSeries; \
222 SET_SCRATCH0(r13); /* save r13 */ \
223 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
224 EXC_STD, KVMTEST_PR, vec)
226 #define STD_EXCEPTION_HV(loc, vec, label) \
231 SET_SCRATCH0(r13); /* save r13 */ \
232 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
233 EXC_HV, KVMTEST, vec)
235 /* This associate vector numbers with bits in paca->irq_happened */
236 #define SOFTEN_VALUE_0x500 PACA_IRQ_EE
237 #define SOFTEN_VALUE_0x502 PACA_IRQ_EE
238 #define SOFTEN_VALUE_0x900 PACA_IRQ_DEC
239 #define SOFTEN_VALUE_0x982 PACA_IRQ_DEC
241 #define __SOFTEN_TEST(h, vec) \
242 lbz r10,PACASOFTIRQEN(r13); \
244 li r10,SOFTEN_VALUE_##vec; \
245 beq masked_##h##interrupt
246 #define _SOFTEN_TEST(h, vec) __SOFTEN_TEST(h, vec)
248 #define SOFTEN_TEST_PR(vec) \
250 _SOFTEN_TEST(EXC_STD, vec)
252 #define SOFTEN_TEST_HV(vec) \
254 _SOFTEN_TEST(EXC_HV, vec)
256 #define SOFTEN_TEST_HV_201(vec) \
258 _SOFTEN_TEST(EXC_STD, vec)
260 #define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \
262 SET_SCRATCH0(r13); /* save r13 */ \
263 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \
264 EXCEPTION_PROLOG_PSERIES_1(label##_common, h);
265 #define _MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \
266 __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra)
268 #define MASKABLE_EXCEPTION_PSERIES(loc, vec, label) \
270 .globl label##_pSeries; \
272 _MASKABLE_EXCEPTION_PSERIES(vec, label, \
273 EXC_STD, SOFTEN_TEST_PR)
275 #define MASKABLE_EXCEPTION_HV(loc, vec, label) \
279 _MASKABLE_EXCEPTION_PSERIES(vec, label, \
280 EXC_HV, SOFTEN_TEST_HV)
283 * Our exception common code can be passed various "additions"
284 * to specify the behaviour of interrupts, whether to kick the
288 /* Exception addition: Hard disable interrupts */
289 #define DISABLE_INTS SOFT_DISABLE_INTS(r10,r11)
291 /* Exception addition: Keep interrupt state */
292 #define ENABLE_INTS \
293 ld r11,PACAKMSR(r13); \
295 rlwimi r11,r12,0,MSR_EE; \
301 #define RUNLATCH_ON \
303 clrrdi r3,r1,THREAD_SHIFT; \
304 ld r4,TI_LOCAL_FLAGS(r3); \
305 andi. r0,r4,_TLF_RUNLATCH; \
306 beql ppc64_runlatch_on_trampoline; \
307 END_FTR_SECTION_IFSET(CPU_FTR_CTRL)
309 #define EXCEPTION_COMMON(trap, label, hdlr, ret, additions) \
311 .globl label##_common; \
313 EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \
315 addi r3,r1,STACK_FRAME_OVERHEAD; \
319 #define STD_EXCEPTION_COMMON(trap, label, hdlr) \
320 EXCEPTION_COMMON(trap, label, hdlr, ret_from_except, \
321 ADD_NVGPRS;DISABLE_INTS)
324 * Like STD_EXCEPTION_COMMON, but for exceptions that can occur
325 * in the idle task and therefore need the special idle handling
326 * (finish nap and runlatch)
328 #define STD_EXCEPTION_COMMON_ASYNC(trap, label, hdlr) \
329 EXCEPTION_COMMON(trap, label, hdlr, ret_from_except_lite, \
330 FINISH_NAP;RUNLATCH_ON;DISABLE_INTS)
333 * When the idle code in power4_idle puts the CPU into NAP mode,
334 * it has to do so in a loop, and relies on the external interrupt
335 * and decrementer interrupt entry code to get it out of the loop.
336 * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags
337 * to signal that it is in the loop and needs help to get out.
339 #ifdef CONFIG_PPC_970_NAP
342 clrrdi r11,r1,THREAD_SHIFT; \
343 ld r9,TI_LOCAL_FLAGS(r11); \
344 andi. r10,r9,_TLF_NAPPING; \
345 bnel power4_fixup_nap; \
346 END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
351 #endif /* _ASM_POWERPC_EXCEPTION_H */