1 #ifndef _ASM_POWERPC_EXCEPTION_H
2 #define _ASM_POWERPC_EXCEPTION_H
4 * Extracted from head_64.S
7 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
9 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
10 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
11 * Adapted for Power Macintosh by Paul Mackerras.
12 * Low-level exception handlers and MMU support
13 * rewritten by Paul Mackerras.
14 * Copyright (C) 1996 Paul Mackerras.
16 * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
17 * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
19 * This file contains the low-level support and setup for the
20 * PowerPC-64 platform, including trap and interrupt dispatch.
22 * This program is free software; you can redistribute it and/or
23 * modify it under the terms of the GNU General Public License
24 * as published by the Free Software Foundation; either version
25 * 2 of the License, or (at your option) any later version.
28 * The following macros define the code that appears as
29 * the prologue to each of the exception handlers. They
30 * are split into two parts to allow a single kernel binary
31 * to be used for pSeries and iSeries.
33 * We make as much of the exception code common between native
34 * exception handlers (including pSeries LPAR) and iSeries LPAR
35 * implementations as possible.
51 #ifdef CONFIG_RELOCATABLE
52 #define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
53 ld r12,PACAKBASE(r13); /* get high part of &label */ \
54 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
55 LOAD_HANDLER(r12,label); \
57 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
59 mtmsrd r10,1; /* Set RI (EE=0) */ \
62 /* If not relocatable, we can jump directly -- and save messing with LR */
63 #define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
64 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
65 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
67 mtmsrd r10,1; /* Set RI (EE=0) */ \
72 * As EXCEPTION_PROLOG_PSERIES(), except we've already got relocation on
73 * so no need to rfid. Save lr in case we're CONFIG_RELOCATABLE, in which
74 * case EXCEPTION_RELON_PROLOG_PSERIES_1 will be using lr.
76 #define EXCEPTION_RELON_PROLOG_PSERIES(area, label, h, extra, vec) \
77 EXCEPTION_PROLOG_1(area, extra, vec); \
78 EXCEPTION_RELON_PROLOG_PSERIES_1(label, h)
81 * We're short on space and time in the exception prolog, so we can't
82 * use the normal SET_REG_IMMEDIATE macro. Normally we just need the
83 * low halfword of the address, but for Kdump we need the whole low
86 #define LOAD_HANDLER(reg, label) \
87 /* Handlers must be within 64K of kbase, which must be 64k aligned */ \
88 ori reg,reg,(label)-_stext; /* virt addr of handler ... */
90 /* Exception register prefixes */
94 #if defined(CONFIG_RELOCATABLE)
96 * If we support interrupts with relocation on AND we're a relocatable
97 * kernel, we need to use LR to get to the 2nd level handler. So, save/restore
100 #define SAVE_LR(reg, area) mflr reg ; std reg,area+EX_LR(r13)
101 #define GET_LR(reg, area) ld reg,area+EX_LR(r13)
102 #define RESTORE_LR(reg, area) ld reg,area+EX_LR(r13) ; mtlr reg
104 /* ...else LR is unused and in register. */
105 #define SAVE_LR(reg, area)
106 #define GET_LR(reg, area) mflr reg
107 #define RESTORE_LR(reg, area)
110 #define __EXCEPTION_PROLOG_1(area, extra, vec) \
112 std r9,area+EX_R9(r13); /* save r9 - r12 */ \
113 std r10,area+EX_R10(r13); \
114 BEGIN_FTR_SECTION_NESTED(66); \
115 mfspr r10,SPRN_CFAR; \
116 std r10,area+EX_CFAR(r13); \
117 END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \
118 SAVE_LR(r10, area); \
121 std r11,area+EX_R11(r13); \
122 std r12,area+EX_R12(r13); \
124 std r10,area+EX_R13(r13)
125 #define EXCEPTION_PROLOG_1(area, extra, vec) \
126 __EXCEPTION_PROLOG_1(area, extra, vec)
128 #define __EXCEPTION_PROLOG_PSERIES_1(label, h) \
129 ld r12,PACAKBASE(r13); /* get high part of &label */ \
130 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \
131 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
132 LOAD_HANDLER(r12,label) \
133 mtspr SPRN_##h##SRR0,r12; \
134 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
135 mtspr SPRN_##h##SRR1,r10; \
137 b . /* prevent speculative execution */
138 #define EXCEPTION_PROLOG_PSERIES_1(label, h) \
139 __EXCEPTION_PROLOG_PSERIES_1(label, h)
141 #define EXCEPTION_PROLOG_PSERIES(area, label, h, extra, vec) \
142 EXCEPTION_PROLOG_1(area, extra, vec); \
143 EXCEPTION_PROLOG_PSERIES_1(label, h);
145 #define __KVMTEST(n) \
146 lbz r10,HSTATE_IN_GUEST(r13); \
150 #define __KVM_HANDLER(area, h, n) \
152 ld r10,area+EX_R10(r13); \
153 stw r9,HSTATE_SCRATCH1(r13); \
154 ld r9,area+EX_R9(r13); \
155 std r12,HSTATE_SCRATCH0(r13); \
159 #define __KVM_HANDLER_SKIP(area, h, n) \
161 cmpwi r10,KVM_GUEST_MODE_SKIP; \
162 ld r10,area+EX_R10(r13); \
164 stw r9,HSTATE_SCRATCH1(r13); \
165 ld r9,area+EX_R9(r13); \
166 std r12,HSTATE_SCRATCH0(r13); \
168 b kvmppc_interrupt; \
169 89: mtocrf 0x80,r9; \
170 ld r9,area+EX_R9(r13); \
171 b kvmppc_skip_##h##interrupt
173 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
174 #define KVMTEST(n) __KVMTEST(n)
175 #define KVM_HANDLER(area, h, n) __KVM_HANDLER(area, h, n)
176 #define KVM_HANDLER_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n)
180 #define KVM_HANDLER(area, h, n)
181 #define KVM_HANDLER_SKIP(area, h, n)
184 #ifdef CONFIG_KVM_BOOK3S_PR
185 #define KVMTEST_PR(n) __KVMTEST(n)
186 #define KVM_HANDLER_PR(area, h, n) __KVM_HANDLER(area, h, n)
187 #define KVM_HANDLER_PR_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n)
190 #define KVMTEST_PR(n)
191 #define KVM_HANDLER_PR(area, h, n)
192 #define KVM_HANDLER_PR_SKIP(area, h, n)
198 * The common exception prolog is used for all except a few exceptions
199 * such as a segment miss on a kernel address. We have to be prepared
200 * to take another exception from the point where we first touch the
201 * kernel stack onwards.
203 * On entry r13 points to the paca, r9-r13 are saved in the paca,
204 * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and
205 * SRR1, and relocation is on.
207 #define EXCEPTION_PROLOG_COMMON(n, area) \
208 andi. r10,r12,MSR_PR; /* See if coming from user */ \
209 mr r10,r1; /* Save r1 */ \
210 subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \
212 ld r1,PACAKSAVE(r13); /* kernel stack to use */ \
213 1: cmpdi cr1,r1,0; /* check if r1 is in userspace */ \
214 blt+ cr1,3f; /* abort if it is */ \
215 li r1,(n); /* will be reloaded later */ \
216 sth r1,PACA_TRAP_SAVE(r13); \
217 std r3,area+EX_R3(r13); \
218 addi r3,r13,area; /* r3 -> where regs are saved*/ \
219 RESTORE_LR(r1, area); \
221 3: std r9,_CCR(r1); /* save CR in stackframe */ \
222 std r11,_NIP(r1); /* save SRR0 in stackframe */ \
223 std r12,_MSR(r1); /* save SRR1 in stackframe */ \
224 std r10,0(r1); /* make stack chain pointer */ \
225 std r0,GPR0(r1); /* save r0 in stackframe */ \
226 std r10,GPR1(r1); /* save r1 in stackframe */ \
227 beq 4f; /* if from kernel mode */ \
228 ACCOUNT_CPU_USER_ENTRY(r9, r10); \
229 4: std r2,GPR2(r1); /* save r2 in stackframe */ \
230 SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \
231 SAVE_2GPRS(7, r1); /* save r7, r8 in stackframe */ \
232 ld r9,area+EX_R9(r13); /* move r9, r10 to stackframe */ \
233 ld r10,area+EX_R10(r13); \
236 ld r9,area+EX_R11(r13); /* move r11 - r13 to stackframe */ \
237 ld r10,area+EX_R12(r13); \
238 ld r11,area+EX_R13(r13); \
242 BEGIN_FTR_SECTION_NESTED(66); \
243 ld r10,area+EX_CFAR(r13); \
244 std r10,ORIG_GPR3(r1); \
245 END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \
246 GET_LR(r9,area); /* Get LR, later save to stack */ \
247 ld r2,PACATOC(r13); /* get kernel TOC into r2 */ \
249 mfctr r10; /* save CTR in stackframe */ \
251 lbz r10,PACASOFTIRQEN(r13); \
252 mfspr r11,SPRN_XER; /* save XER in stackframe */ \
256 std r9,_TRAP(r1); /* set trap number */ \
258 ld r11,exception_marker@toc(r2); \
259 std r10,RESULT(r1); /* clear regs->result */ \
260 std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */ \
266 #define STD_EXCEPTION_PSERIES(loc, vec, label) \
268 .globl label##_pSeries; \
271 SET_SCRATCH0(r13); /* save r13 */ \
272 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
273 EXC_STD, KVMTEST_PR, vec)
275 #define STD_EXCEPTION_HV(loc, vec, label) \
280 SET_SCRATCH0(r13); /* save r13 */ \
281 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
282 EXC_HV, KVMTEST, vec)
284 #define STD_RELON_EXCEPTION_PSERIES(loc, vec, label) \
286 .globl label##_relon_pSeries; \
287 label##_relon_pSeries: \
289 /* No guest interrupts come through here */ \
290 SET_SCRATCH0(r13); /* save r13 */ \
291 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
292 EXC_STD, KVMTEST_PR, vec)
294 #define STD_RELON_EXCEPTION_HV(loc, vec, label) \
296 .globl label##_relon_hv; \
299 /* No guest interrupts come through here */ \
300 SET_SCRATCH0(r13); /* save r13 */ \
301 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
302 EXC_HV, KVMTEST, vec)
304 /* This associate vector numbers with bits in paca->irq_happened */
305 #define SOFTEN_VALUE_0x500 PACA_IRQ_EE
306 #define SOFTEN_VALUE_0x502 PACA_IRQ_EE
307 #define SOFTEN_VALUE_0x900 PACA_IRQ_DEC
308 #define SOFTEN_VALUE_0x982 PACA_IRQ_DEC
309 #define SOFTEN_VALUE_0xa00 PACA_IRQ_DBELL
310 #define SOFTEN_VALUE_0xe80 PACA_IRQ_DBELL
311 #define SOFTEN_VALUE_0xe82 PACA_IRQ_DBELL
313 #define __SOFTEN_TEST(h, vec) \
314 lbz r10,PACASOFTIRQEN(r13); \
316 li r10,SOFTEN_VALUE_##vec; \
317 beq masked_##h##interrupt
318 #define _SOFTEN_TEST(h, vec) __SOFTEN_TEST(h, vec)
320 #define SOFTEN_TEST_PR(vec) \
322 _SOFTEN_TEST(EXC_STD, vec)
324 #define SOFTEN_TEST_HV(vec) \
326 _SOFTEN_TEST(EXC_HV, vec)
328 #define SOFTEN_TEST_HV_201(vec) \
330 _SOFTEN_TEST(EXC_STD, vec)
332 #define SOFTEN_NOTEST_PR(vec) _SOFTEN_TEST(EXC_STD, vec)
333 #define SOFTEN_NOTEST_HV(vec) _SOFTEN_TEST(EXC_HV, vec)
335 #define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \
337 SET_SCRATCH0(r13); /* save r13 */ \
338 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \
339 EXCEPTION_PROLOG_PSERIES_1(label##_common, h);
340 #define _MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \
341 __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra)
343 #define MASKABLE_EXCEPTION_PSERIES(loc, vec, label) \
345 .globl label##_pSeries; \
347 _MASKABLE_EXCEPTION_PSERIES(vec, label, \
348 EXC_STD, SOFTEN_TEST_PR)
350 #define MASKABLE_EXCEPTION_HV(loc, vec, label) \
354 _MASKABLE_EXCEPTION_PSERIES(vec, label, \
355 EXC_HV, SOFTEN_TEST_HV)
357 #define __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \
359 SET_SCRATCH0(r13); /* save r13 */ \
360 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \
361 EXCEPTION_RELON_PROLOG_PSERIES_1(label##_common, h);
362 #define _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \
363 __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra)
365 #define MASKABLE_RELON_EXCEPTION_PSERIES(loc, vec, label) \
367 .globl label##_relon_pSeries; \
368 label##_relon_pSeries: \
369 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \
370 EXC_STD, SOFTEN_NOTEST_PR)
372 #define MASKABLE_RELON_EXCEPTION_HV(loc, vec, label) \
374 .globl label##_relon_hv; \
376 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \
377 EXC_HV, SOFTEN_NOTEST_HV)
380 * Our exception common code can be passed various "additions"
381 * to specify the behaviour of interrupts, whether to kick the
385 /* Exception addition: Hard disable interrupts */
386 #define DISABLE_INTS SOFT_DISABLE_INTS(r10,r11)
391 #define RUNLATCH_ON \
393 CURRENT_THREAD_INFO(r3, r1); \
394 ld r4,TI_LOCAL_FLAGS(r3); \
395 andi. r0,r4,_TLF_RUNLATCH; \
396 beql ppc64_runlatch_on_trampoline; \
397 END_FTR_SECTION_IFSET(CPU_FTR_CTRL)
399 #define EXCEPTION_COMMON(trap, label, hdlr, ret, additions) \
401 .globl label##_common; \
403 EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \
405 addi r3,r1,STACK_FRAME_OVERHEAD; \
409 #define STD_EXCEPTION_COMMON(trap, label, hdlr) \
410 EXCEPTION_COMMON(trap, label, hdlr, ret_from_except, \
411 ADD_NVGPRS;DISABLE_INTS)
414 * Like STD_EXCEPTION_COMMON, but for exceptions that can occur
415 * in the idle task and therefore need the special idle handling
416 * (finish nap and runlatch)
418 #define STD_EXCEPTION_COMMON_ASYNC(trap, label, hdlr) \
419 EXCEPTION_COMMON(trap, label, hdlr, ret_from_except_lite, \
420 FINISH_NAP;RUNLATCH_ON;DISABLE_INTS)
423 * When the idle code in power4_idle puts the CPU into NAP mode,
424 * it has to do so in a loop, and relies on the external interrupt
425 * and decrementer interrupt entry code to get it out of the loop.
426 * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags
427 * to signal that it is in the loop and needs help to get out.
429 #ifdef CONFIG_PPC_970_NAP
432 CURRENT_THREAD_INFO(r11, r1); \
433 ld r9,TI_LOCAL_FLAGS(r11); \
434 andi. r10,r9,_TLF_NAPPING; \
435 bnel power4_fixup_nap; \
436 END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
441 #endif /* _ASM_POWERPC_EXCEPTION_H */