2 * Motorola ECC prpmc280/f101 & prpmc2800/f101e platform code.
4 * Author: Mark A. Greer <mgreer@mvista.com>
6 * 2007 (c) MontaVista, Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
21 #include "gunzip_util.h"
25 extern char _vmlinux_start[], _vmlinux_end[];
26 extern char _dtb_start[], _dtb_end[];
31 #define MHz (1000U*1000U)
32 #define GHz (1000U*MHz)
34 #define BOARD_MODEL "PrPMC2800"
35 #define BOARD_MODEL_MAX 32 /* max strlen(BOARD_MODEL) + 1 */
37 #define EEPROM2_ADDR 0xa4
38 #define EEPROM3_ADDR 0xa8
42 static u8 *bridge_base;
46 BOARD_MODEL_PRPMC2800,
47 } prpmc2800_board_model;
52 } prpmc2800_bridge_type;
54 struct prpmc2800_board_info {
55 prpmc2800_board_model model;
57 prpmc2800_bridge_type bridge_type;
68 static struct prpmc2800_board_info prpmc2800_board_info[] = {
70 .model = BOARD_MODEL_PRPMC280,
72 .bridge_type = BRIDGE_TYPE_MV64360,
83 .model = BOARD_MODEL_PRPMC280,
85 .bridge_type = BRIDGE_TYPE_MV64362,
96 .model = BOARD_MODEL_PRPMC280,
98 .bridge_type = BRIDGE_TYPE_MV64360,
103 .core_speed = 733*MHz,
109 .model = BOARD_MODEL_PRPMC280,
111 .bridge_type = BRIDGE_TYPE_MV64360,
122 .model = BOARD_MODEL_PRPMC280,
124 .bridge_type = BRIDGE_TYPE_MV64360,
135 .model = BOARD_MODEL_PRPMC280,
137 .bridge_type = BRIDGE_TYPE_MV64362,
142 .core_speed = 733*MHz,
148 .model = BOARD_MODEL_PRPMC280,
150 .bridge_type = BRIDGE_TYPE_MV64360,
161 .model = BOARD_MODEL_PRPMC280,
163 .bridge_type = BRIDGE_TYPE_MV64360,
174 .model = BOARD_MODEL_PRPMC2800,
176 .bridge_type = BRIDGE_TYPE_MV64360,
187 .model = BOARD_MODEL_PRPMC2800,
189 .bridge_type = BRIDGE_TYPE_MV64362,
200 .model = BOARD_MODEL_PRPMC2800,
202 .bridge_type = BRIDGE_TYPE_MV64360,
207 .core_speed = 733*MHz,
213 .model = BOARD_MODEL_PRPMC2800,
215 .bridge_type = BRIDGE_TYPE_MV64360,
226 .model = BOARD_MODEL_PRPMC2800,
228 .bridge_type = BRIDGE_TYPE_MV64360,
239 .model = BOARD_MODEL_PRPMC2800,
241 .bridge_type = BRIDGE_TYPE_MV64362,
246 .core_speed = 733*MHz,
252 .model = BOARD_MODEL_PRPMC2800,
254 .bridge_type = BRIDGE_TYPE_MV64360,
265 .model = BOARD_MODEL_PRPMC2800,
267 .bridge_type = BRIDGE_TYPE_MV64360,
272 .core_speed = 733*MHz,
279 static struct prpmc2800_board_info *prpmc2800_get_board_info(u8 *vpd)
281 struct prpmc2800_board_info *bip;
284 for (i=0,bip=prpmc2800_board_info; i<ARRAY_SIZE(prpmc2800_board_info);
286 if ((vpd[0] == bip->subsys0) && (vpd[1] == bip->subsys1)
287 && ((vpd[4] & bip->vpd4_mask) == bip->vpd4))
293 /* Get VPD from i2c eeprom 2, then match it to a board info entry */
294 static struct prpmc2800_board_info *prpmc2800_get_bip(void)
296 struct prpmc2800_board_info *bip;
300 if (mv64x60_i2c_open())
301 fatal("Error: Can't open i2c device\n\r");
303 /* Get VPD from i2c eeprom-2 */
304 memset(vpd, 0, sizeof(vpd));
305 rc = mv64x60_i2c_read(EEPROM2_ADDR, vpd, 0x1fde, 2, sizeof(vpd));
307 fatal("Error: Couldn't read eeprom2\n\r");
310 /* Get board type & related info */
311 bip = prpmc2800_get_board_info(vpd);
313 printf("Error: Unsupported board or corrupted VPD:\n\r");
314 printf(" 0x%x 0x%x 0x%x 0x%x 0x%x\n\r",
315 vpd[0], vpd[1], vpd[2], vpd[3], vpd[4]);
316 printf("Using device tree defaults...\n\r");
322 static void prpmc2800_bridge_setup(u32 mem_size)
324 u32 i, v[12], enables, acc_bits;
325 u32 pci_base_hi, pci_base_lo, size, buf[2];
326 unsigned long cpu_base;
329 u8 *bridge_pbase, is_coherent;
330 struct mv64x60_cpu2pci_win *tbl;
332 bridge_pbase = mv64x60_get_bridge_pbase();
333 is_coherent = mv64x60_is_coherent();
336 acc_bits = MV64x60_PCI_ACC_CNTL_SNOOP_WB
337 | MV64x60_PCI_ACC_CNTL_SWAP_NONE
338 | MV64x60_PCI_ACC_CNTL_MBURST_32_BYTES
339 | MV64x60_PCI_ACC_CNTL_RDSIZE_32_BYTES;
341 acc_bits = MV64x60_PCI_ACC_CNTL_SNOOP_NONE
342 | MV64x60_PCI_ACC_CNTL_SWAP_NONE
343 | MV64x60_PCI_ACC_CNTL_MBURST_128_BYTES
344 | MV64x60_PCI_ACC_CNTL_RDSIZE_256_BYTES;
346 mv64x60_config_ctlr_windows(bridge_base, bridge_pbase, is_coherent);
347 mv64x60_config_pci_windows(bridge_base, bridge_pbase, 0, 0, mem_size,
350 /* Get the cpu -> pci i/o & mem mappings from the device tree */
351 devp = finddevice("/mv64x60/pci@80000000");
353 fatal("Error: Missing /mv64x60/pci@80000000"
354 " device tree node\n\r");
356 rc = getprop(devp, "ranges", v, sizeof(v));
358 fatal("Error: Can't find /mv64x60/pci@80000000/ranges"
361 /* Get the cpu -> pci i/o & mem mappings from the device tree */
362 devp = finddevice("/mv64x60");
364 fatal("Error: Missing /mv64x60 device tree node\n\r");
366 enables = in_le32((u32 *)(bridge_base + MV64x60_CPU_BAR_ENABLE));
367 enables |= 0x0007fe00; /* Disable all cpu->pci windows */
368 out_le32((u32 *)(bridge_base + MV64x60_CPU_BAR_ENABLE), enables);
370 for (i=0; i<12; i+=6) {
371 switch (v[i] & 0xff000000) {
372 case 0x01000000: /* PCI I/O Space */
373 tbl = mv64x60_cpu2pci_io;
375 case 0x02000000: /* PCI MEM Space */
376 tbl = mv64x60_cpu2pci_mem;
382 pci_base_hi = v[i+1];
383 pci_base_lo = v[i+2];
390 if (!dt_xlate_addr(devp, buf, sizeof(buf), &cpu_base))
391 fatal("Error: Can't translate PCI address 0x%x\n\r",
394 mv64x60_config_cpu2pci_window(bridge_base, 0, pci_base_hi,
395 pci_base_lo, cpu_base, size, tbl);
398 enables &= ~0x00000600; /* Enable cpu->pci0 i/o, cpu->pci0 mem0 */
399 out_le32((u32 *)(bridge_base + MV64x60_CPU_BAR_ENABLE), enables);
402 static void prpmc2800_fixups(void)
404 u32 v[2], l, mem_size;
407 char model[BOARD_MODEL_MAX];
408 struct prpmc2800_board_info *bip;
410 bip = prpmc2800_get_bip(); /* Get board info based on VPD */
412 mem_size = (bip) ? bip->mem_size : mv64x60_get_mem_size(bridge_base);
413 prpmc2800_bridge_setup(mem_size); /* Do necessary bridge setup */
415 /* If the VPD doesn't match what we know about, just use the
416 * defaults already in the device tree.
421 /* Know the board type so override device tree defaults */
422 /* Set /model appropriately */
423 devp = finddevice("/");
425 fatal("Error: Missing '/' device tree node\n\r");
426 memset(model, 0, BOARD_MODEL_MAX);
427 strncpy(model, BOARD_MODEL, BOARD_MODEL_MAX - 2);
429 if (bip->model == BOARD_MODEL_PRPMC280)
431 model[l++] = bip->variant;
433 setprop(devp, "model", model, l);
435 /* Set /cpus/PowerPC,7447/clock-frequency */
436 devp = finddevice("/cpus/PowerPC,7447");
438 fatal("Error: Missing proper /cpus device tree node\n\r");
439 v[0] = bip->core_speed;
440 setprop(devp, "clock-frequency", &v[0], sizeof(v[0]));
442 /* Set /memory/reg size */
443 devp = finddevice("/memory");
445 fatal("Error: Missing /memory device tree node\n\r");
447 v[1] = bip->mem_size;
448 setprop(devp, "reg", v, sizeof(v));
450 /* Update /mv64x60/model, if this is a mv64362 */
451 if (bip->bridge_type == BRIDGE_TYPE_MV64362) {
452 devp = finddevice("/mv64x60");
454 fatal("Error: Missing /mv64x60 device tree node\n\r");
455 setprop(devp, "model", "mv64362", strlen("mv64362") + 1);
458 /* Set User FLASH size */
459 devp = finddevice("/mv64x60/flash@a0000000");
461 fatal("Error: Missing User FLASH device tree node\n\r");
462 rc = getprop(devp, "reg", v, sizeof(v));
464 fatal("Error: Can't find User FLASH reg property\n\r");
465 v[1] = bip->user_flash;
466 setprop(devp, "reg", v, sizeof(v));
469 #define MV64x60_MPP_CNTL_0 0xf000
470 #define MV64x60_MPP_CNTL_2 0xf008
471 #define MV64x60_GPP_IO_CNTL 0xf100
472 #define MV64x60_GPP_LEVEL_CNTL 0xf110
473 #define MV64x60_GPP_VALUE_SET 0xf118
475 static void prpmc2800_reset(void)
481 if (bridge_base != 0) {
482 temp = in_le32((u32 *)(bridge_base + MV64x60_MPP_CNTL_0));
484 out_le32((u32 *)(bridge_base + MV64x60_MPP_CNTL_0), temp);
486 temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_LEVEL_CNTL));
488 out_le32((u32 *)(bridge_base + MV64x60_GPP_LEVEL_CNTL), temp);
490 temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_IO_CNTL));
492 out_le32((u32 *)(bridge_base + MV64x60_GPP_IO_CNTL), temp);
494 temp = in_le32((u32 *)(bridge_base + MV64x60_MPP_CNTL_2));
496 out_le32((u32 *)(bridge_base + MV64x60_MPP_CNTL_2), temp);
498 temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_LEVEL_CNTL));
500 out_le32((u32 *)(bridge_base + MV64x60_GPP_LEVEL_CNTL), temp);
502 temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_IO_CNTL));
504 out_le32((u32 *)(bridge_base + MV64x60_GPP_IO_CNTL), temp);
506 out_le32((u32 *)(bridge_base + MV64x60_GPP_VALUE_SET),
513 #define HEAP_SIZE (16*MB)
514 static struct gunzip_state gzstate;
516 void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
517 unsigned long r6, unsigned long r7)
520 char *heap_start, *dtb;
521 int dt_size = _dtb_end - _dtb_start;
522 void *vmlinuz_addr = _vmlinux_start;
523 unsigned long vmlinuz_size = _vmlinux_end - _vmlinux_start;
526 if (dt_size <= 0) /* No fdt */
530 * Start heap after end of the kernel (after decompressed to
531 * address 0) or the end of the zImage, whichever is higher.
532 * That's so things allocated by simple_alloc won't overwrite
533 * any part of the zImage and the kernel won't overwrite the dtb
534 * when decompressed & relocated.
536 gunzip_start(&gzstate, vmlinuz_addr, vmlinuz_size);
537 gunzip_exactly(&gzstate, elfheader, sizeof(elfheader));
539 if (!parse_elf32(elfheader, &ei))
542 heap_start = (char *)(ei.memsize + ei.elfoffset); /* end of kernel*/
543 heap_start = max(heap_start, (char *)_end); /* end of zImage */
545 if ((unsigned)simple_alloc_init(heap_start, HEAP_SIZE, 2*KB, 16)
549 /* Relocate dtb to safe area past end of zImage & kernel */
550 dtb = malloc(dt_size);
553 memmove(dtb, _dtb_start, dt_size);
554 if (ft_init(dtb, dt_size, 16))
557 bridge_base = mv64x60_get_bridge_base();
559 platform_ops.fixups = prpmc2800_fixups;
560 platform_ops.exit = prpmc2800_reset;
562 if (serial_console_init() < 0)
566 /* _zimage_start called very early--need to turn off external interrupts */
567 asm (" .globl _zimage_start\n\
570 rlwinm 10,10,0,~(1<<15) /* Clear MSR_EE */\n\
574 b _zimage_start_lib\n\