2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 2006, 07 Ralf Baechle (ralf@linux-mips.org)
7 * Copyright (C) 2007 Dale Farnsworth (dale@farnsworth.org)
9 #include <linux/delay.h>
10 #include <linux/if_ether.h>
11 #include <linux/init.h>
12 #include <linux/ioport.h>
13 #include <linux/module.h>
14 #include <linux/mv643xx.h>
15 #include <linux/platform_device.h>
16 #include <linux/serial_8250.h>
18 #include "ocelot_3_fpga.h"
20 #if defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE)
22 static struct resource mv643xx_eth_shared_resources[] = {
24 .name = "ethernet shared base",
25 .start = 0xf1000000 + MV643XX_ETH_SHARED_REGS,
26 .end = 0xf1000000 + MV643XX_ETH_SHARED_REGS +
27 MV643XX_ETH_SHARED_REGS_SIZE - 1,
28 .flags = IORESOURCE_MEM,
32 static struct platform_device mv643xx_eth_shared_device = {
33 .name = MV643XX_ETH_SHARED_NAME,
35 .num_resources = ARRAY_SIZE(mv643xx_eth_shared_resources),
36 .resource = mv643xx_eth_shared_resources,
39 #define MV_SRAM_BASE 0xfe000000UL
40 #define MV_SRAM_SIZE (256 * 1024)
42 #define MV_SRAM_RXRING_SIZE (MV_SRAM_SIZE / 4)
43 #define MV_SRAM_TXRING_SIZE (MV_SRAM_SIZE / 4)
45 #define MV_SRAM_BASE_ETH0 MV_SRAM_BASE
46 #define MV_SRAM_BASE_ETH1 (MV_SRAM_BASE + (MV_SRAM_SIZE / 2))
48 #define MV64x60_IRQ_ETH_0 48
49 #define MV64x60_IRQ_ETH_1 49
50 #define MV64x60_IRQ_ETH_2 50
52 static struct resource mv64x60_eth0_resources[] = {
55 .start = MV64x60_IRQ_ETH_0,
56 .end = MV64x60_IRQ_ETH_0,
57 .flags = IORESOURCE_IRQ,
61 static struct mv643xx_eth_platform_data eth0_pd = {
64 .tx_sram_addr = MV_SRAM_BASE_ETH0,
65 .tx_sram_size = MV_SRAM_TXRING_SIZE,
66 .tx_queue_size = MV_SRAM_TXRING_SIZE / 16,
68 .rx_sram_addr = MV_SRAM_BASE_ETH0 + MV_SRAM_TXRING_SIZE,
69 .rx_sram_size = MV_SRAM_RXRING_SIZE,
70 .rx_queue_size = MV_SRAM_RXRING_SIZE / 16,
73 static struct platform_device eth0_device = {
74 .name = MV643XX_ETH_NAME,
76 .num_resources = ARRAY_SIZE(mv64x60_eth0_resources),
77 .resource = mv64x60_eth0_resources,
79 .platform_data = ð0_pd,
83 static struct resource mv64x60_eth1_resources[] = {
86 .start = MV64x60_IRQ_ETH_1,
87 .end = MV64x60_IRQ_ETH_1,
88 .flags = IORESOURCE_IRQ,
92 static struct mv643xx_eth_platform_data eth1_pd = {
95 .tx_sram_addr = MV_SRAM_BASE_ETH1,
96 .tx_sram_size = MV_SRAM_TXRING_SIZE,
97 .tx_queue_size = MV_SRAM_TXRING_SIZE / 16,
99 .rx_sram_addr = MV_SRAM_BASE_ETH1 + MV_SRAM_TXRING_SIZE,
100 .rx_sram_size = MV_SRAM_RXRING_SIZE,
101 .rx_queue_size = MV_SRAM_RXRING_SIZE / 16,
104 static struct platform_device eth1_device = {
105 .name = MV643XX_ETH_NAME,
107 .num_resources = ARRAY_SIZE(mv64x60_eth1_resources),
108 .resource = mv64x60_eth1_resources,
110 .platform_data = ð1_pd,
114 static struct resource mv64x60_eth2_resources[] = {
117 .start = MV64x60_IRQ_ETH_2,
118 .end = MV64x60_IRQ_ETH_2,
119 .flags = IORESOURCE_IRQ,
123 static struct mv643xx_eth_platform_data eth2_pd = {
127 static struct platform_device eth2_device = {
128 .name = MV643XX_ETH_NAME,
130 .num_resources = ARRAY_SIZE(mv64x60_eth2_resources),
131 .resource = mv64x60_eth2_resources,
133 .platform_data = ð2_pd,
137 static struct platform_device *mv643xx_eth_pd_devs[] __initdata = {
138 &mv643xx_eth_shared_device,
144 static u8 __init exchange_bit(u8 val, u8 cs)
147 OCELOT_FPGA_WRITE((val << 2) | cs, EEPROM_MODE);
150 /* turn the clock on */
151 OCELOT_FPGA_WRITE((val << 2) | cs | 0x2, EEPROM_MODE);
154 /* turn the clock off and read-strobe */
155 OCELOT_FPGA_WRITE((val << 2) | cs | 0x10, EEPROM_MODE);
157 /* return the data */
158 return (OCELOT_FPGA_READ(EEPROM_MODE) >> 3) & 0x1;
161 static void __init get_mac(char dest[6])
163 u8 read_opcode[12] = {1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
166 for (i = 0; i < 12; i++)
167 exchange_bit(read_opcode[i], 1);
169 for (j = 0; j < 6; j++) {
171 for (i = 0; i < 8; i++) {
173 dest[j] |= exchange_bit(0, 1);
182 * Copy and increment ethernet MAC address by a small value.
184 * This is useful for systems where the only one MAC address is stored in
185 * non-volatile memory for multiple ports.
187 static inline void eth_mac_add(unsigned char *dst, unsigned char *src,
194 for (i = ETH_ALEN; i >= 0; i--) {
195 dst[i] = src[i] + add;
196 add = dst[i] < src[i]; /* compute carry */
202 static int __init mv643xx_eth_add_pds(void)
204 unsigned char mac[ETH_ALEN];
208 eth_mac_add(eth0_pd.mac_addr, mac, 0);
209 eth_mac_add(eth1_pd.mac_addr, mac, 1);
210 eth_mac_add(eth2_pd.mac_addr, mac, 2);
211 ret = platform_add_devices(mv643xx_eth_pd_devs,
212 ARRAY_SIZE(mv643xx_eth_pd_devs));
217 device_initcall(mv643xx_eth_add_pds);
219 #endif /* defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE) */
221 #define OCELOT3_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST)
223 static struct plat_serial8250_port uart8250_data[] = {
225 .membase = (signed long) 0xfd000020,
229 .flags = OCELOT3_UART_FLAGS,
235 static struct platform_device uart8250_device = {
236 .name = "serial8250",
237 .id = PLAT8250_DEV_PLATFORM,
239 .platform_data = uart8250_data,
243 static int __init uart8250_init(void)
245 return platform_device_register(&uart8250_device);
248 module_init(uart8250_init);
250 MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
251 MODULE_LICENSE("GPL");
252 MODULE_DESCRIPTION("8250 UART probe driver for the Ocelot 3");