arch/mips/mm/sc-ip22.c

   1 /*
   2  * sc-ip22.c: Indy cache management functions.
   3  *
   4  * Copyright (C) 1997, 2001 Ralf Baechle (ralf@gnu.org),
   5  * derived from r4xx0.c by David S. Miller (davem@davemloft.net).
   6  */
   7 #include <linux/init.h>
   8 #include <linux/kernel.h>
   9 #include <linux/sched.h>
  10 #include <linux/mm.h>
  11
  12 #include <asm/bcache.h>
  13 #include <asm/page.h>
  14 #include <asm/pgtable.h>
  15 #include <asm/bootinfo.h>
  16 #include <asm/sgi/ip22.h>
  17 #include <asm/sgi/mc.h>
  18
  19 /* Secondary cache size in bytes, if present.  */
  20 static unsigned long scache_size;
  21
  22 #undef DEBUG_CACHE
  23
  24 #define SC_SIZE 0x00080000
  25 #define SC_LINE 32
  26 #define CI_MASK (SC_SIZE - SC_LINE)
  27 #define SC_INDEX(n) ((n) & CI_MASK)
  28
  29 static inline void indy_sc_wipe(unsigned long first, unsigned long last)
  30 {
  31         unsigned long tmp;
  32
  33         __asm__ __volatile__(
  34         "       .set    push                    # indy_sc_wipe          \n"
  35         "       .set    noreorder                                       \n"
  36         "       .set    mips3                                           \n"
  37         "       .set    noat                                            \n"
  38         "       mfc0    %2, $12                                         \n"
  39         "       li      $1, 0x80                # Go 64 bit             \n"
  40         "       mtc0    $1, $12                                         \n"
  41         "                                                               \n"
  42         "       dli     $1, 0x9000000080000000                          \n"
  43         "       or      %0, $1                  # first line to flush   \n"
  44         "       or      %1, $1                  # last line to flush    \n"
  45         "       .set    at                                              \n"
  46         "                                                               \n"
  47         "1:     sw      $0, 0(%0)                                       \n"
  48         "       bne     %0, %1, 1b                                      \n"
  49         "        daddu  %0, 32                                          \n"
  50         "                                                               \n"
  51         "       mtc0    %2, $12                 # Back to 32 bit        \n"
  52         "       nop                             # pipeline hazard       \n"
  53         "       nop                                                     \n"
  54         "       nop                                                     \n"
  55         "       nop                                                     \n"
  56         "       .set    pop                                             \n"
  57         : "=r" (first), "=r" (last), "=&r" (tmp)
  58         : "0" (first), "1" (last));
  59 }
  60
  61 static void indy_sc_wback_invalidate(unsigned long addr, unsigned long size)
  62 {
  63         unsigned long first_line, last_line;
  64         unsigned long flags;
  65
  66 #ifdef DEBUG_CACHE
  67         printk("indy_sc_wback_invalidate[%08lx,%08lx]", addr, size);
  68 #endif
  69
  70         /* Catch bad driver code */
  71         BUG_ON(size == 0);
  72
  73         /* Which lines to flush?  */
  74         first_line = SC_INDEX(addr);
  75         last_line = SC_INDEX(addr + size - 1);
  76
  77         local_irq_save(flags);
  78         if (first_line <= last_line) {
  79                 indy_sc_wipe(first_line, last_line);
  80                 goto out;
  81         }
  82
  83         indy_sc_wipe(first_line, SC_SIZE - SC_LINE);
  84         indy_sc_wipe(0, last_line);
  85 out:
  86         local_irq_restore(flags);
  87 }
  88
  89 static void indy_sc_enable(void)
  90 {
  91         unsigned long addr, tmp1, tmp2;
  92
  93         /* This is really cool... */
  94 #ifdef DEBUG_CACHE
  95         printk("Enabling R4600 SCACHE\n");
  96 #endif
  97         __asm__ __volatile__(
  98         ".set\tpush\n\t"
  99         ".set\tnoreorder\n\t"
 100         ".set\tmips3\n\t"
 101         "mfc0\t%2, $12\n\t"
 102         "nop; nop; nop; nop;\n\t"
 103         "li\t%1, 0x80\n\t"
 104         "mtc0\t%1, $12\n\t"
 105         "nop; nop; nop; nop;\n\t"
 106         "li\t%0, 0x1\n\t"
 107         "dsll\t%0, 31\n\t"
 108         "lui\t%1, 0x9000\n\t"
 109         "dsll32\t%1, 0\n\t"
 110         "or\t%0, %1, %0\n\t"
 111         "sb\t$0, 0(%0)\n\t"
 112         "mtc0\t$0, $12\n\t"
 113         "nop; nop; nop; nop;\n\t"
 114         "mtc0\t%2, $12\n\t"
 115         "nop; nop; nop; nop;\n\t"
 116         ".set\tpop"
 117         : "=r" (tmp1), "=r" (tmp2), "=r" (addr));
 118 }
 119
 120 static void indy_sc_disable(void)
 121 {
 122         unsigned long tmp1, tmp2, tmp3;
 123
 124 #ifdef DEBUG_CACHE
 125         printk("Disabling R4600 SCACHE\n");
 126 #endif
 127         __asm__ __volatile__(
 128         ".set\tpush\n\t"
 129         ".set\tnoreorder\n\t"
 130         ".set\tmips3\n\t"
 131         "li\t%0, 0x1\n\t"
 132         "dsll\t%0, 31\n\t"
 133         "lui\t%1, 0x9000\n\t"
 134         "dsll32\t%1, 0\n\t"
 135         "or\t%0, %1, %0\n\t"
 136         "mfc0\t%2, $12\n\t"
 137         "nop; nop; nop; nop\n\t"
 138         "li\t%1, 0x80\n\t"
 139         "mtc0\t%1, $12\n\t"
 140         "nop; nop; nop; nop\n\t"
 141         "sh\t$0, 0(%0)\n\t"
 142         "mtc0\t$0, $12\n\t"
 143         "nop; nop; nop; nop\n\t"
 144         "mtc0\t%2, $12\n\t"
 145         "nop; nop; nop; nop\n\t"
 146         ".set\tpop"
 147         : "=r" (tmp1), "=r" (tmp2), "=r" (tmp3));
 148 }
 149
 150 static inline int __init indy_sc_probe(void)
 151 {
 152         unsigned int size = ip22_eeprom_read(&sgimc->eeprom, 17);
 153         if (size == 0)
 154                 return 0;
 155
 156         size <<= PAGE_SHIFT;
 157         printk(KERN_INFO "R4600/R5000 SCACHE size %dK, linesize 32 bytes.\n",
 158                size >> 10);
 159         scache_size = size;
 160
 161         return 1;
 162 }
 163
 164 /* XXX Check with wje if the Indy caches can differenciate between
 165    writeback + invalidate and just invalidate.  */
 166 static struct bcache_ops indy_sc_ops = {
 167         .bc_enable = indy_sc_enable,
 168         .bc_disable = indy_sc_disable,
 169         .bc_wback_inv = indy_sc_wback_invalidate,
 170         .bc_inv = indy_sc_wback_invalidate
 171 };
 172
 173 void indy_sc_init(void)
 174 {
 175         if (indy_sc_probe()) {
 176                 indy_sc_enable();
 177                 bcops = &indy_sc_ops;
 178         }
 179 }