arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_spi.h

   1 #ifndef BCM63XX_DEV_SPI_H
   2 #define BCM63XX_DEV_SPI_H
   3
   4 #include <linux/types.h>
   5 #include <bcm63xx_io.h>
   6 #include <bcm63xx_regs.h>
   7
   8 int __init bcm63xx_spi_register(void);
   9
  10 struct bcm63xx_spi_pdata {
  11         unsigned int    fifo_size;
  12         int             bus_num;
  13         int             num_chipselect;
  14         u32             speed_hz;
  15 };
  16
  17 enum bcm63xx_regs_spi {
  18         SPI_CMD,
  19         SPI_INT_STATUS,
  20         SPI_INT_MASK_ST,
  21         SPI_INT_MASK,
  22         SPI_ST,
  23         SPI_CLK_CFG,
  24         SPI_FILL_BYTE,
  25         SPI_MSG_TAIL,
  26         SPI_RX_TAIL,
  27         SPI_MSG_CTL,
  28         SPI_MSG_DATA,
  29         SPI_RX_DATA,
  30 };
  31
  32 #define __GEN_SPI_RSET_BASE(__cpu, __rset)                              \
  33         case SPI_## __rset:                                             \
  34                 return SPI_## __cpu ##_## __rset;
  35
  36 #define __GEN_SPI_RSET(__cpu)                                           \
  37         switch (reg) {                                                  \
  38         __GEN_SPI_RSET_BASE(__cpu, CMD)                                 \
  39         __GEN_SPI_RSET_BASE(__cpu, INT_STATUS)                          \
  40         __GEN_SPI_RSET_BASE(__cpu, INT_MASK_ST)                         \
  41         __GEN_SPI_RSET_BASE(__cpu, INT_MASK)                            \
  42         __GEN_SPI_RSET_BASE(__cpu, ST)                                  \
  43         __GEN_SPI_RSET_BASE(__cpu, CLK_CFG)                             \
  44         __GEN_SPI_RSET_BASE(__cpu, FILL_BYTE)                           \
  45         __GEN_SPI_RSET_BASE(__cpu, MSG_TAIL)                            \
  46         __GEN_SPI_RSET_BASE(__cpu, RX_TAIL)                             \
  47         __GEN_SPI_RSET_BASE(__cpu, MSG_CTL)                             \
  48         __GEN_SPI_RSET_BASE(__cpu, MSG_DATA)                            \
  49         __GEN_SPI_RSET_BASE(__cpu, RX_DATA)                             \
  50         }
  51
  52 #define __GEN_SPI_REGS_TABLE(__cpu)                                     \
  53         [SPI_CMD]               = SPI_## __cpu ##_CMD,                  \
  54         [SPI_INT_STATUS]        = SPI_## __cpu ##_INT_STATUS,           \
  55         [SPI_INT_MASK_ST]       = SPI_## __cpu ##_INT_MASK_ST,          \
  56         [SPI_INT_MASK]          = SPI_## __cpu ##_INT_MASK,             \
  57         [SPI_ST]                = SPI_## __cpu ##_ST,                   \
  58         [SPI_CLK_CFG]           = SPI_## __cpu ##_CLK_CFG,              \
  59         [SPI_FILL_BYTE]         = SPI_## __cpu ##_FILL_BYTE,            \
  60         [SPI_MSG_TAIL]          = SPI_## __cpu ##_MSG_TAIL,             \
  61         [SPI_RX_TAIL]           = SPI_## __cpu ##_RX_TAIL,              \
  62         [SPI_MSG_CTL]           = SPI_## __cpu ##_MSG_CTL,              \
  63         [SPI_MSG_DATA]          = SPI_## __cpu ##_MSG_DATA,             \
  64         [SPI_RX_DATA]           = SPI_## __cpu ##_RX_DATA,
  65
  66 static inline unsigned long bcm63xx_spireg(enum bcm63xx_regs_spi reg)
  67 {
  68 #ifdef BCMCPU_RUNTIME_DETECT
  69         extern const unsigned long *bcm63xx_regs_spi;
  70
  71         return bcm63xx_regs_spi[reg];
  72 #else
  73 #ifdef CONFIG_BCM63XX_CPU_6338
  74         __GEN_SPI_RSET(6338)
  75 #endif
  76 #ifdef CONFIG_BCM63XX_CPU_6348
  77         __GEN_SPI_RSET(6348)
  78 #endif
  79 #ifdef CONFIG_BCM63XX_CPU_6358
  80         __GEN_SPI_RSET(6358)
  81 #endif
  82 #ifdef CONFIG_BCM63XX_CPU_6368
  83         __GEN_SPI_RSET(6368)
  84 #endif
  85 #endif
  86         return 0;
  87 }
  88
  89 #endif /* BCM63XX_DEV_SPI_H */