2 * Copyright (C) 2002 MontaVista Software Inc.
3 * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
13 #include <linux/sched.h>
14 #include <linux/thread_info.h>
15 #include <linux/bitops.h>
17 #include <asm/mipsregs.h>
19 #include <asm/cpu-features.h>
20 #include <asm/fpu_emulator.h>
21 #include <asm/hazards.h>
22 #include <asm/processor.h>
23 #include <asm/current.h>
26 #ifdef CONFIG_MIPS_MT_FPAFF
27 #include <asm/mips_mt.h>
33 extern void _init_fpu(void);
34 extern void _save_fp(struct task_struct *);
35 extern void _restore_fp(struct task_struct *);
38 * This enum specifies a mode in which we want the FPU to operate, for cores
39 * which implement the Status.FR bit. Note that FPU_32BIT & FPU_64BIT
40 * purposefully have the values 0 & 1 respectively, so that an integer value
41 * of Status.FR can be trivially casted to the corresponding enum fpu_mode.
44 FPU_32BIT = 0, /* FR = 0 */
45 FPU_64BIT, /* FR = 1 */
49 static inline int __enable_fpu(enum fpu_mode mode)
55 /* just enable the FPU in its current mode */
56 set_c0_status(ST0_CU1);
61 #if !(defined(CONFIG_CPU_MIPS32_R2) || defined(CONFIG_64BIT))
62 /* we only have a 32-bit FPU */
67 /* set CU1 & change FR appropriately */
69 change_c0_status(ST0_CU1 | ST0_FR, ST0_CU1 | (fr ? ST0_FR : 0));
72 /* check FR has the desired value */
73 return (!!(read_c0_status() & ST0_FR) == !!fr) ? 0 : SIGFPE;
82 #define __disable_fpu() \
84 clear_c0_status(ST0_CU1); \
85 disable_fpu_hazard(); \
88 #define clear_fpu_owner() clear_thread_flag(TIF_USEDFPU)
90 static inline int __is_fpu_owner(void)
92 return test_thread_flag(TIF_USEDFPU);
95 static inline int is_fpu_owner(void)
97 return cpu_has_fpu && __is_fpu_owner();
100 static inline int __own_fpu(void)
105 mode = !test_thread_flag(TIF_32BIT_FPREGS);
106 ret = __enable_fpu(mode);
110 KSTK_STATUS(current) |= ST0_CU1;
111 if (mode == FPU_64BIT)
112 KSTK_STATUS(current) |= ST0_FR;
113 else /* mode == FPU_32BIT */
114 KSTK_STATUS(current) &= ~ST0_FR;
116 set_thread_flag(TIF_USEDFPU);
120 static inline int own_fpu_inatomic(int restore)
124 if (cpu_has_fpu && !__is_fpu_owner()) {
127 _restore_fp(current);
132 static inline int own_fpu(int restore)
137 ret = own_fpu_inatomic(restore);
142 static inline void lose_fpu(int save)
145 if (is_msa_enabled()) {
148 asm volatile("cfc1 %0, $31"
149 : "=r"(current->thread.fpu.fcr31));
152 clear_thread_flag(TIF_USEDMSA);
153 } else if (is_fpu_owner()) {
158 KSTK_STATUS(current) &= ~ST0_CU1;
159 clear_thread_flag(TIF_USEDFPU);
163 static inline int init_fpu(void)
172 fpu_emulator_init_fpu();
177 static inline void save_fp(struct task_struct *tsk)
183 static inline void restore_fp(struct task_struct *tsk)
189 static inline union fpureg *get_fpu_regs(struct task_struct *tsk)
191 if (tsk == current) {
198 return tsk->thread.fpu.fpr;
201 #endif /* _ASM_FPU_H */