2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 2003 Ralf Baechle
8 #ifndef _ASM_ASMMACRO_H
9 #define _ASM_ASMMACRO_H
11 #include <asm/hazards.h>
12 #include <asm/asm-offsets.h>
16 #include <asm/asmmacro-32.h>
19 #include <asm/asmmacro-64.h>
22 #if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6)
23 .macro local_irq_enable reg=t0
28 .macro local_irq_disable reg=t0
33 .macro local_irq_enable reg=t0
40 .macro local_irq_disable reg=t0
42 lw \reg, TI_PRE_COUNT($28)
44 sw \reg, TI_PRE_COUNT($28)
52 lw \reg, TI_PRE_COUNT($28)
54 sw \reg, TI_PRE_COUNT($28)
57 #endif /* CONFIG_CPU_MIPSR2 */
59 .macro fpu_save_16even thread tmp=t0
63 sdc1 $f0, THREAD_FPR0_LS64(\thread)
64 sdc1 $f2, THREAD_FPR2_LS64(\thread)
65 sdc1 $f4, THREAD_FPR4_LS64(\thread)
66 sdc1 $f6, THREAD_FPR6_LS64(\thread)
67 sdc1 $f8, THREAD_FPR8_LS64(\thread)
68 sdc1 $f10, THREAD_FPR10_LS64(\thread)
69 sdc1 $f12, THREAD_FPR12_LS64(\thread)
70 sdc1 $f14, THREAD_FPR14_LS64(\thread)
71 sdc1 $f16, THREAD_FPR16_LS64(\thread)
72 sdc1 $f18, THREAD_FPR18_LS64(\thread)
73 sdc1 $f20, THREAD_FPR20_LS64(\thread)
74 sdc1 $f22, THREAD_FPR22_LS64(\thread)
75 sdc1 $f24, THREAD_FPR24_LS64(\thread)
76 sdc1 $f26, THREAD_FPR26_LS64(\thread)
77 sdc1 $f28, THREAD_FPR28_LS64(\thread)
78 sdc1 $f30, THREAD_FPR30_LS64(\thread)
79 sw \tmp, THREAD_FCR31(\thread)
83 .macro fpu_save_16odd thread
87 sdc1 $f1, THREAD_FPR1_LS64(\thread)
88 sdc1 $f3, THREAD_FPR3_LS64(\thread)
89 sdc1 $f5, THREAD_FPR5_LS64(\thread)
90 sdc1 $f7, THREAD_FPR7_LS64(\thread)
91 sdc1 $f9, THREAD_FPR9_LS64(\thread)
92 sdc1 $f11, THREAD_FPR11_LS64(\thread)
93 sdc1 $f13, THREAD_FPR13_LS64(\thread)
94 sdc1 $f15, THREAD_FPR15_LS64(\thread)
95 sdc1 $f17, THREAD_FPR17_LS64(\thread)
96 sdc1 $f19, THREAD_FPR19_LS64(\thread)
97 sdc1 $f21, THREAD_FPR21_LS64(\thread)
98 sdc1 $f23, THREAD_FPR23_LS64(\thread)
99 sdc1 $f25, THREAD_FPR25_LS64(\thread)
100 sdc1 $f27, THREAD_FPR27_LS64(\thread)
101 sdc1 $f29, THREAD_FPR29_LS64(\thread)
102 sdc1 $f31, THREAD_FPR31_LS64(\thread)
106 .macro fpu_save_double thread status tmp
107 #if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2) || \
108 defined(CONFIG_CPU_MIPS32_R6)
111 fpu_save_16odd \thread
114 fpu_save_16even \thread \tmp
117 .macro fpu_restore_16even thread tmp=t0
120 lw \tmp, THREAD_FCR31(\thread)
121 ldc1 $f0, THREAD_FPR0_LS64(\thread)
122 ldc1 $f2, THREAD_FPR2_LS64(\thread)
123 ldc1 $f4, THREAD_FPR4_LS64(\thread)
124 ldc1 $f6, THREAD_FPR6_LS64(\thread)
125 ldc1 $f8, THREAD_FPR8_LS64(\thread)
126 ldc1 $f10, THREAD_FPR10_LS64(\thread)
127 ldc1 $f12, THREAD_FPR12_LS64(\thread)
128 ldc1 $f14, THREAD_FPR14_LS64(\thread)
129 ldc1 $f16, THREAD_FPR16_LS64(\thread)
130 ldc1 $f18, THREAD_FPR18_LS64(\thread)
131 ldc1 $f20, THREAD_FPR20_LS64(\thread)
132 ldc1 $f22, THREAD_FPR22_LS64(\thread)
133 ldc1 $f24, THREAD_FPR24_LS64(\thread)
134 ldc1 $f26, THREAD_FPR26_LS64(\thread)
135 ldc1 $f28, THREAD_FPR28_LS64(\thread)
136 ldc1 $f30, THREAD_FPR30_LS64(\thread)
140 .macro fpu_restore_16odd thread
144 ldc1 $f1, THREAD_FPR1_LS64(\thread)
145 ldc1 $f3, THREAD_FPR3_LS64(\thread)
146 ldc1 $f5, THREAD_FPR5_LS64(\thread)
147 ldc1 $f7, THREAD_FPR7_LS64(\thread)
148 ldc1 $f9, THREAD_FPR9_LS64(\thread)
149 ldc1 $f11, THREAD_FPR11_LS64(\thread)
150 ldc1 $f13, THREAD_FPR13_LS64(\thread)
151 ldc1 $f15, THREAD_FPR15_LS64(\thread)
152 ldc1 $f17, THREAD_FPR17_LS64(\thread)
153 ldc1 $f19, THREAD_FPR19_LS64(\thread)
154 ldc1 $f21, THREAD_FPR21_LS64(\thread)
155 ldc1 $f23, THREAD_FPR23_LS64(\thread)
156 ldc1 $f25, THREAD_FPR25_LS64(\thread)
157 ldc1 $f27, THREAD_FPR27_LS64(\thread)
158 ldc1 $f29, THREAD_FPR29_LS64(\thread)
159 ldc1 $f31, THREAD_FPR31_LS64(\thread)
163 .macro fpu_restore_double thread status tmp
164 #if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2) || \
165 defined(CONFIG_CPU_MIPS32_R6)
167 bgez \tmp, 10f # 16 register mode?
169 fpu_restore_16odd \thread
172 fpu_restore_16even \thread \tmp
175 #if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6)
176 .macro _EXT rd, rs, p, s
179 #else /* !CONFIG_CPU_MIPSR2 || !CONFIG_CPU_MIPSR6 */
180 .macro _EXT rd, rs, p, s
182 andi \rd, \rd, (1 << \s) - 1
184 #endif /* !CONFIG_CPU_MIPSR2 || !CONFIG_CPU_MIPSR6 */
187 * Temporary until all gas have MT ASE support
190 .word 0x41600bc1 | (\reg << 16)
194 .word 0x41600be1 | (\reg << 16)
198 .word 0x41600001 | (\reg << 16)
202 .word 0x41600021 | (\reg << 16)
205 .macro MFTR rt=0, rd=0, u=0, sel=0
206 .word 0x41000000 | (\rt << 16) | (\rd << 11) | (\u << 5) | (\sel)
209 .macro MTTR rt=0, rd=0, u=0, sel=0
210 .word 0x41800000 | (\rt << 16) | (\rd << 11) | (\u << 5) | (\sel)
213 #ifdef TOOLCHAIN_SUPPORTS_MSA
214 .macro ld_d wd, off, base
218 ld.d $w\wd, \off(\base)
222 .macro st_d wd, off, base
226 st.d $w\wd, \off(\base)
230 .macro copy_u_w rd, ws, n
234 copy_u.w \rd, $w\ws[\n]
238 .macro copy_u_d rd, ws, n
242 copy_u.d \rd, $w\ws[\n]
246 .macro insert_w wd, n, rs
250 insert.w $w\wd[\n], \rs
254 .macro insert_d wd, n, rs
258 insert.d $w\wd[\n], \rs
263 #ifdef CONFIG_CPU_MICROMIPS
264 #define CFC_MSA_INSN 0x587e0056
265 #define CTC_MSA_INSN 0x583e0816
266 #define LDD_MSA_INSN 0x58000837
267 #define STD_MSA_INSN 0x5800083f
268 #define COPY_UW_MSA_INSN 0x58f00056
269 #define COPY_UD_MSA_INSN 0x58f80056
270 #define INSERT_W_MSA_INSN 0x59300816
271 #define INSERT_D_MSA_INSN 0x59380816
273 #define CFC_MSA_INSN 0x787e0059
274 #define CTC_MSA_INSN 0x783e0819
275 #define LDD_MSA_INSN 0x78000823
276 #define STD_MSA_INSN 0x78000827
277 #define COPY_UW_MSA_INSN 0x78f00059
278 #define COPY_UD_MSA_INSN 0x78f80059
279 #define INSERT_W_MSA_INSN 0x79300819
280 #define INSERT_D_MSA_INSN 0x79380819
284 * Temporary until all toolchains in use include MSA support.
291 .word CFC_MSA_INSN | (\cs << 11)
301 .word CTC_MSA_INSN | (\cd << 6)
305 .macro ld_d wd, off, base
310 .word LDD_MSA_INSN | (\wd << 6)
314 .macro st_d wd, off, base
319 .word STD_MSA_INSN | (\wd << 6)
323 .macro copy_u_w rd, ws, n
328 .word COPY_UW_MSA_INSN | (\n << 16) | (\ws << 11)
329 /* move triggers an assembler bug... */
334 .macro copy_u_d rd, ws, n
339 .word COPY_UD_MSA_INSN | (\n << 16) | (\ws << 11)
340 /* move triggers an assembler bug... */
345 .macro insert_w wd, n, rs
349 /* move triggers an assembler bug... */
351 .word INSERT_W_MSA_INSN | (\n << 16) | (\wd << 6)
355 .macro insert_d wd, n, rs
359 /* move triggers an assembler bug... */
361 .word INSERT_D_MSA_INSN | (\n << 16) | (\wd << 6)
366 .macro msa_save_all thread
367 st_d 0, THREAD_FPR0, \thread
368 st_d 1, THREAD_FPR1, \thread
369 st_d 2, THREAD_FPR2, \thread
370 st_d 3, THREAD_FPR3, \thread
371 st_d 4, THREAD_FPR4, \thread
372 st_d 5, THREAD_FPR5, \thread
373 st_d 6, THREAD_FPR6, \thread
374 st_d 7, THREAD_FPR7, \thread
375 st_d 8, THREAD_FPR8, \thread
376 st_d 9, THREAD_FPR9, \thread
377 st_d 10, THREAD_FPR10, \thread
378 st_d 11, THREAD_FPR11, \thread
379 st_d 12, THREAD_FPR12, \thread
380 st_d 13, THREAD_FPR13, \thread
381 st_d 14, THREAD_FPR14, \thread
382 st_d 15, THREAD_FPR15, \thread
383 st_d 16, THREAD_FPR16, \thread
384 st_d 17, THREAD_FPR17, \thread
385 st_d 18, THREAD_FPR18, \thread
386 st_d 19, THREAD_FPR19, \thread
387 st_d 20, THREAD_FPR20, \thread
388 st_d 21, THREAD_FPR21, \thread
389 st_d 22, THREAD_FPR22, \thread
390 st_d 23, THREAD_FPR23, \thread
391 st_d 24, THREAD_FPR24, \thread
392 st_d 25, THREAD_FPR25, \thread
393 st_d 26, THREAD_FPR26, \thread
394 st_d 27, THREAD_FPR27, \thread
395 st_d 28, THREAD_FPR28, \thread
396 st_d 29, THREAD_FPR29, \thread
397 st_d 30, THREAD_FPR30, \thread
398 st_d 31, THREAD_FPR31, \thread
403 sw $1, THREAD_MSA_CSR(\thread)
407 .macro msa_restore_all thread
411 lw $1, THREAD_MSA_CSR(\thread)
414 ld_d 0, THREAD_FPR0, \thread
415 ld_d 1, THREAD_FPR1, \thread
416 ld_d 2, THREAD_FPR2, \thread
417 ld_d 3, THREAD_FPR3, \thread
418 ld_d 4, THREAD_FPR4, \thread
419 ld_d 5, THREAD_FPR5, \thread
420 ld_d 6, THREAD_FPR6, \thread
421 ld_d 7, THREAD_FPR7, \thread
422 ld_d 8, THREAD_FPR8, \thread
423 ld_d 9, THREAD_FPR9, \thread
424 ld_d 10, THREAD_FPR10, \thread
425 ld_d 11, THREAD_FPR11, \thread
426 ld_d 12, THREAD_FPR12, \thread
427 ld_d 13, THREAD_FPR13, \thread
428 ld_d 14, THREAD_FPR14, \thread
429 ld_d 15, THREAD_FPR15, \thread
430 ld_d 16, THREAD_FPR16, \thread
431 ld_d 17, THREAD_FPR17, \thread
432 ld_d 18, THREAD_FPR18, \thread
433 ld_d 19, THREAD_FPR19, \thread
434 ld_d 20, THREAD_FPR20, \thread
435 ld_d 21, THREAD_FPR21, \thread
436 ld_d 22, THREAD_FPR22, \thread
437 ld_d 23, THREAD_FPR23, \thread
438 ld_d 24, THREAD_FPR24, \thread
439 ld_d 25, THREAD_FPR25, \thread
440 ld_d 26, THREAD_FPR26, \thread
441 ld_d 27, THREAD_FPR27, \thread
442 ld_d 28, THREAD_FPR28, \thread
443 ld_d 29, THREAD_FPR29, \thread
444 ld_d 30, THREAD_FPR30, \thread
445 ld_d 31, THREAD_FPR31, \thread
448 .macro msa_init_upper wd
456 msa_init_upper (\wd+1)
460 .macro msa_init_all_upper
469 #endif /* _ASM_ASMMACRO_H */