1 #ifndef _ASM_METAG_IO_H
2 #define _ASM_METAG_IO_H
4 #include <linux/types.h>
5 #include <asm/pgtable-bits.h>
7 #define IO_SPACE_LIMIT 0
9 #define page_to_bus page_to_phys
10 #define bus_to_page phys_to_page
16 #define __raw_readb __raw_readb
17 static inline u8 __raw_readb(const volatile void __iomem *addr)
20 asm volatile("GETB %0,[%1]"
27 #define __raw_readw __raw_readw
28 static inline u16 __raw_readw(const volatile void __iomem *addr)
31 asm volatile("GETW %0,[%1]"
38 #define __raw_readl __raw_readl
39 static inline u32 __raw_readl(const volatile void __iomem *addr)
42 asm volatile("GETD %0,[%1]"
49 #define __raw_readq __raw_readq
50 static inline u64 __raw_readq(const volatile void __iomem *addr)
53 asm volatile("GETL %0,%t0,[%1]"
60 #define __raw_writeb __raw_writeb
61 static inline void __raw_writeb(u8 b, volatile void __iomem *addr)
63 asm volatile("SETB [%0],%1"
70 #define __raw_writew __raw_writew
71 static inline void __raw_writew(u16 b, volatile void __iomem *addr)
73 asm volatile("SETW [%0],%1"
80 #define __raw_writel __raw_writel
81 static inline void __raw_writel(u32 b, volatile void __iomem *addr)
83 asm volatile("SETD [%0],%1"
90 #define __raw_writeq __raw_writeq
91 static inline void __raw_writeq(u64 b, volatile void __iomem *addr)
93 asm volatile("SETL [%0],%1,%t1"
101 * The generic io.h can define all the other generic accessors
104 #include <asm-generic/io.h>
107 * Despite being a 32bit architecture, Meta can do 64bit memory accesses
108 * (assuming the bus supports it).
111 #define readq __raw_readq
112 #define writeq __raw_writeq
115 * Meta specific I/O for accessing non-MMU areas.
117 * These can be provided with a physical address rather than an __iomem pointer
118 * and should only be used by core architecture code for accessing fixed core
119 * registers. Generic drivers should use ioremap and the generic I/O accessors.
122 #define metag_in8(addr) __raw_readb((volatile void __iomem *)(addr))
123 #define metag_in16(addr) __raw_readw((volatile void __iomem *)(addr))
124 #define metag_in32(addr) __raw_readl((volatile void __iomem *)(addr))
125 #define metag_in64(addr) __raw_readq((volatile void __iomem *)(addr))
127 #define metag_out8(b, addr) __raw_writeb(b, (volatile void __iomem *)(addr))
128 #define metag_out16(b, addr) __raw_writew(b, (volatile void __iomem *)(addr))
129 #define metag_out32(b, addr) __raw_writel(b, (volatile void __iomem *)(addr))
130 #define metag_out64(b, addr) __raw_writeq(b, (volatile void __iomem *)(addr))
133 * io remapping functions
136 extern void __iomem *__ioremap(unsigned long offset,
137 size_t size, unsigned long flags);
138 extern void __iounmap(void __iomem *addr);
141 * ioremap - map bus memory into CPU space
142 * @offset: bus address of the memory
143 * @size: size of the resource to map
145 * ioremap performs a platform specific sequence of operations to
146 * make bus memory CPU accessible via the readb/readw/readl/writeb/
147 * writew/writel functions and the other mmio helpers. The returned
148 * address is not guaranteed to be usable directly as a virtual
151 #define ioremap(offset, size) \
152 __ioremap((offset), (size), 0)
154 #define ioremap_nocache(offset, size) \
155 __ioremap((offset), (size), 0)
157 #define ioremap_cached(offset, size) \
158 __ioremap((offset), (size), _PAGE_CACHEABLE)
160 #define ioremap_wc(offset, size) \
161 __ioremap((offset), (size), _PAGE_WR_COMBINE)
163 #define iounmap(addr) \
166 #endif /* _ASM_METAG_IO_H */