arch/m68k/q40/config.c

   1 /*
   2  *  arch/m68k/q40/config.c
   3  *
   4  *  Copyright (C) 1999 Richard Zidlicky
   5  *
   6  * originally based on:
   7  *
   8  *  linux/bvme/config.c
   9  *
  10  * This file is subject to the terms and conditions of the GNU General Public
  11  * License.  See the file README.legal in the main directory of this archive
  12  * for more details.
  13  */
  14
  15 #include <linux/types.h>
  16 #include <linux/kernel.h>
  17 #include <linux/mm.h>
  18 #include <linux/tty.h>
  19 #include <linux/console.h>
  20 #include <linux/linkage.h>
  21 #include <linux/init.h>
  22 #include <linux/major.h>
  23 #include <linux/serial_reg.h>
  24 #include <linux/rtc.h>
  25 #include <linux/vt_kern.h>
  26 #include <linux/bcd.h>
  27 #include <linux/platform_device.h>
  28
  29 #include <asm/io.h>
  30 #include <asm/rtc.h>
  31 #include <asm/bootinfo.h>
  32 #include <asm/system.h>
  33 #include <asm/pgtable.h>
  34 #include <asm/setup.h>
  35 #include <asm/irq.h>
  36 #include <asm/traps.h>
  37 #include <asm/machdep.h>
  38 #include <asm/q40_master.h>
  39
  40 extern void q40_init_IRQ(void);
  41 static void q40_get_model(char *model);
  42 extern void q40_sched_init(irq_handler_t handler);
  43
  44 static unsigned long q40_gettimeoffset(void);
  45 static int q40_hwclk(int, struct rtc_time *);
  46 static unsigned int q40_get_ss(void);
  47 static int q40_set_clock_mmss(unsigned long);
  48 static int q40_get_rtc_pll(struct rtc_pll_info *pll);
  49 static int q40_set_rtc_pll(struct rtc_pll_info *pll);
  50
  51 extern void q40_mksound(unsigned int /*freq*/, unsigned int /*ticks*/);
  52
  53 static void q40_mem_console_write(struct console *co, const char *b,
  54                                   unsigned int count);
  55
  56 extern int ql_ticks;
  57
  58 static struct console q40_console_driver = {
  59         .name   = "debug",
  60         .write  = q40_mem_console_write,
  61         .flags  = CON_PRINTBUFFER,
  62         .index  = -1,
  63 };
  64
  65
  66 /* early debugging function:*/
  67 extern char *q40_mem_cptr; /*=(char *)0xff020000;*/
  68 static int _cpleft;
  69
  70 static void q40_mem_console_write(struct console *co, const char *s,
  71                                   unsigned int count)
  72 {
  73         const char *p = s;
  74
  75         if (count < _cpleft) {
  76                 while (count-- > 0) {
  77                         *q40_mem_cptr = *p++;
  78                         q40_mem_cptr += 4;
  79                         _cpleft--;
  80                 }
  81         }
  82 }
  83
  84 static int __init q40_debug_setup(char *arg)
  85 {
  86         /* useful for early debugging stages - writes kernel messages into SRAM */
  87         if (MACH_IS_Q40 && !strncmp(arg, "mem", 3)) {
  88                 /*printk("using NVRAM debug, q40_mem_cptr=%p\n",q40_mem_cptr);*/
  89                 _cpleft = 2000 - ((long)q40_mem_cptr-0xff020000) / 4;
  90                 register_console(&q40_console_driver);
  91         }
  92         return 0;
  93 }
  94
  95 early_param("debug", q40_debug_setup);
  96
  97 #if 0
  98 void printq40(char *str)
  99 {
 100         int l = strlen(str);
 101         char *p = q40_mem_cptr;
 102
 103         while (l-- > 0 && _cpleft-- > 0) {
 104                 *p = *str++;
 105                 p += 4;
 106         }
 107         q40_mem_cptr = p;
 108 }
 109 #endif
 110
 111 static int halted;
 112
 113 #ifdef CONFIG_HEARTBEAT
 114 static void q40_heartbeat(int on)
 115 {
 116         if (halted)
 117                 return;
 118
 119         if (on)
 120                 Q40_LED_ON();
 121         else
 122                 Q40_LED_OFF();
 123 }
 124 #endif
 125
 126 static void q40_reset(void)
 127 {
 128         halted = 1;
 129         printk("\n\n*******************************************\n"
 130                 "Called q40_reset : press the RESET button!!\n"
 131                 "*******************************************\n");
 132         Q40_LED_ON();
 133         while (1)
 134                 ;
 135 }
 136
 137 static void q40_halt(void)
 138 {
 139         halted = 1;
 140         printk("\n\n*******************\n"
 141                    "  Called q40_halt\n"
 142                    "*******************\n");
 143         Q40_LED_ON();
 144         while (1)
 145                 ;
 146 }
 147
 148 static void q40_get_model(char *model)
 149 {
 150         sprintf(model, "Q40");
 151 }
 152
 153 static unsigned int serports[] =
 154 {
 155         0x3f8,0x2f8,0x3e8,0x2e8,0
 156 };
 157
 158 static void q40_disable_irqs(void)
 159 {
 160         unsigned i, j;
 161
 162         j = 0;
 163         while ((i = serports[j++]))
 164                 outb(0, i + UART_IER);
 165         master_outb(0, EXT_ENABLE_REG);
 166         master_outb(0, KEY_IRQ_ENABLE_REG);
 167 }
 168
 169 void __init config_q40(void)
 170 {
 171         mach_sched_init = q40_sched_init;
 172
 173         mach_init_IRQ = q40_init_IRQ;
 174         mach_gettimeoffset = q40_gettimeoffset;
 175         mach_hwclk = q40_hwclk;
 176         mach_get_ss = q40_get_ss;
 177         mach_get_rtc_pll = q40_get_rtc_pll;
 178         mach_set_rtc_pll = q40_set_rtc_pll;
 179         mach_set_clock_mmss = q40_set_clock_mmss;
 180
 181         mach_reset = q40_reset;
 182         mach_get_model = q40_get_model;
 183
 184 #if defined(CONFIG_INPUT_M68K_BEEP) || defined(CONFIG_INPUT_M68K_BEEP_MODULE)
 185         mach_beep = q40_mksound;
 186 #endif
 187 #ifdef CONFIG_HEARTBEAT
 188         mach_heartbeat = q40_heartbeat;
 189 #endif
 190         mach_halt = q40_halt;
 191
 192         /* disable a few things that SMSQ might have left enabled */
 193         q40_disable_irqs();
 194
 195         /* no DMA at all, but ide-scsi requires it.. make sure
 196          * all physical RAM fits into the boundary - otherwise
 197          * allocator may play costly and useless tricks */
 198         mach_max_dma_address = 1024*1024*1024;
 199 }
 200
 201
 202 int q40_parse_bootinfo(const struct bi_record *rec)
 203 {
 204         return 1;
 205 }
 206
 207
 208 static unsigned long q40_gettimeoffset(void)
 209 {
 210         return 5000 * (ql_ticks != 0);
 211 }
 212
 213
 214 /*
 215  * Looks like op is non-zero for setting the clock, and zero for
 216  * reading the clock.
 217  *
 218  *  struct hwclk_time {
 219  *         unsigned        sec;       0..59
 220  *         unsigned        min;       0..59
 221  *         unsigned        hour;      0..23
 222  *         unsigned        day;       1..31
 223  *         unsigned        mon;       0..11
 224  *         unsigned        year;      00...
 225  *         int             wday;      0..6, 0 is Sunday, -1 means unknown/don't set
 226  * };
 227  */
 228
 229 static int q40_hwclk(int op, struct rtc_time *t)
 230 {
 231         if (op) {
 232                 /* Write.... */
 233                 Q40_RTC_CTRL |= Q40_RTC_WRITE;
 234
 235                 Q40_RTC_SECS = bin2bcd(t->tm_sec);
 236                 Q40_RTC_MINS = bin2bcd(t->tm_min);
 237                 Q40_RTC_HOUR = bin2bcd(t->tm_hour);
 238                 Q40_RTC_DATE = bin2bcd(t->tm_mday);
 239                 Q40_RTC_MNTH = bin2bcd(t->tm_mon + 1);
 240                 Q40_RTC_YEAR = bin2bcd(t->tm_year%100);
 241                 if (t->tm_wday >= 0)
 242                         Q40_RTC_DOW = bin2bcd(t->tm_wday+1);
 243
 244                 Q40_RTC_CTRL &= ~(Q40_RTC_WRITE);
 245         } else {
 246                 /* Read....  */
 247                 Q40_RTC_CTRL |= Q40_RTC_READ;
 248
 249                 t->tm_year = bcd2bin (Q40_RTC_YEAR);
 250                 t->tm_mon  = bcd2bin (Q40_RTC_MNTH)-1;
 251                 t->tm_mday = bcd2bin (Q40_RTC_DATE);
 252                 t->tm_hour = bcd2bin (Q40_RTC_HOUR);
 253                 t->tm_min  = bcd2bin (Q40_RTC_MINS);
 254                 t->tm_sec  = bcd2bin (Q40_RTC_SECS);
 255
 256                 Q40_RTC_CTRL &= ~(Q40_RTC_READ);
 257
 258                 if (t->tm_year < 70)
 259                         t->tm_year += 100;
 260                 t->tm_wday = bcd2bin(Q40_RTC_DOW)-1;
 261         }
 262
 263         return 0;
 264 }
 265
 266 static unsigned int q40_get_ss(void)
 267 {
 268         return bcd2bin(Q40_RTC_SECS);
 269 }
 270
 271 /*
 272  * Set the minutes and seconds from seconds value 'nowtime'.  Fail if
 273  * clock is out by > 30 minutes.  Logic lifted from atari code.
 274  */
 275
 276 static int q40_set_clock_mmss(unsigned long nowtime)
 277 {
 278         int retval = 0;
 279         short real_seconds = nowtime % 60, real_minutes = (nowtime / 60) % 60;
 280
 281         int rtc_minutes;
 282
 283         rtc_minutes = bcd2bin(Q40_RTC_MINS);
 284
 285         if ((rtc_minutes < real_minutes ?
 286              real_minutes - rtc_minutes :
 287              rtc_minutes - real_minutes) < 30) {
 288                 Q40_RTC_CTRL |= Q40_RTC_WRITE;
 289                 Q40_RTC_MINS = bin2bcd(real_minutes);
 290                 Q40_RTC_SECS = bin2bcd(real_seconds);
 291                 Q40_RTC_CTRL &= ~(Q40_RTC_WRITE);
 292         } else
 293                 retval = -1;
 294
 295         return retval;
 296 }
 297
 298
 299 /* get and set PLL calibration of RTC clock */
 300 #define Q40_RTC_PLL_MASK ((1<<5)-1)
 301 #define Q40_RTC_PLL_SIGN (1<<5)
 302
 303 static int q40_get_rtc_pll(struct rtc_pll_info *pll)
 304 {
 305         int tmp = Q40_RTC_CTRL;
 306
 307         pll->pll_value = tmp & Q40_RTC_PLL_MASK;
 308         if (tmp & Q40_RTC_PLL_SIGN)
 309                 pll->pll_value = -pll->pll_value;
 310         pll->pll_max = 31;
 311         pll->pll_min = -31;
 312         pll->pll_posmult = 512;
 313         pll->pll_negmult = 256;
 314         pll->pll_clock = 125829120;
 315
 316         return 0;
 317 }
 318
 319 static int q40_set_rtc_pll(struct rtc_pll_info *pll)
 320 {
 321         if (!pll->pll_ctrl) {
 322                 /* the docs are a bit unclear so I am doublesetting */
 323                 /* RTC_WRITE here ... */
 324                 int tmp = (pll->pll_value & 31) | (pll->pll_value<0 ? 32 : 0) |
 325                           Q40_RTC_WRITE;
 326                 Q40_RTC_CTRL |= Q40_RTC_WRITE;
 327                 Q40_RTC_CTRL = tmp;
 328                 Q40_RTC_CTRL &= ~(Q40_RTC_WRITE);
 329                 return 0;
 330         } else
 331                 return -EINVAL;
 332 }
 333
 334 static __init int q40_add_kbd_device(void)
 335 {
 336         struct platform_device *pdev;
 337
 338         pdev = platform_device_register_simple("q40kbd", -1, NULL, 0);
 339         if (IS_ERR(pdev))
 340                 return PTR_ERR(pdev);
 341
 342         return 0;
 343 }
 344 arch_initcall(q40_add_kbd_device);