1 /***************************************************************************/
4 * linux/arch/m68knommu/platform/527x/config.c
6 * Sub-architcture dependent initialization code for the Freescale
9 * Copyright (C) 1999-2004, Greg Ungerer (gerg@snapgear.com)
10 * Copyright (C) 2001-2004, SnapGear Inc. (www.snapgear.com)
13 /***************************************************************************/
15 #include <linux/kernel.h>
16 #include <linux/param.h>
17 #include <linux/init.h>
19 #include <asm/machdep.h>
20 #include <asm/coldfire.h>
21 #include <asm/mcfsim.h>
22 #include <asm/mcfuart.h>
24 /***************************************************************************/
26 #if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
28 static void __init m527x_qspi_init(void)
30 #if defined(CONFIG_M5271)
33 /* setup QSPS pins for QSPI with gpio CS control */
34 writeb(0x1f, MCFGPIO_PAR_QSPI);
35 /* and CS2 & CS3 as gpio */
36 par = readw(MCFGPIO_PAR_TIMER);
38 writew(par, MCFGPIO_PAR_TIMER);
39 #elif defined(CONFIG_M5275)
40 /* setup QSPS pins for QSPI with gpio CS control */
41 writew(0x003e, MCFGPIO_PAR_QSPI);
45 #endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */
47 /***************************************************************************/
49 static void __init m527x_uarts_init(void)
54 * External Pin Mask Setting & Enable External Pin for Interface
56 sepmask = readw(MCF_IPSBAR + MCF_GPIO_PAR_UART);
57 sepmask |= UART0_ENABLE_MASK | UART1_ENABLE_MASK | UART2_ENABLE_MASK;
58 writew(sepmask, MCF_IPSBAR + MCF_GPIO_PAR_UART);
61 /***************************************************************************/
63 static void __init m527x_fec_init(void)
68 /* Set multi-function pins to ethernet mode for fec0 */
69 #if defined(CONFIG_M5271)
70 v = readb(MCF_IPSBAR + 0x100047);
71 writeb(v | 0xf0, MCF_IPSBAR + 0x100047);
73 par = readw(MCF_IPSBAR + 0x100082);
74 writew(par | 0xf00, MCF_IPSBAR + 0x100082);
75 v = readb(MCF_IPSBAR + 0x100078);
76 writeb(v | 0xc0, MCF_IPSBAR + 0x100078);
78 /* Set multi-function pins to ethernet mode for fec1 */
79 par = readw(MCF_IPSBAR + 0x100082);
80 writew(par | 0xa0, MCF_IPSBAR + 0x100082);
81 v = readb(MCF_IPSBAR + 0x100079);
82 writeb(v | 0xc0, MCF_IPSBAR + 0x100079);
86 /***************************************************************************/
88 void __init config_BSP(char *commandp, int size)
90 mach_sched_init = hw_timer_init;
93 #if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
98 /***************************************************************************/