9 config GENERIC_CMOS_UPDATE
13 config GENERIC_CLOCKEVENTS
20 The Freescale (was Motorola) 68000 CPU is the first generation of
21 the well known M68K family of processors. The CPU core as well as
22 being available as a stand alone CPU was also used in many
23 System-On-Chip devices (eg 68328, 68302, etc). It does not contain
29 The Freescale (was then Motorola) CPU32 is a CPU core that is
30 based on the 68020 processor. For the most part it is used in
31 System-On-Chip parts, and does not contain a paging MMU.
36 select ARCH_REQUIRE_GPIOLIB
38 The Freescale ColdFire family of processors is a modern derivitive
39 of the 68000 processor family. They are mainly targeted at embedded
40 applications, and are all System-On-Chip (SOC) devices, as opposed
41 to stand alone CPUs. They implement a subset of the original 68000
42 processor instruction set.
48 config HAVE_CACHE_SPLIT
68 Motorola 68328 processor support.
74 Motorola 68EX328 processor support.
80 Motorola 68VZ328 processor support.
86 Motorola 68360 processor support.
94 Motorola ColdFire 5206 processor support.
102 Motorola ColdFire 5206e processor support.
107 select GENERIC_CLOCKEVENTS
108 select HAVE_CACHE_SPLIT
110 Freescale Coldfire 5207/5208 processor support.
115 select GENERIC_CLOCKEVENTS
116 select HAVE_CACHE_SPLIT
119 Freescale Coldfire 5230/1/2/4/5 processor support
124 select COLDFIRE_SW_A7
127 Motorola ColdFire 5249 processor support.
132 select HAVE_CACHE_SPLIT
135 Freescale (Motorola) ColdFire 5270/5271 processor support.
140 select COLDFIRE_SW_A7
143 Motorola ColdFire 5272 processor support.
148 select HAVE_CACHE_SPLIT
151 Freescale (Motorola) ColdFire 5274/5275 processor support.
156 select GENERIC_CLOCKEVENTS
157 select HAVE_CACHE_SPLIT
160 Motorola ColdFire 5280/5282 processor support.
165 select COLDFIRE_SW_A7
169 Motorola ColdFire 5307 processor support.
176 Freescale (Motorola) ColdFire 532x processor support.
181 select COLDFIRE_SW_A7
185 Motorola ColdFire 5407 processor support.
193 Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
201 Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
207 depends on (M5271 || M5275)
208 select GENERIC_CLOCKEVENTS
213 depends on (M548x || M547x)
217 bool "Enable setting the CPU clock frequency"
220 On some CPU's you do not need to know what the core CPU clock
221 frequency is. On these you can disable clock setting. On some
222 traditional 68K parts, and on all ColdFire parts you need to set
223 the appropriate CPU clock frequency. On these devices many of the
224 onboard peripherals derive their timing from the master CPU clock
228 int "Set the core clock frequency"
232 Define the CPU clock frequency in use. This is the core clock
233 frequency, it may or may not be the same as the external clock
234 crystal fitted to your board. Some processors have an internal
235 PLL and can have their frequency programmed at run time, others
236 use internal dividers. In general the kernel won't setup a PLL
237 if it is fitted (there are some exceptions). This value will be
238 specific to the exact CPU that you are using.
241 bool "Old mask 5307 (1H55J) silicon"
244 Build support for the older revision ColdFire 5307 silicon.
245 Specifically this is the 1H55J mask revision.
249 prompt "Split Cache Configuration"
255 Use all of the ColdFire CPU cache memory as an instruction cache.
260 Use all of the ColdFire CPU cache memory as a data cache.
265 Split the ColdFire CPU cache, and use half as an instruction cache
266 and half as a data cache.
272 prompt "Data cache mode"
273 default CACHE_WRITETHRU
275 config CACHE_WRITETHRU
278 The ColdFire CPU cache is set into Write-through mode.
280 config CACHE_COPYBACK
283 The ColdFire CPU cache is set into Copy-back mode.
290 bool "Pilot 1000/5000, PalmPilot Personal/Pro, or PalmIII support"
293 Support for the Palm Pilot 1000/5000, Personal/Pro and PalmIII.
296 bool "(X)Copilot support"
299 Support the bugs of Xcopilot.
302 bool 'Arcturus Networks uC5272 dimm board support'
305 Support for the Arcturus Networks uC5272 dimm board.
308 bool "Arcturus Networks uC5282 board support"
311 Support for the Arcturus Networks uC5282 dimm board.
314 bool "uCsimm module support"
317 Support for the Arcturus Networks uCsimm module.
320 bool "uDsimm module support"
323 Support for the Arcturus Networks uDsimm module.
326 bool "DragenEngine II board support"
329 Support for the DragenEngine II board.
331 config DIRECT_IO_ACCESS
332 bool "Allow user to access IO directly"
333 depends on (UCSIMM || UCDIMM || DRAGEN2)
335 Disable the CPU internal registers protection in user mode,
336 to allow a user application to read/write them.
339 bool "Initialize LCD"
340 depends on (UCSIMM || UCDIMM || DRAGEN2)
342 Initialize the LCD controller of the 68x328 processor.
344 config MEMORY_RESERVE
345 int "Memory reservation (MiB)"
346 depends on (UCSIMM || UCDIMM)
348 Reserve certain memory regions on 68x328 based boards.
351 bool "Lineo uCquicc board support"
354 Support for the Lineo uCquicc board.
357 bool "Arnewsh 5206 board support"
360 Support for the Arnewsh 5206 board.
363 bool "Motorola M5206eC3 board support"
366 Support for the Motorola M5206eC3 board.
369 bool "Motorola M5206eLITE board support"
372 Support for the Motorola M5206eLITE board.
375 bool "Freescale M5208EVB board support"
378 Support for the Freescale Coldfire M5208EVB.
381 bool "Freescale M5235EVB support"
384 Support for the Freescale M5235EVB board.
387 bool "Motorola M5249C3 board support"
390 Support for the Motorola M5249C3 board.
393 bool "Freescale (Motorola) M5271EVB board support"
396 Support for the Freescale (Motorola) M5271EVB board.
399 bool "Freescale (Motorola) M5275EVB board support"
402 Support for the Freescale (Motorola) M5275EVB board.
405 bool "Motorola M5272C3 board support"
408 Support for the Motorola M5272C3 board.
411 bool "senTec COBRA5272 board support"
414 Support for the senTec COBRA5272 board.
417 bool "Avnet 5282 board support"
420 Support for the Avnet 5282 board.
423 bool "Motorola M5282EVB board support"
426 Support for the Motorola M5282EVB board.
429 bool "senTec COBRA5282 board support"
432 Support for the senTec COBRA5282 board.
435 bool "EMAC.Inc SOM5282EM board support"
438 Support for the EMAC.Inc SOM5282EM module.
441 bool "Intec Automation Inc. WildFire board support"
444 Support for the Intec Automation Inc. WildFire.
447 bool "Intec Automation Inc. WildFire module support"
450 Support for the Intec Automation Inc. WildFire module.
453 bool "Arnewsh 5307 board support"
456 Support for the Arnewsh 5307 board.
459 bool "Motorola M5307C3 board support"
462 Support for the Motorola M5307C3 board.
465 bool "SnapGear SecureEdge/MP3 platform support"
468 Support for the SnapGear SecureEdge/MP3 platform.
471 bool "Freescale (Motorola) M5329EVB board support"
474 Support for the Freescale (Motorola) M5329EVB board.
477 bool "senTec COBRA5329 board support"
480 Support for the senTec COBRA5329 board.
483 bool "Motorola M5407C3 board support"
486 Support for the Motorola M5407C3 board.
489 bool "FireBee board support"
492 Support for the FireBee ColdFire 5475 based board.
495 bool "Feith CLEOPATRA board support"
496 depends on (M5307 || M5407)
498 Support for the Feith Cleopatra boards.
501 bool "Feith CANCam board support"
504 Support for the Feith CANCam board.
507 bool "Feith SCALES board support"
510 Support for the Feith SCALES board.
513 bool "SecureEdge/NETtel board support"
514 depends on (M5206e || M5272 || M5307)
516 Support for the SnapGear NETtel/SecureEdge/SnapGear boards.
519 bool "SnapGear router board support"
522 Special additional support for SnapGear router boards.
525 bool "Sneha Technologies S.L. Sarasvati board support"
528 Support for the SNEHA CPU16B board.
531 bool "Netburner MOD-5272 board support"
534 Support for the Netburner MOD-5272 board.
537 bool "Savant Rosie1 board support"
540 Support for the Savant Rosie1 board.
542 config ROMFS_FROM_ROM
543 bool "ROMFS image not RAM resident"
544 depends on (NETtel || SNAPGEAR)
546 The ROMfs filesystem will stay resident in the FLASH/ROM, not be
552 depends on (PILOT3 || PILOT5)
557 depends on (ARN5206 || ARN5307)
562 depends on (M5206eC3 || M5208EVB || M5235EVB || M5249C3 || M5271EVB || M5272C3 || M5275EVB || M5282EVB || M5307C3 || M5329EVB || M5407C3)
567 depends on (CLEOPATRA || CANCam || SCALES)
572 depends on (COBRA5272 || COBRA5282)
577 depends on (SOM5282EM)
587 depends on SAVANTrosie1
592 depends on (AVNET5282)
595 bool "Support for U-Boot command line parameters"
597 If you say Y here kernel will try to collect command
598 line parameters from the initial u-boot stack.
602 bool "Use 4Kb for kernel stacks instead of 8Kb"
605 If you say Y here the kernel will use a 4Kb stacksize for the
606 kernel stack attached to each process/thread. This facilitates
607 running more threads on a system and also reduces the pressure
608 on the VM subsystem for higher order allocations.
610 comment "RAM configuration"
613 hex "Address of the base of RAM"
616 Define the address that RAM starts at. On many platforms this is
617 0, the base of the address space. And this is the default. Some
618 platforms choose to setup their RAM at other addresses within the
619 processor address space.
622 hex "Size of RAM (in bytes), or 0 for automatic"
625 Define the size of the system RAM. If you select 0 then the
626 kernel will try to probe the RAM size at runtime. This is not
627 supported on all CPU types.
630 hex "Address of the base of system vectors"
633 Define the address of the system vectors. Commonly this is
634 put at the start of RAM, but it doesn't have to be. On ColdFire
635 platforms this address is programmed into the VBR register, thus
636 actually setting the address to use.
639 hex "Address of the MBAR (internal peripherals)"
643 Define the address of the internal system peripherals. This value
644 is set in the processors MBAR register. This is generally setup by
645 the boot loader, and will not be written by the kernel. By far most
646 ColdFire boards use the default 0x10000000 value, so if unsure then
650 hex "Address of the IPSBAR (internal peripherals)"
652 depends on HAVE_IPSBAR
654 Define the address of the internal system peripherals. This value
655 is set in the processors IPSBAR register. This is generally setup by
656 the boot loader, and will not be written by the kernel. By far most
657 ColdFire boards use the default 0x40000000 value, so if unsure then
661 hex "Address of the base of kernel code"
664 Typically on m68k systems the kernel will not start at the base
665 of RAM, but usually some small offset from it. Define the start
666 address of the kernel here. The most common setup will have the
667 processor vectors at the base of RAM and then the start of the
668 kernel. On some platforms some RAM is reserved for boot loaders
669 and the kernel starts after that. The 0x400 default was based on
670 a system with the RAM based at address 0, and leaving enough room
671 for the theoretical maximum number of 256 vectors.
674 prompt "RAM bus width"
680 Select the physical RAM data bus size. Not needed on most platforms,
681 so you can generally choose AUTO.
686 Configure RAM bus to be 8 bits wide.
691 Configure RAM bus to be 16 bits wide.
696 Configure RAM bus to be 32 bits wide.
700 comment "ROM configuration"
703 bool "Specify ROM linker regions"
706 Define a ROM region for the linker script. This creates a kernel
707 that can be stored in flash, with possibly the text, and data
708 regions being copied out to RAM at startup.
711 hex "Address of the base of ROM device"
715 Define the address that the ROM region starts at. Some platforms
716 use this to set their chip select region accordingly for the boot
720 hex "Address of the base of the ROM vectors"
724 This is almost always the same as the base of the ROM. Since on all
725 68000 type variants the vectors are at the base of the boot device
729 hex "Size of ROM vector region (in bytes)"
733 Define the size of the vector region in ROM. For most 68000
734 variants this would be 0x400 bytes in size. Set to 0 if you do
735 not want a vector region at the start of the ROM.
738 hex "Address of the base of system image in ROM"
742 Define the start address of the system image in ROM. Commonly this
743 is strait after the ROM vectors.
746 hex "Size of the ROM device"
750 Size of the ROM device. On some platforms this is used to setup
751 the chip select that controls the boot ROM device.
754 prompt "Kernel executes from"
756 Choose the memory type that the kernel will be running in.
761 The kernel will be resident in RAM when running.
766 The kernel will be resident in FLASH/ROM when running. This is
767 often referred to as Execute-in-Place (XIP), since the kernel
768 code executes from the position it is stored in the FLASH/ROM.
773 source "kernel/Kconfig.preempt"
776 source "kernel/time/Kconfig"
783 source "drivers/pcmcia/Kconfig"