2 * SMP initialisation and IPI support
3 * Based on arch/arm/kernel/smp.c
5 * Copyright (C) 2012 ARM Ltd.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 #include <linux/delay.h>
21 #include <linux/init.h>
22 #include <linux/spinlock.h>
23 #include <linux/sched.h>
24 #include <linux/interrupt.h>
25 #include <linux/cache.h>
26 #include <linux/profile.h>
27 #include <linux/errno.h>
29 #include <linux/err.h>
30 #include <linux/cpu.h>
31 #include <linux/smp.h>
32 #include <linux/seq_file.h>
33 #include <linux/irq.h>
34 #include <linux/percpu.h>
35 #include <linux/clockchips.h>
36 #include <linux/completion.h>
39 #include <asm/atomic.h>
40 #include <asm/cacheflush.h>
41 #include <asm/cputype.h>
42 #include <asm/cpu_ops.h>
43 #include <asm/mmu_context.h>
44 #include <asm/pgtable.h>
45 #include <asm/pgalloc.h>
46 #include <asm/processor.h>
47 #include <asm/smp_plat.h>
48 #include <asm/sections.h>
49 #include <asm/tlbflush.h>
50 #include <asm/ptrace.h>
52 #define CREATE_TRACE_POINTS
53 #include <trace/events/arm-ipi.h>
56 * as from 2.5, kernels no longer have an init_tasks structure
57 * so we need some other way of telling a new secondary core
58 * where to place its SVC stack
60 struct secondary_data secondary_data;
71 * Boot a secondary CPU, and assign it the specified idle task.
72 * This also gives us the initial stack to use for this CPU.
74 static int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
76 if (cpu_ops[cpu]->cpu_boot)
77 return cpu_ops[cpu]->cpu_boot(cpu);
82 static DECLARE_COMPLETION(cpu_running);
84 int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *idle)
89 * We need to tell the secondary core where to find its stack and the
92 secondary_data.stack = task_stack_page(idle) + THREAD_START_SP;
93 __flush_dcache_area(&secondary_data, sizeof(secondary_data));
96 * Now bring the CPU into our world.
98 ret = boot_secondary(cpu, idle);
101 * CPU was successfully started, wait for it to come online or
104 wait_for_completion_timeout(&cpu_running,
105 msecs_to_jiffies(1000));
107 if (!cpu_online(cpu)) {
108 pr_crit("CPU%u: failed to come online\n", cpu);
112 pr_err("CPU%u: failed to boot: %d\n", cpu, ret);
115 secondary_data.stack = NULL;
120 static void __cpuinit smp_store_cpu_info(unsigned int cpuid)
122 store_cpu_topology(cpuid);
126 * This is the secondary CPU boot entry. We're using this CPUs
127 * idle thread stack, but a set of temporary page tables.
129 asmlinkage void __cpuinit secondary_start_kernel(void)
131 struct mm_struct *mm = &init_mm;
132 unsigned int cpu = smp_processor_id();
135 * All kernel threads share the same mm context; grab a
136 * reference and switch to it.
138 atomic_inc(&mm->mm_count);
139 current->active_mm = mm;
140 cpumask_set_cpu(cpu, mm_cpumask(mm));
142 set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
143 printk("CPU%u: Booted secondary processor\n", cpu);
146 * TTBR0 is only used for the identity mapping at this stage. Make it
147 * point to zero page to avoid speculatively fetching new entries.
149 cpu_set_reserved_ttbr0();
153 trace_hardirqs_off();
155 if (cpu_ops[cpu]->cpu_postboot)
156 cpu_ops[cpu]->cpu_postboot();
158 smp_store_cpu_info(cpu);
161 * Enable GIC and timers.
163 notify_cpu_starting(cpu);
166 * OK, now it's safe to let the boot CPU continue. Wait for
167 * the CPU migration code to notice that the CPU is online
168 * before we continue.
170 set_cpu_online(cpu, true);
171 complete(&cpu_running);
177 * OK, it's off to the idle thread for us
179 cpu_startup_entry(CPUHP_ONLINE);
182 #ifdef CONFIG_HOTPLUG_CPU
183 static int op_cpu_disable(unsigned int cpu)
186 * If we don't have a cpu_die method, abort before we reach the point
187 * of no return. CPU0 may not have an cpu_ops, so test for it.
189 if (!cpu_ops[cpu] || !cpu_ops[cpu]->cpu_die)
193 * We may need to abort a hot unplug for some other mechanism-specific
196 if (cpu_ops[cpu]->cpu_disable)
197 return cpu_ops[cpu]->cpu_disable(cpu);
203 * __cpu_disable runs on the processor to be shutdown.
205 int __cpu_disable(void)
207 unsigned int cpu = smp_processor_id();
210 ret = op_cpu_disable(cpu);
215 * Take this CPU offline. Once we clear this, we can't return,
216 * and we must not schedule until we're ready to give up the cpu.
218 set_cpu_online(cpu, false);
221 * OK - migrate IRQs away from this CPU
226 * Remove this CPU from the vm mask set of all processes.
228 clear_tasks_mm_cpumask(cpu);
233 static DECLARE_COMPLETION(cpu_died);
236 * called on the thread which is asking for a CPU to be shutdown -
237 * waits until shutdown has completed, or it is timed out.
239 void __cpu_die(unsigned int cpu)
241 if (!wait_for_completion_timeout(&cpu_died, msecs_to_jiffies(5000))) {
242 pr_crit("CPU%u: cpu didn't die\n", cpu);
245 pr_notice("CPU%u: shutdown\n", cpu);
249 * Called from the idle thread for the CPU which has been shutdown.
251 * Note that we disable IRQs here, but do not re-enable them
252 * before returning to the caller. This is also the behaviour
253 * of the other hotplug-cpu capable cores, so presumably coming
254 * out of idle fixes this.
258 unsigned int cpu = smp_processor_id();
264 /* Tell __cpu_die() that this CPU is now safe to dispose of */
268 * Actually shutdown the CPU. This must never fail. The specific hotplug
269 * mechanism must perform all required cache maintenance to ensure that
270 * no dirty lines are lost in the process of shutting down the CPU.
272 cpu_ops[cpu]->cpu_die(cpu);
278 void __init smp_cpus_done(unsigned int max_cpus)
280 unsigned long bogosum = loops_per_jiffy * num_online_cpus();
282 pr_info("SMP: Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
283 num_online_cpus(), bogosum / (500000/HZ),
284 (bogosum / (5000/HZ)) % 100);
287 void __init smp_prepare_boot_cpu(void)
289 set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
292 static void (*smp_cross_call)(const struct cpumask *, unsigned int);
295 * Enumerate the possible CPU set from the device tree and build the
296 * cpu logical map array containing MPIDR values related to logical
297 * cpus. Assumes that cpu_logical_map(0) has already been initialized.
299 void __init smp_init_cpus(void)
301 struct device_node *dn = NULL;
302 unsigned int i, cpu = 1;
303 bool bootcpu_valid = false;
305 while ((dn = of_find_node_by_type(dn, "cpu"))) {
310 * A cpu node with missing "reg" property is
311 * considered invalid to build a cpu_logical_map
314 cell = of_get_property(dn, "reg", NULL);
316 pr_err("%s: missing reg property\n", dn->full_name);
319 hwid = of_read_number(cell, of_n_addr_cells(dn));
322 * Non affinity bits must be set to 0 in the DT
324 if (hwid & ~MPIDR_HWID_BITMASK) {
325 pr_err("%s: invalid reg property\n", dn->full_name);
330 * Duplicate MPIDRs are a recipe for disaster. Scan
331 * all initialized entries and check for
332 * duplicates. If any is found just ignore the cpu.
333 * cpu_logical_map was initialized to INVALID_HWID to
334 * avoid matching valid MPIDR values.
336 for (i = 1; (i < cpu) && (i < NR_CPUS); i++) {
337 if (cpu_logical_map(i) == hwid) {
338 pr_err("%s: duplicate cpu reg properties in the DT\n",
345 * The numbering scheme requires that the boot CPU
346 * must be assigned logical id 0. Record it so that
347 * the logical map built from DT is validated and can
350 if (hwid == cpu_logical_map(0)) {
352 pr_err("%s: duplicate boot cpu reg property in DT\n",
357 bootcpu_valid = true;
360 * cpu_logical_map has already been
361 * initialized and the boot cpu doesn't need
362 * the enable-method so continue without
371 if (cpu_read_ops(dn, cpu) != 0)
374 if (cpu_ops[cpu]->cpu_init(dn, cpu))
377 pr_debug("cpu logical map 0x%llx\n", hwid);
378 cpu_logical_map(cpu) = hwid;
385 pr_warning("no. of cores (%d) greater than configured maximum of %d - clipping\n",
388 if (!bootcpu_valid) {
389 pr_err("DT missing boot CPU MPIDR, not enabling secondaries\n");
394 * All the cpus that made it to the cpu_logical_map have been
395 * validated so set them as possible cpus.
397 for (i = 0; i < NR_CPUS; i++)
398 if (cpu_logical_map(i) != INVALID_HWID)
399 set_cpu_possible(i, true);
402 void __init smp_prepare_cpus(unsigned int max_cpus)
405 unsigned int cpu, ncores = num_possible_cpus();
409 smp_store_cpu_info(smp_processor_id());
413 * are we trying to boot more cores than exist?
415 if (max_cpus > ncores)
418 /* Don't bother if we're effectively UP */
423 * Initialise the present map (which describes the set of CPUs
424 * actually populated at the present time) and release the
425 * secondaries from the bootloader.
427 * Make sure we online at most (max_cpus - 1) additional CPUs.
430 for_each_possible_cpu(cpu) {
434 if (cpu == smp_processor_id())
440 err = cpu_ops[cpu]->cpu_prepare(cpu);
444 set_cpu_present(cpu, true);
450 void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int))
455 void arch_send_call_function_ipi_mask(const struct cpumask *mask)
457 smp_cross_call(mask, IPI_CALL_FUNC);
460 void arch_send_call_function_single_ipi(int cpu)
462 smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC_SINGLE);
465 static const char *ipi_types[NR_IPI] = {
466 #define S(x,s) [x - IPI_RESCHEDULE] = s
467 S(IPI_RESCHEDULE, "Rescheduling interrupts"),
468 S(IPI_CALL_FUNC, "Function call interrupts"),
469 S(IPI_CALL_FUNC_SINGLE, "Single function call interrupts"),
470 S(IPI_CPU_STOP, "CPU stop interrupts"),
471 S(IPI_TIMER, "Timer broadcast interrupts"),
474 void show_ipi_list(struct seq_file *p, int prec)
478 for (i = 0; i < NR_IPI; i++) {
479 seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i + IPI_RESCHEDULE,
480 prec >= 4 ? " " : "");
481 for_each_present_cpu(cpu)
482 seq_printf(p, "%10u ",
483 __get_irq_stat(cpu, ipi_irqs[i]));
484 seq_printf(p, " %s\n", ipi_types[i]);
488 u64 smp_irq_stat_cpu(unsigned int cpu)
493 for (i = 0; i < NR_IPI; i++)
494 sum += __get_irq_stat(cpu, ipi_irqs[i]);
499 static DEFINE_RAW_SPINLOCK(stop_lock);
502 * ipi_cpu_stop - handle IPI from smp_send_stop()
504 static void ipi_cpu_stop(unsigned int cpu)
506 if (system_state == SYSTEM_BOOTING ||
507 system_state == SYSTEM_RUNNING) {
508 raw_spin_lock(&stop_lock);
509 pr_crit("CPU%u: stopping\n", cpu);
511 raw_spin_unlock(&stop_lock);
514 set_cpu_online(cpu, false);
524 * Main handler for inter-processor interrupts
526 void handle_IPI(int ipinr, struct pt_regs *regs)
528 unsigned int cpu = smp_processor_id();
529 struct pt_regs *old_regs = set_irq_regs(regs);
531 if (ipinr >= IPI_RESCHEDULE && ipinr < IPI_RESCHEDULE + NR_IPI)
532 __inc_irq_stat(cpu, ipi_irqs[ipinr - IPI_RESCHEDULE]);
541 generic_smp_call_function_interrupt();
545 case IPI_CALL_FUNC_SINGLE:
547 generic_smp_call_function_single_interrupt();
557 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
560 tick_receive_broadcast();
566 pr_crit("CPU%u: Unknown IPI message 0x%x\n", cpu, ipinr);
569 set_irq_regs(old_regs);
572 void smp_send_reschedule(int cpu)
574 smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
577 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
578 void tick_broadcast(const struct cpumask *mask)
580 smp_cross_call(mask, IPI_TIMER);
584 void smp_send_stop(void)
586 unsigned long timeout;
588 if (num_online_cpus() > 1) {
591 cpumask_copy(&mask, cpu_online_mask);
592 cpu_clear(smp_processor_id(), mask);
594 smp_cross_call(&mask, IPI_CPU_STOP);
597 /* Wait up to one second for other CPUs to stop */
598 timeout = USEC_PER_SEC;
599 while (num_online_cpus() > 1 && timeout--)
602 if (num_online_cpus() > 1)
603 pr_warning("SMP: failed to stop secondary CPUs\n");
609 int setup_profiling_timer(unsigned int multiplier)