arch/arm64/kernel/debug-monitors.c

   1 /*
   2  * ARMv8 single-step debug support and mdscr context switching.
   3  *
   4  * Copyright (C) 2012 ARM Limited
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  17  *
  18  * Author: Will Deacon <will.deacon@arm.com>
  19  */
  20
  21 #include <linux/cpu.h>
  22 #include <linux/debugfs.h>
  23 #include <linux/hardirq.h>
  24 #include <linux/init.h>
  25 #include <linux/ptrace.h>
  26 #include <linux/stat.h>
  27 #include <linux/uaccess.h>
  28
  29 #include <asm/debug-monitors.h>
  30 #include <asm/local.h>
  31 #include <asm/cputype.h>
  32 #include <asm/system_misc.h>
  33
  34 /* Low-level stepping controls. */
  35 #define DBG_MDSCR_SS            (1 << 0)
  36 #define DBG_SPSR_SS             (1 << 21)
  37
  38 /* MDSCR_EL1 enabling bits */
  39 #define DBG_MDSCR_KDE           (1 << 13)
  40 #define DBG_MDSCR_MDE           (1 << 15)
  41 #define DBG_MDSCR_MASK          ~(DBG_MDSCR_KDE | DBG_MDSCR_MDE)
  42
  43 /* Determine debug architecture. */
  44 u8 debug_monitors_arch(void)
  45 {
  46         return read_cpuid(ID_AA64DFR0_EL1) & 0xf;
  47 }
  48
  49 /*
  50  * MDSCR access routines.
  51  */
  52 static void mdscr_write(u32 mdscr)
  53 {
  54         unsigned long flags;
  55         local_dbg_save(flags);
  56         asm volatile("msr mdscr_el1, %0" :: "r" (mdscr));
  57         local_dbg_restore(flags);
  58 }
  59
  60 static u32 mdscr_read(void)
  61 {
  62         u32 mdscr;
  63         asm volatile("mrs %0, mdscr_el1" : "=r" (mdscr));
  64         return mdscr;
  65 }
  66
  67 /*
  68  * Allow root to disable self-hosted debug from userspace.
  69  * This is useful if you want to connect an external JTAG debugger.
  70  */
  71 static u32 debug_enabled = 1;
  72
  73 static int create_debug_debugfs_entry(void)
  74 {
  75         debugfs_create_bool("debug_enabled", 0644, NULL, &debug_enabled);
  76         return 0;
  77 }
  78 fs_initcall(create_debug_debugfs_entry);
  79
  80 static int __init early_debug_disable(char *buf)
  81 {
  82         debug_enabled = 0;
  83         return 0;
  84 }
  85
  86 early_param("nodebugmon", early_debug_disable);
  87
  88 /*
  89  * Keep track of debug users on each core.
  90  * The ref counts are per-cpu so we use a local_t type.
  91  */
  92 static DEFINE_PER_CPU(local_t, mde_ref_count);
  93 static DEFINE_PER_CPU(local_t, kde_ref_count);
  94
  95 void enable_debug_monitors(enum debug_el el)
  96 {
  97         u32 mdscr, enable = 0;
  98
  99         WARN_ON(preemptible());
 100
 101         if (local_inc_return(&__get_cpu_var(mde_ref_count)) == 1)
 102                 enable = DBG_MDSCR_MDE;
 103
 104         if (el == DBG_ACTIVE_EL1 &&
 105             local_inc_return(&__get_cpu_var(kde_ref_count)) == 1)
 106                 enable |= DBG_MDSCR_KDE;
 107
 108         if (enable && debug_enabled) {
 109                 mdscr = mdscr_read();
 110                 mdscr |= enable;
 111                 mdscr_write(mdscr);
 112         }
 113 }
 114
 115 void disable_debug_monitors(enum debug_el el)
 116 {
 117         u32 mdscr, disable = 0;
 118
 119         WARN_ON(preemptible());
 120
 121         if (local_dec_and_test(&__get_cpu_var(mde_ref_count)))
 122                 disable = ~DBG_MDSCR_MDE;
 123
 124         if (el == DBG_ACTIVE_EL1 &&
 125             local_dec_and_test(&__get_cpu_var(kde_ref_count)))
 126                 disable &= ~DBG_MDSCR_KDE;
 127
 128         if (disable) {
 129                 mdscr = mdscr_read();
 130                 mdscr &= disable;
 131                 mdscr_write(mdscr);
 132         }
 133 }
 134
 135 /*
 136  * OS lock clearing.
 137  */
 138 static void clear_os_lock(void *unused)
 139 {
 140         asm volatile("msr oslar_el1, %0" : : "r" (0));
 141         isb();
 142         local_dbg_enable();
 143 }
 144
 145 static int __cpuinit os_lock_notify(struct notifier_block *self,
 146                                     unsigned long action, void *data)
 147 {
 148         int cpu = (unsigned long)data;
 149         if (action == CPU_ONLINE)
 150                 smp_call_function_single(cpu, clear_os_lock, NULL, 1);
 151         return NOTIFY_OK;
 152 }
 153
 154 static struct notifier_block __cpuinitdata os_lock_nb = {
 155         .notifier_call = os_lock_notify,
 156 };
 157
 158 static int __cpuinit debug_monitors_init(void)
 159 {
 160         /* Clear the OS lock. */
 161         smp_call_function(clear_os_lock, NULL, 1);
 162         clear_os_lock(NULL);
 163
 164         /* Register hotplug handler. */
 165         register_cpu_notifier(&os_lock_nb);
 166         return 0;
 167 }
 168 postcore_initcall(debug_monitors_init);
 169
 170 /*
 171  * Single step API and exception handling.
 172  */
 173 static void set_regs_spsr_ss(struct pt_regs *regs)
 174 {
 175         unsigned long spsr;
 176
 177         spsr = regs->pstate;
 178         spsr &= ~DBG_SPSR_SS;
 179         spsr |= DBG_SPSR_SS;
 180         regs->pstate = spsr;
 181 }
 182
 183 static void clear_regs_spsr_ss(struct pt_regs *regs)
 184 {
 185         unsigned long spsr;
 186
 187         spsr = regs->pstate;
 188         spsr &= ~DBG_SPSR_SS;
 189         regs->pstate = spsr;
 190 }
 191
 192 /* EL1 Single Step Handler hooks */
 193 static LIST_HEAD(step_hook);
 194 DEFINE_RWLOCK(step_hook_lock);
 195
 196 void register_step_hook(struct step_hook *hook)
 197 {
 198         write_lock(&step_hook_lock);
 199         list_add(&hook->node, &step_hook);
 200         write_unlock(&step_hook_lock);
 201 }
 202
 203 void unregister_step_hook(struct step_hook *hook)
 204 {
 205         write_lock(&step_hook_lock);
 206         list_del(&hook->node);
 207         write_unlock(&step_hook_lock);
 208 }
 209
 210 /*
 211  * Call registered single step handers
 212  * There is no Syndrome info to check for determining the handler.
 213  * So we call all the registered handlers, until the right handler is
 214  * found which returns zero.
 215  */
 216 static int call_step_hook(struct pt_regs *regs, unsigned int esr)
 217 {
 218         struct step_hook *hook;
 219         int retval = DBG_HOOK_ERROR;
 220
 221         read_lock(&step_hook_lock);
 222
 223         list_for_each_entry(hook, &step_hook, node)     {
 224                 retval = hook->fn(regs, esr);
 225                 if (retval == DBG_HOOK_HANDLED)
 226                         break;
 227         }
 228
 229         read_unlock(&step_hook_lock);
 230
 231         return retval;
 232 }
 233
 234 static int single_step_handler(unsigned long addr, unsigned int esr,
 235                                struct pt_regs *regs)
 236 {
 237         siginfo_t info;
 238
 239         /*
 240          * If we are stepping a pending breakpoint, call the hw_breakpoint
 241          * handler first.
 242          */
 243         if (!reinstall_suspended_bps(regs))
 244                 return 0;
 245
 246         if (user_mode(regs)) {
 247                 info.si_signo = SIGTRAP;
 248                 info.si_errno = 0;
 249                 info.si_code  = TRAP_HWBKPT;
 250                 info.si_addr  = (void __user *)instruction_pointer(regs);
 251                 force_sig_info(SIGTRAP, &info, current);
 252
 253                 /*
 254                  * ptrace will disable single step unless explicitly
 255                  * asked to re-enable it. For other clients, it makes
 256                  * sense to leave it enabled (i.e. rewind the controls
 257                  * to the active-not-pending state).
 258                  */
 259                 user_rewind_single_step(current);
 260         } else {
 261                 if (call_step_hook(regs, esr) == DBG_HOOK_HANDLED)
 262                         return 0;
 263
 264                 pr_warning("Unexpected kernel single-step exception at EL1\n");
 265                 /*
 266                  * Re-enable stepping since we know that we will be
 267                  * returning to regs.
 268                  */
 269                 set_regs_spsr_ss(regs);
 270         }
 271
 272         return 0;
 273 }
 274
 275 /*
 276  * Breakpoint handler is re-entrant as another breakpoint can
 277  * hit within breakpoint handler, especically in kprobes.
 278  * Use reader/writer locks instead of plain spinlock.
 279  */
 280 static LIST_HEAD(break_hook);
 281 DEFINE_RWLOCK(break_hook_lock);
 282
 283 void register_break_hook(struct break_hook *hook)
 284 {
 285         write_lock(&break_hook_lock);
 286         list_add(&hook->node, &break_hook);
 287         write_unlock(&break_hook_lock);
 288 }
 289
 290 void unregister_break_hook(struct break_hook *hook)
 291 {
 292         write_lock(&break_hook_lock);
 293         list_del(&hook->node);
 294         write_unlock(&break_hook_lock);
 295 }
 296
 297 static int call_break_hook(struct pt_regs *regs, unsigned int esr)
 298 {
 299         struct break_hook *hook;
 300         int (*fn)(struct pt_regs *regs, unsigned int esr) = NULL;
 301
 302         read_lock(&break_hook_lock);
 303         list_for_each_entry(hook, &break_hook, node)
 304                 if ((esr & hook->esr_mask) == hook->esr_val)
 305                         fn = hook->fn;
 306         read_unlock(&break_hook_lock);
 307
 308         return fn ? fn(regs, esr) : DBG_HOOK_ERROR;
 309 }
 310
 311 static int brk_handler(unsigned long addr, unsigned int esr,
 312                        struct pt_regs *regs)
 313 {
 314         siginfo_t info;
 315
 316         if (call_break_hook(regs, esr) == DBG_HOOK_HANDLED)
 317                 return 0;
 318
 319         pr_warn("unexpected brk exception at %lx, esr=0x%x\n",
 320                         (long)instruction_pointer(regs), esr);
 321
 322         if (!user_mode(regs))
 323                 return -EFAULT;
 324
 325         info = (siginfo_t) {
 326                 .si_signo = SIGTRAP,
 327                 .si_errno = 0,
 328                 .si_code  = TRAP_BRKPT,
 329                 .si_addr  = (void __user *)instruction_pointer(regs),
 330         };
 331
 332         force_sig_info(SIGTRAP, &info, current);
 333         return 0;
 334 }
 335
 336 int aarch32_break_handler(struct pt_regs *regs)
 337 {
 338         siginfo_t info;
 339         unsigned int instr;
 340         bool bp = false;
 341         void __user *pc = (void __user *)instruction_pointer(regs);
 342
 343         if (!compat_user_mode(regs))
 344                 return -EFAULT;
 345
 346         if (compat_thumb_mode(regs)) {
 347                 /* get 16-bit Thumb instruction */
 348                 get_user(instr, (u16 __user *)pc);
 349                 if (instr == AARCH32_BREAK_THUMB2_LO) {
 350                         /* get second half of 32-bit Thumb-2 instruction */
 351                         get_user(instr, (u16 __user *)(pc + 2));
 352                         bp = instr == AARCH32_BREAK_THUMB2_HI;
 353                 } else {
 354                         bp = instr == AARCH32_BREAK_THUMB;
 355                 }
 356         } else {
 357                 /* 32-bit ARM instruction */
 358                 get_user(instr, (u32 __user *)pc);
 359                 bp = (instr & ~0xf0000000) == AARCH32_BREAK_ARM;
 360         }
 361
 362         if (!bp)
 363                 return -EFAULT;
 364
 365         info = (siginfo_t) {
 366                 .si_signo = SIGTRAP,
 367                 .si_errno = 0,
 368                 .si_code  = TRAP_BRKPT,
 369                 .si_addr  = pc,
 370         };
 371
 372         force_sig_info(SIGTRAP, &info, current);
 373         return 0;
 374 }
 375
 376 static int __init debug_traps_init(void)
 377 {
 378         hook_debug_fault_code(DBG_ESR_EVT_HWSS, single_step_handler, SIGTRAP,
 379                               TRAP_HWBKPT, "single-step handler");
 380         hook_debug_fault_code(DBG_ESR_EVT_BRK, brk_handler, SIGTRAP,
 381                               TRAP_BRKPT, "ptrace BRK handler");
 382         return 0;
 383 }
 384 arch_initcall(debug_traps_init);
 385
 386 /* Re-enable single step for syscall restarting. */
 387 void user_rewind_single_step(struct task_struct *task)
 388 {
 389         /*
 390          * If single step is active for this thread, then set SPSR.SS
 391          * to 1 to avoid returning to the active-pending state.
 392          */
 393         if (test_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP))
 394                 set_regs_spsr_ss(task_pt_regs(task));
 395 }
 396
 397 void user_fastforward_single_step(struct task_struct *task)
 398 {
 399         if (test_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP))
 400                 clear_regs_spsr_ss(task_pt_regs(task));
 401 }
 402
 403 /* Kernel API */
 404 void kernel_enable_single_step(struct pt_regs *regs)
 405 {
 406         WARN_ON(!irqs_disabled());
 407         set_regs_spsr_ss(regs);
 408         mdscr_write(mdscr_read() | DBG_MDSCR_SS);
 409         enable_debug_monitors(DBG_ACTIVE_EL1);
 410 }
 411
 412 void kernel_disable_single_step(void)
 413 {
 414         WARN_ON(!irqs_disabled());
 415         mdscr_write(mdscr_read() & ~DBG_MDSCR_SS);
 416         disable_debug_monitors(DBG_ACTIVE_EL1);
 417 }
 418
 419 int kernel_active_single_step(void)
 420 {
 421         WARN_ON(!irqs_disabled());
 422         return mdscr_read() & DBG_MDSCR_SS;
 423 }
 424
 425 /* ptrace API */
 426 void user_enable_single_step(struct task_struct *task)
 427 {
 428         set_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP);
 429         set_regs_spsr_ss(task_pt_regs(task));
 430 }
 431
 432 void user_disable_single_step(struct task_struct *task)
 433 {
 434         clear_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP);
 435 }