2 * Copyright (C) 2012 ARM Ltd.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
16 #ifndef __ASM_PGTABLE_H
17 #define __ASM_PGTABLE_H
20 #include <asm/proc-fns.h>
22 #include <asm/memory.h>
23 #include <asm/pgtable-hwdef.h>
26 * Software defined PTE bits definition.
28 #define PTE_VALID (_AT(pteval_t, 1) << 0)
29 #define PTE_WRITE (PTE_DBM) /* same as DBM (51) */
30 #define PTE_DIRTY (_AT(pteval_t, 1) << 55)
31 #define PTE_SPECIAL (_AT(pteval_t, 1) << 56)
32 #define PTE_PROT_NONE (_AT(pteval_t, 1) << 58) /* only when !PTE_VALID */
35 * VMALLOC and SPARSEMEM_VMEMMAP ranges.
37 * VMEMAP_SIZE: allows the whole linear region to be covered by a struct page array
38 * (rounded up to PUD_SIZE).
39 * VMALLOC_START: beginning of the kernel vmalloc space
40 * VMALLOC_END: extends to the available space below vmmemmap, PCI I/O space,
41 * fixed mappings and modules
43 #define VMEMMAP_SIZE ALIGN((1UL << (VA_BITS - PAGE_SHIFT)) * sizeof(struct page), PUD_SIZE)
45 #define VMALLOC_START (MODULES_END)
46 #define VMALLOC_END (PAGE_OFFSET - PUD_SIZE - VMEMMAP_SIZE - SZ_64K)
48 #define VMEMMAP_START (VMALLOC_END + SZ_64K)
49 #define vmemmap ((struct page *)VMEMMAP_START - \
50 SECTION_ALIGN_DOWN(memstart_addr >> PAGE_SHIFT))
52 #define FIRST_USER_ADDRESS 0UL
56 #include <asm/fixmap.h>
57 #include <linux/mmdebug.h>
59 extern void __pte_error(const char *file, int line, unsigned long val);
60 extern void __pmd_error(const char *file, int line, unsigned long val);
61 extern void __pud_error(const char *file, int line, unsigned long val);
62 extern void __pgd_error(const char *file, int line, unsigned long val);
64 #define PROT_DEFAULT (PTE_TYPE_PAGE | PTE_AF | PTE_SHARED)
65 #define PROT_SECT_DEFAULT (PMD_TYPE_SECT | PMD_SECT_AF | PMD_SECT_S)
67 #define PROT_DEVICE_nGnRnE (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_WRITE | PTE_ATTRINDX(MT_DEVICE_nGnRnE))
68 #define PROT_DEVICE_nGnRE (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_WRITE | PTE_ATTRINDX(MT_DEVICE_nGnRE))
69 #define PROT_NORMAL_NC (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL_NC))
70 #define PROT_NORMAL_WT (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL_WT))
71 #define PROT_NORMAL (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL))
73 #define PROT_SECT_DEVICE_nGnRE (PROT_SECT_DEFAULT | PMD_SECT_PXN | PMD_SECT_UXN | PMD_ATTRINDX(MT_DEVICE_nGnRE))
74 #define PROT_SECT_NORMAL (PROT_SECT_DEFAULT | PMD_SECT_PXN | PMD_SECT_UXN | PMD_ATTRINDX(MT_NORMAL))
75 #define PROT_SECT_NORMAL_EXEC (PROT_SECT_DEFAULT | PMD_SECT_UXN | PMD_ATTRINDX(MT_NORMAL))
77 #define _PAGE_DEFAULT (PROT_DEFAULT | PTE_ATTRINDX(MT_NORMAL))
79 #define PAGE_KERNEL __pgprot(_PAGE_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_WRITE)
80 #define PAGE_KERNEL_RO __pgprot(_PAGE_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_RDONLY)
81 #define PAGE_KERNEL_ROX __pgprot(_PAGE_DEFAULT | PTE_UXN | PTE_DIRTY | PTE_RDONLY)
82 #define PAGE_KERNEL_EXEC __pgprot(_PAGE_DEFAULT | PTE_UXN | PTE_DIRTY | PTE_WRITE)
83 #define PAGE_KERNEL_EXEC_CONT __pgprot(_PAGE_DEFAULT | PTE_UXN | PTE_DIRTY | PTE_WRITE | PTE_CONT)
85 #define PAGE_HYP __pgprot(_PAGE_DEFAULT | PTE_HYP)
86 #define PAGE_HYP_DEVICE __pgprot(PROT_DEVICE_nGnRE | PTE_HYP)
88 #define PAGE_S2 __pgprot(PROT_DEFAULT | PTE_S2_MEMATTR(MT_S2_NORMAL) | PTE_S2_RDONLY)
89 #define PAGE_S2_DEVICE __pgprot(PROT_DEFAULT | PTE_S2_MEMATTR(MT_S2_DEVICE_nGnRE) | PTE_S2_RDONLY | PTE_UXN)
91 #define PAGE_NONE __pgprot(((_PAGE_DEFAULT) & ~PTE_VALID) | PTE_PROT_NONE | PTE_PXN | PTE_UXN)
92 #define PAGE_SHARED __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN | PTE_WRITE)
93 #define PAGE_SHARED_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_WRITE)
94 #define PAGE_COPY __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN)
95 #define PAGE_COPY_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN)
96 #define PAGE_READONLY __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN)
97 #define PAGE_READONLY_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN)
99 #define __P000 PAGE_NONE
100 #define __P001 PAGE_READONLY
101 #define __P010 PAGE_COPY
102 #define __P011 PAGE_COPY
103 #define __P100 PAGE_READONLY_EXEC
104 #define __P101 PAGE_READONLY_EXEC
105 #define __P110 PAGE_COPY_EXEC
106 #define __P111 PAGE_COPY_EXEC
108 #define __S000 PAGE_NONE
109 #define __S001 PAGE_READONLY
110 #define __S010 PAGE_SHARED
111 #define __S011 PAGE_SHARED
112 #define __S100 PAGE_READONLY_EXEC
113 #define __S101 PAGE_READONLY_EXEC
114 #define __S110 PAGE_SHARED_EXEC
115 #define __S111 PAGE_SHARED_EXEC
118 * ZERO_PAGE is a global shared page that is always zero: used
119 * for zero-mapped memory areas etc..
121 extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
122 #define ZERO_PAGE(vaddr) virt_to_page(empty_zero_page)
124 #define pte_ERROR(pte) __pte_error(__FILE__, __LINE__, pte_val(pte))
126 #define pte_pfn(pte) ((pte_val(pte) & PHYS_MASK) >> PAGE_SHIFT)
128 #define pfn_pte(pfn,prot) (__pte(((phys_addr_t)(pfn) << PAGE_SHIFT) | pgprot_val(prot)))
130 #define pte_none(pte) (!pte_val(pte))
131 #define pte_clear(mm,addr,ptep) set_pte(ptep, __pte(0))
132 #define pte_page(pte) (pfn_to_page(pte_pfn(pte)))
135 * The following only work if pte_present(). Undefined behaviour otherwise.
137 #define pte_present(pte) (!!(pte_val(pte) & (PTE_VALID | PTE_PROT_NONE)))
138 #define pte_young(pte) (!!(pte_val(pte) & PTE_AF))
139 #define pte_special(pte) (!!(pte_val(pte) & PTE_SPECIAL))
140 #define pte_write(pte) (!!(pte_val(pte) & PTE_WRITE))
141 #define pte_exec(pte) (!(pte_val(pte) & PTE_UXN))
142 #define pte_cont(pte) (!!(pte_val(pte) & PTE_CONT))
143 #define pte_user(pte) (!!(pte_val(pte) & PTE_USER))
145 #ifdef CONFIG_ARM64_HW_AFDBM
146 #define pte_hw_dirty(pte) (pte_write(pte) && !(pte_val(pte) & PTE_RDONLY))
148 #define pte_hw_dirty(pte) (0)
150 #define pte_sw_dirty(pte) (!!(pte_val(pte) & PTE_DIRTY))
151 #define pte_dirty(pte) (pte_sw_dirty(pte) || pte_hw_dirty(pte))
153 #define pte_valid(pte) (!!(pte_val(pte) & PTE_VALID))
154 #define pte_valid_not_user(pte) \
155 ((pte_val(pte) & (PTE_VALID | PTE_USER)) == PTE_VALID)
156 #define pte_valid_young(pte) \
157 ((pte_val(pte) & (PTE_VALID | PTE_AF)) == (PTE_VALID | PTE_AF))
160 * Could the pte be present in the TLB? We must check mm_tlb_flush_pending
161 * so that we don't erroneously return false for pages that have been
162 * remapped as PROT_NONE but are yet to be flushed from the TLB.
164 #define pte_accessible(mm, pte) \
165 (mm_tlb_flush_pending(mm) ? pte_present(pte) : pte_valid_young(pte))
167 static inline pte_t clear_pte_bit(pte_t pte, pgprot_t prot)
169 pte_val(pte) &= ~pgprot_val(prot);
173 static inline pte_t set_pte_bit(pte_t pte, pgprot_t prot)
175 pte_val(pte) |= pgprot_val(prot);
179 static inline pte_t pte_wrprotect(pte_t pte)
181 return clear_pte_bit(pte, __pgprot(PTE_WRITE));
184 static inline pte_t pte_mkwrite(pte_t pte)
186 return set_pte_bit(pte, __pgprot(PTE_WRITE));
189 static inline pte_t pte_mkclean(pte_t pte)
191 return clear_pte_bit(pte, __pgprot(PTE_DIRTY));
194 static inline pte_t pte_mkdirty(pte_t pte)
196 return set_pte_bit(pte, __pgprot(PTE_DIRTY));
199 static inline pte_t pte_mkold(pte_t pte)
201 return clear_pte_bit(pte, __pgprot(PTE_AF));
204 static inline pte_t pte_mkyoung(pte_t pte)
206 return set_pte_bit(pte, __pgprot(PTE_AF));
209 static inline pte_t pte_mkspecial(pte_t pte)
211 return set_pte_bit(pte, __pgprot(PTE_SPECIAL));
214 static inline pte_t pte_mkcont(pte_t pte)
216 pte = set_pte_bit(pte, __pgprot(PTE_CONT));
217 return set_pte_bit(pte, __pgprot(PTE_TYPE_PAGE));
220 static inline pte_t pte_mknoncont(pte_t pte)
222 return clear_pte_bit(pte, __pgprot(PTE_CONT));
225 static inline pmd_t pmd_mkcont(pmd_t pmd)
227 return __pmd(pmd_val(pmd) | PMD_SECT_CONT);
230 static inline void set_pte(pte_t *ptep, pte_t pte)
235 * Only if the new pte is valid and kernel, otherwise TLB maintenance
236 * or update_mmu_cache() have the necessary barriers.
238 if (pte_valid_not_user(pte)) {
245 struct vm_area_struct;
247 extern void __sync_icache_dcache(pte_t pteval, unsigned long addr);
250 * PTE bits configuration in the presence of hardware Dirty Bit Management
251 * (PTE_WRITE == PTE_DBM):
253 * Dirty Writable | PTE_RDONLY PTE_WRITE PTE_DIRTY (sw)
259 * When hardware DBM is not present, the sofware PTE_DIRTY bit is updated via
260 * the page fault mechanism. Checking the dirty status of a pte becomes:
262 * PTE_DIRTY || (PTE_WRITE && !PTE_RDONLY)
264 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
265 pte_t *ptep, pte_t pte)
267 if (pte_present(pte)) {
268 if (pte_sw_dirty(pte) && pte_write(pte))
269 pte_val(pte) &= ~PTE_RDONLY;
271 pte_val(pte) |= PTE_RDONLY;
272 if (pte_user(pte) && pte_exec(pte) && !pte_special(pte))
273 __sync_icache_dcache(pte, addr);
277 * If the existing pte is valid, check for potential race with
278 * hardware updates of the pte (ptep_set_access_flags safely changes
279 * valid ptes without going through an invalid entry).
281 if (IS_ENABLED(CONFIG_ARM64_HW_AFDBM) &&
282 pte_valid(*ptep) && pte_valid(pte)) {
283 VM_WARN_ONCE(!pte_young(pte),
284 "%s: racy access flag clearing: 0x%016llx -> 0x%016llx",
285 __func__, pte_val(*ptep), pte_val(pte));
286 VM_WARN_ONCE(pte_write(*ptep) && !pte_dirty(pte),
287 "%s: racy dirty state clearing: 0x%016llx -> 0x%016llx",
288 __func__, pte_val(*ptep), pte_val(pte));
295 * Huge pte definitions.
297 #define pte_huge(pte) (!(pte_val(pte) & PTE_TABLE_BIT))
298 #define pte_mkhuge(pte) (__pte(pte_val(pte) & ~PTE_TABLE_BIT))
301 * Hugetlb definitions.
303 #define HUGE_MAX_HSTATE 4
304 #define HPAGE_SHIFT PMD_SHIFT
305 #define HPAGE_SIZE (_AC(1, UL) << HPAGE_SHIFT)
306 #define HPAGE_MASK (~(HPAGE_SIZE - 1))
307 #define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
309 #define __HAVE_ARCH_PTE_SPECIAL
311 static inline pte_t pud_pte(pud_t pud)
313 return __pte(pud_val(pud));
316 static inline pmd_t pud_pmd(pud_t pud)
318 return __pmd(pud_val(pud));
321 static inline pte_t pmd_pte(pmd_t pmd)
323 return __pte(pmd_val(pmd));
326 static inline pmd_t pte_pmd(pte_t pte)
328 return __pmd(pte_val(pte));
331 static inline pgprot_t mk_sect_prot(pgprot_t prot)
333 return __pgprot(pgprot_val(prot) & ~PTE_TABLE_BIT);
340 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
341 #define pmd_trans_huge(pmd) (pmd_val(pmd) && !(pmd_val(pmd) & PMD_TABLE_BIT))
342 #define pmd_trans_splitting(pmd) pte_special(pmd_pte(pmd))
343 #ifdef CONFIG_HAVE_RCU_TABLE_FREE
344 #define __HAVE_ARCH_PMDP_SPLITTING_FLUSH
345 struct vm_area_struct;
346 void pmdp_splitting_flush(struct vm_area_struct *vma, unsigned long address,
348 #endif /* CONFIG_HAVE_RCU_TABLE_FREE */
349 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
351 #define pmd_present(pmd) pte_present(pmd_pte(pmd))
352 #define pmd_dirty(pmd) pte_dirty(pmd_pte(pmd))
353 #define pmd_young(pmd) pte_young(pmd_pte(pmd))
354 #define pmd_wrprotect(pmd) pte_pmd(pte_wrprotect(pmd_pte(pmd)))
355 #define pmd_mksplitting(pmd) pte_pmd(pte_mkspecial(pmd_pte(pmd)))
356 #define pmd_mkold(pmd) pte_pmd(pte_mkold(pmd_pte(pmd)))
357 #define pmd_mkwrite(pmd) pte_pmd(pte_mkwrite(pmd_pte(pmd)))
358 #define pmd_mkclean(pmd) pte_pmd(pte_mkclean(pmd_pte(pmd)))
359 #define pmd_mkdirty(pmd) pte_pmd(pte_mkdirty(pmd_pte(pmd)))
360 #define pmd_mkyoung(pmd) pte_pmd(pte_mkyoung(pmd_pte(pmd)))
361 #define pmd_mknotpresent(pmd) (__pmd(pmd_val(pmd) & ~PMD_SECT_VALID))
363 #define __HAVE_ARCH_PMD_WRITE
364 #define pmd_write(pmd) pte_write(pmd_pte(pmd))
366 #define pmd_mkhuge(pmd) (__pmd(pmd_val(pmd) & ~PMD_TABLE_BIT))
368 #define pmd_pfn(pmd) (((pmd_val(pmd) & PMD_MASK) & PHYS_MASK) >> PAGE_SHIFT)
369 #define pfn_pmd(pfn,prot) (__pmd(((phys_addr_t)(pfn) << PAGE_SHIFT) | pgprot_val(prot)))
370 #define mk_pmd(page,prot) pfn_pmd(page_to_pfn(page),prot)
372 #define pud_write(pud) pte_write(pud_pte(pud))
373 #define pud_pfn(pud) (((pud_val(pud) & PUD_MASK) & PHYS_MASK) >> PAGE_SHIFT)
375 #define set_pmd_at(mm, addr, pmdp, pmd) set_pte_at(mm, addr, (pte_t *)pmdp, pmd_pte(pmd))
377 static inline int has_transparent_hugepage(void)
382 #define __pgprot_modify(prot,mask,bits) \
383 __pgprot((pgprot_val(prot) & ~(mask)) | (bits))
386 * Mark the prot value as uncacheable and unbufferable.
388 #define pgprot_noncached(prot) \
389 __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_nGnRnE) | PTE_PXN | PTE_UXN)
390 #define pgprot_writecombine(prot) \
391 __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_NORMAL_NC) | PTE_PXN | PTE_UXN)
392 #define pgprot_device(prot) \
393 __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_nGnRE) | PTE_PXN | PTE_UXN)
394 #define __HAVE_PHYS_MEM_ACCESS_PROT
396 extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
397 unsigned long size, pgprot_t vma_prot);
399 #define pmd_none(pmd) (!pmd_val(pmd))
401 #define pmd_bad(pmd) (!(pmd_val(pmd) & 2))
403 #define pmd_table(pmd) ((pmd_val(pmd) & PMD_TYPE_MASK) == \
405 #define pmd_sect(pmd) ((pmd_val(pmd) & PMD_TYPE_MASK) == \
408 #ifdef CONFIG_ARM64_64K_PAGES
409 #define pud_sect(pud) (0)
410 #define pud_table(pud) (1)
412 #define pud_sect(pud) ((pud_val(pud) & PUD_TYPE_MASK) == \
414 #define pud_table(pud) ((pud_val(pud) & PUD_TYPE_MASK) == \
418 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
425 static inline void pmd_clear(pmd_t *pmdp)
427 set_pmd(pmdp, __pmd(0));
430 static inline phys_addr_t pmd_page_paddr(pmd_t pmd)
432 return pmd_val(pmd) & PHYS_MASK & (s32)PAGE_MASK;
435 /* Find an entry in the third-level page table. */
436 #define pte_index(addr) (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
438 #define pte_offset_phys(dir,addr) (pmd_page_paddr(*(dir)) + pte_index(addr) * sizeof(pte_t))
439 #define pte_offset_kernel(dir,addr) ((pte_t *)__va(pte_offset_phys((dir), (addr))))
441 #define pte_offset_map(dir,addr) pte_offset_kernel((dir), (addr))
442 #define pte_offset_map_nested(dir,addr) pte_offset_kernel((dir), (addr))
443 #define pte_unmap(pte) do { } while (0)
444 #define pte_unmap_nested(pte) do { } while (0)
446 #define pte_set_fixmap(addr) ((pte_t *)set_fixmap_offset(FIX_PTE, addr))
447 #define pte_set_fixmap_offset(pmd, addr) pte_set_fixmap(pte_offset_phys(pmd, addr))
448 #define pte_clear_fixmap() clear_fixmap(FIX_PTE)
450 #define pmd_page(pmd) pfn_to_page(__phys_to_pfn(pmd_val(pmd) & PHYS_MASK))
452 /* use ONLY for statically allocated translation tables */
453 #define pte_offset_kimg(dir,addr) ((pte_t *)__phys_to_kimg(pte_offset_phys((dir), (addr))))
456 * Conversion functions: convert a page and protection to a page entry,
457 * and a page entry and page directory to the page they refer to.
459 #define mk_pte(page,prot) pfn_pte(page_to_pfn(page),prot)
461 #if CONFIG_PGTABLE_LEVELS > 2
463 #define pmd_ERROR(pmd) __pmd_error(__FILE__, __LINE__, pmd_val(pmd))
465 #define pud_none(pud) (!pud_val(pud))
466 #define pud_bad(pud) (!(pud_val(pud) & 2))
467 #define pud_present(pud) (pud_val(pud))
469 static inline void set_pud(pud_t *pudp, pud_t pud)
476 static inline void pud_clear(pud_t *pudp)
478 set_pud(pudp, __pud(0));
481 static inline phys_addr_t pud_page_paddr(pud_t pud)
483 return pud_val(pud) & PHYS_MASK & (s32)PAGE_MASK;
486 /* Find an entry in the second-level page table. */
487 #define pmd_index(addr) (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
489 #define pmd_offset_phys(dir, addr) (pud_page_paddr(*(dir)) + pmd_index(addr) * sizeof(pmd_t))
490 #define pmd_offset(dir, addr) ((pmd_t *)__va(pmd_offset_phys((dir), (addr))))
492 #define pmd_set_fixmap(addr) ((pmd_t *)set_fixmap_offset(FIX_PMD, addr))
493 #define pmd_set_fixmap_offset(pud, addr) pmd_set_fixmap(pmd_offset_phys(pud, addr))
494 #define pmd_clear_fixmap() clear_fixmap(FIX_PMD)
496 #define pud_page(pud) pfn_to_page(__phys_to_pfn(pud_val(pud) & PHYS_MASK))
498 /* use ONLY for statically allocated translation tables */
499 #define pmd_offset_kimg(dir,addr) ((pmd_t *)__phys_to_kimg(pmd_offset_phys((dir), (addr))))
503 #define pud_page_paddr(pud) ({ BUILD_BUG(); 0; })
505 /* Match pmd_offset folding in <asm/generic/pgtable-nopmd.h> */
506 #define pmd_set_fixmap(addr) NULL
507 #define pmd_set_fixmap_offset(pudp, addr) ((pmd_t *)pudp)
508 #define pmd_clear_fixmap()
510 #define pmd_offset_kimg(dir,addr) ((pmd_t *)dir)
512 #endif /* CONFIG_PGTABLE_LEVELS > 2 */
514 #if CONFIG_PGTABLE_LEVELS > 3
516 #define pud_ERROR(pud) __pud_error(__FILE__, __LINE__, pud_val(pud))
518 #define pgd_none(pgd) (!pgd_val(pgd))
519 #define pgd_bad(pgd) (!(pgd_val(pgd) & 2))
520 #define pgd_present(pgd) (pgd_val(pgd))
522 static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
528 static inline void pgd_clear(pgd_t *pgdp)
530 set_pgd(pgdp, __pgd(0));
533 static inline phys_addr_t pgd_page_paddr(pgd_t pgd)
535 return pgd_val(pgd) & PHYS_MASK & (s32)PAGE_MASK;
538 /* Find an entry in the frst-level page table. */
539 #define pud_index(addr) (((addr) >> PUD_SHIFT) & (PTRS_PER_PUD - 1))
541 #define pud_offset_phys(dir, addr) (pgd_page_paddr(*(dir)) + pud_index(addr) * sizeof(pud_t))
542 #define pud_offset(dir, addr) ((pud_t *)__va(pud_offset_phys((dir), (addr))))
544 #define pud_set_fixmap(addr) ((pud_t *)set_fixmap_offset(FIX_PUD, addr))
545 #define pud_set_fixmap_offset(pgd, addr) pud_set_fixmap(pud_offset_phys(pgd, addr))
546 #define pud_clear_fixmap() clear_fixmap(FIX_PUD)
548 #define pgd_page(pgd) pfn_to_page(__phys_to_pfn(pgd_val(pgd) & PHYS_MASK))
550 /* use ONLY for statically allocated translation tables */
551 #define pud_offset_kimg(dir,addr) ((pud_t *)__phys_to_kimg(pud_offset_phys((dir), (addr))))
555 #define pgd_page_paddr(pgd) ({ BUILD_BUG(); 0;})
557 /* Match pud_offset folding in <asm/generic/pgtable-nopud.h> */
558 #define pud_set_fixmap(addr) NULL
559 #define pud_set_fixmap_offset(pgdp, addr) ((pud_t *)pgdp)
560 #define pud_clear_fixmap()
562 #define pud_offset_kimg(dir,addr) ((pud_t *)dir)
564 #endif /* CONFIG_PGTABLE_LEVELS > 3 */
566 #define pgd_ERROR(pgd) __pgd_error(__FILE__, __LINE__, pgd_val(pgd))
568 /* to find an entry in a page-table-directory */
569 #define pgd_index(addr) (((addr) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
571 #define pgd_offset_raw(pgd, addr) ((pgd) + pgd_index(addr))
573 #define pgd_offset(mm, addr) (pgd_offset_raw((mm)->pgd, (addr)))
575 /* to find an entry in a kernel page-table-directory */
576 #define pgd_offset_k(addr) pgd_offset(&init_mm, addr)
578 #define pgd_set_fixmap(addr) ((pgd_t *)set_fixmap_offset(FIX_PGD, addr))
579 #define pgd_clear_fixmap() clear_fixmap(FIX_PGD)
581 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
583 const pteval_t mask = PTE_USER | PTE_PXN | PTE_UXN | PTE_RDONLY |
584 PTE_PROT_NONE | PTE_VALID | PTE_WRITE;
585 /* preserve the hardware dirty information */
586 if (pte_hw_dirty(pte))
587 pte = pte_mkdirty(pte);
588 pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask);
592 static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
594 return pte_pmd(pte_modify(pmd_pte(pmd), newprot));
597 #ifdef CONFIG_ARM64_HW_AFDBM
598 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
599 extern int ptep_set_access_flags(struct vm_area_struct *vma,
600 unsigned long address, pte_t *ptep,
601 pte_t entry, int dirty);
603 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
604 #define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
605 static inline int pmdp_set_access_flags(struct vm_area_struct *vma,
606 unsigned long address, pmd_t *pmdp,
607 pmd_t entry, int dirty)
609 return ptep_set_access_flags(vma, address, (pte_t *)pmdp, pmd_pte(entry), dirty);
614 * Atomic pte/pmd modifications.
616 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
617 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
618 unsigned long address,
622 unsigned int tmp, res;
624 asm volatile("// ptep_test_and_clear_young\n"
625 " prfm pstl1strm, %2\n"
627 " ubfx %w3, %w0, %5, #1 // extract PTE_AF (young)\n"
628 " and %0, %0, %4 // clear PTE_AF\n"
629 " stxr %w1, %0, %2\n"
631 : "=&r" (pteval), "=&r" (tmp), "+Q" (pte_val(*ptep)), "=&r" (res)
632 : "L" (~PTE_AF), "I" (ilog2(PTE_AF)));
637 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
638 #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
639 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
640 unsigned long address,
643 return ptep_test_and_clear_young(vma, address, (pte_t *)pmdp);
645 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
647 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
648 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
649 unsigned long address, pte_t *ptep)
654 asm volatile("// ptep_get_and_clear\n"
655 " prfm pstl1strm, %2\n"
657 " stxr %w1, xzr, %2\n"
659 : "=&r" (old_pteval), "=&r" (tmp), "+Q" (pte_val(*ptep)));
661 return __pte(old_pteval);
664 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
665 #define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
666 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
667 unsigned long address, pmd_t *pmdp)
669 return pte_pmd(ptep_get_and_clear(mm, address, (pte_t *)pmdp));
671 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
674 * ptep_set_wrprotect - mark read-only while trasferring potential hardware
675 * dirty status (PTE_DBM && !PTE_RDONLY) to the software PTE_DIRTY bit.
677 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
678 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep)
683 asm volatile("// ptep_set_wrprotect\n"
684 " prfm pstl1strm, %2\n"
686 " tst %0, %4 // check for hw dirty (!PTE_RDONLY)\n"
687 " csel %1, %3, xzr, eq // set PTE_DIRTY|PTE_RDONLY if dirty\n"
688 " orr %0, %0, %1 // if !dirty, PTE_RDONLY is already set\n"
689 " and %0, %0, %5 // clear PTE_WRITE/PTE_DBM\n"
690 " stxr %w1, %0, %2\n"
692 : "=&r" (pteval), "=&r" (tmp), "+Q" (pte_val(*ptep))
693 : "r" (PTE_DIRTY|PTE_RDONLY), "L" (PTE_RDONLY), "L" (~PTE_WRITE)
697 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
698 #define __HAVE_ARCH_PMDP_SET_WRPROTECT
699 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
700 unsigned long address, pmd_t *pmdp)
702 ptep_set_wrprotect(mm, address, (pte_t *)pmdp);
705 #endif /* CONFIG_ARM64_HW_AFDBM */
707 extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
708 extern pgd_t idmap_pg_dir[PTRS_PER_PGD];
711 * Encode and decode a swap entry:
712 * bits 0-1: present (must be zero)
713 * bits 2-7: swap type
714 * bits 8-57: swap offset
715 * bit 58: PTE_PROT_NONE (must be zero)
717 #define __SWP_TYPE_SHIFT 2
718 #define __SWP_TYPE_BITS 6
719 #define __SWP_OFFSET_BITS 50
720 #define __SWP_TYPE_MASK ((1 << __SWP_TYPE_BITS) - 1)
721 #define __SWP_OFFSET_SHIFT (__SWP_TYPE_BITS + __SWP_TYPE_SHIFT)
722 #define __SWP_OFFSET_MASK ((1UL << __SWP_OFFSET_BITS) - 1)
724 #define __swp_type(x) (((x).val >> __SWP_TYPE_SHIFT) & __SWP_TYPE_MASK)
725 #define __swp_offset(x) (((x).val >> __SWP_OFFSET_SHIFT) & __SWP_OFFSET_MASK)
726 #define __swp_entry(type,offset) ((swp_entry_t) { ((type) << __SWP_TYPE_SHIFT) | ((offset) << __SWP_OFFSET_SHIFT) })
728 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
729 #define __swp_entry_to_pte(swp) ((pte_t) { (swp).val })
732 * Ensure that there are not more swap files than can be encoded in the kernel
735 #define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > __SWP_TYPE_BITS)
737 extern int kern_addr_valid(unsigned long addr);
739 #include <asm-generic/pgtable.h>
741 void pgd_cache_init(void);
742 #define pgtable_cache_init pgd_cache_init
745 * On AArch64, the cache coherency is handled via the set_pte_at() function.
747 static inline void update_mmu_cache(struct vm_area_struct *vma,
748 unsigned long addr, pte_t *ptep)
751 * We don't do anything here, so there's a very small chance of
752 * us retaking a user fault which we just fixed up. The alternative
753 * is doing a dsb(ishst), but that penalises the fastpath.
757 #define update_mmu_cache_pmd(vma, address, pmd) do { } while (0)
759 #define kc_vaddr_to_offset(v) ((v) & ~VA_START)
760 #define kc_offset_to_vaddr(o) ((o) | VA_START)
762 #endif /* !__ASSEMBLY__ */
764 #endif /* __ASM_PGTABLE_H */