2 * Copyright (C) 2012 ARM Ltd.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
16 #ifndef __ASM_PGTABLE_H
17 #define __ASM_PGTABLE_H
20 #include <asm/proc-fns.h>
22 #include <asm/memory.h>
23 #include <asm/pgtable-hwdef.h>
26 * Software defined PTE bits definition.
28 #define PTE_VALID (_AT(pteval_t, 1) << 0)
29 #define PTE_WRITE (PTE_DBM) /* same as DBM (51) */
30 #define PTE_DIRTY (_AT(pteval_t, 1) << 55)
31 #define PTE_SPECIAL (_AT(pteval_t, 1) << 56)
32 #define PTE_PROT_NONE (_AT(pteval_t, 1) << 58) /* only when !PTE_VALID */
35 * VMALLOC and SPARSEMEM_VMEMMAP ranges.
37 * VMEMAP_SIZE: allows the whole linear region to be covered by a struct page array
38 * (rounded up to PUD_SIZE).
39 * VMALLOC_START: beginning of the kernel VA space
40 * VMALLOC_END: extends to the available space below vmmemmap, PCI I/O space,
41 * fixed mappings and modules
43 #define VMEMMAP_SIZE ALIGN((1UL << (VA_BITS - PAGE_SHIFT)) * sizeof(struct page), PUD_SIZE)
46 #define VMALLOC_START (VA_START)
48 #include <asm/kasan.h>
49 #define VMALLOC_START (KASAN_SHADOW_END + SZ_64K)
52 #define VMALLOC_END (PAGE_OFFSET - PUD_SIZE - VMEMMAP_SIZE - SZ_64K)
54 #define VMEMMAP_START (VMALLOC_END + SZ_64K)
55 #define vmemmap ((struct page *)VMEMMAP_START - \
56 SECTION_ALIGN_DOWN(memstart_addr >> PAGE_SHIFT))
58 #define FIRST_USER_ADDRESS 0UL
62 #include <linux/mmdebug.h>
64 extern void __pte_error(const char *file, int line, unsigned long val);
65 extern void __pmd_error(const char *file, int line, unsigned long val);
66 extern void __pud_error(const char *file, int line, unsigned long val);
67 extern void __pgd_error(const char *file, int line, unsigned long val);
69 #define PROT_DEFAULT (PTE_TYPE_PAGE | PTE_AF | PTE_SHARED)
70 #define PROT_SECT_DEFAULT (PMD_TYPE_SECT | PMD_SECT_AF | PMD_SECT_S)
72 #define PROT_DEVICE_nGnRnE (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_WRITE | PTE_ATTRINDX(MT_DEVICE_nGnRnE))
73 #define PROT_DEVICE_nGnRE (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_WRITE | PTE_ATTRINDX(MT_DEVICE_nGnRE))
74 #define PROT_NORMAL_NC (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL_NC))
75 #define PROT_NORMAL_WT (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL_WT))
76 #define PROT_NORMAL (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL))
78 #define PROT_SECT_DEVICE_nGnRE (PROT_SECT_DEFAULT | PMD_SECT_PXN | PMD_SECT_UXN | PMD_ATTRINDX(MT_DEVICE_nGnRE))
79 #define PROT_SECT_NORMAL (PROT_SECT_DEFAULT | PMD_SECT_PXN | PMD_SECT_UXN | PMD_ATTRINDX(MT_NORMAL))
80 #define PROT_SECT_NORMAL_EXEC (PROT_SECT_DEFAULT | PMD_SECT_UXN | PMD_ATTRINDX(MT_NORMAL))
82 #define _PAGE_DEFAULT (PROT_DEFAULT | PTE_ATTRINDX(MT_NORMAL))
84 #define PAGE_KERNEL __pgprot(_PAGE_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_WRITE)
85 #define PAGE_KERNEL_RO __pgprot(_PAGE_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_RDONLY)
86 #define PAGE_KERNEL_ROX __pgprot(_PAGE_DEFAULT | PTE_UXN | PTE_DIRTY | PTE_RDONLY)
87 #define PAGE_KERNEL_EXEC __pgprot(_PAGE_DEFAULT | PTE_UXN | PTE_DIRTY | PTE_WRITE)
88 #define PAGE_KERNEL_EXEC_CONT __pgprot(_PAGE_DEFAULT | PTE_UXN | PTE_DIRTY | PTE_WRITE | PTE_CONT)
90 #define PAGE_HYP __pgprot(_PAGE_DEFAULT | PTE_HYP)
91 #define PAGE_HYP_DEVICE __pgprot(PROT_DEVICE_nGnRE | PTE_HYP)
93 #define PAGE_S2 __pgprot(PROT_DEFAULT | PTE_S2_MEMATTR(MT_S2_NORMAL) | PTE_S2_RDONLY)
94 #define PAGE_S2_DEVICE __pgprot(PROT_DEFAULT | PTE_S2_MEMATTR(MT_S2_DEVICE_nGnRE) | PTE_S2_RDONLY | PTE_UXN)
96 #define PAGE_NONE __pgprot(((_PAGE_DEFAULT) & ~PTE_VALID) | PTE_PROT_NONE | PTE_PXN | PTE_UXN)
97 #define PAGE_SHARED __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN | PTE_WRITE)
98 #define PAGE_SHARED_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_WRITE)
99 #define PAGE_COPY __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN)
100 #define PAGE_COPY_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN)
101 #define PAGE_READONLY __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN)
102 #define PAGE_READONLY_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN)
104 #define __P000 PAGE_NONE
105 #define __P001 PAGE_READONLY
106 #define __P010 PAGE_COPY
107 #define __P011 PAGE_COPY
108 #define __P100 PAGE_READONLY_EXEC
109 #define __P101 PAGE_READONLY_EXEC
110 #define __P110 PAGE_COPY_EXEC
111 #define __P111 PAGE_COPY_EXEC
113 #define __S000 PAGE_NONE
114 #define __S001 PAGE_READONLY
115 #define __S010 PAGE_SHARED
116 #define __S011 PAGE_SHARED
117 #define __S100 PAGE_READONLY_EXEC
118 #define __S101 PAGE_READONLY_EXEC
119 #define __S110 PAGE_SHARED_EXEC
120 #define __S111 PAGE_SHARED_EXEC
123 * ZERO_PAGE is a global shared page that is always zero: used
124 * for zero-mapped memory areas etc..
126 extern struct page *empty_zero_page;
127 #define ZERO_PAGE(vaddr) (empty_zero_page)
129 #define pte_ERROR(pte) __pte_error(__FILE__, __LINE__, pte_val(pte))
131 #define pte_pfn(pte) ((pte_val(pte) & PHYS_MASK) >> PAGE_SHIFT)
133 #define pfn_pte(pfn,prot) (__pte(((phys_addr_t)(pfn) << PAGE_SHIFT) | pgprot_val(prot)))
135 #define pte_none(pte) (!pte_val(pte))
136 #define pte_clear(mm,addr,ptep) set_pte(ptep, __pte(0))
137 #define pte_page(pte) (pfn_to_page(pte_pfn(pte)))
139 /* Find an entry in the third-level page table. */
140 #define pte_index(addr) (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
142 #define pte_offset_kernel(dir,addr) (pmd_page_vaddr(*(dir)) + pte_index(addr))
144 #define pte_offset_map(dir,addr) pte_offset_kernel((dir), (addr))
145 #define pte_offset_map_nested(dir,addr) pte_offset_kernel((dir), (addr))
146 #define pte_unmap(pte) do { } while (0)
147 #define pte_unmap_nested(pte) do { } while (0)
150 * The following only work if pte_present(). Undefined behaviour otherwise.
152 #define pte_present(pte) (!!(pte_val(pte) & (PTE_VALID | PTE_PROT_NONE)))
153 #define pte_young(pte) (!!(pte_val(pte) & PTE_AF))
154 #define pte_special(pte) (!!(pte_val(pte) & PTE_SPECIAL))
155 #define pte_write(pte) (!!(pte_val(pte) & PTE_WRITE))
156 #define pte_exec(pte) (!(pte_val(pte) & PTE_UXN))
157 #define pte_cont(pte) (!!(pte_val(pte) & PTE_CONT))
158 #define pte_user(pte) (!!(pte_val(pte) & PTE_USER))
160 #ifdef CONFIG_ARM64_HW_AFDBM
161 #define pte_hw_dirty(pte) (pte_write(pte) && !(pte_val(pte) & PTE_RDONLY))
163 #define pte_hw_dirty(pte) (0)
165 #define pte_sw_dirty(pte) (!!(pte_val(pte) & PTE_DIRTY))
166 #define pte_dirty(pte) (pte_sw_dirty(pte) || pte_hw_dirty(pte))
168 #define pte_valid(pte) (!!(pte_val(pte) & PTE_VALID))
169 #define pte_valid_not_user(pte) \
170 ((pte_val(pte) & (PTE_VALID | PTE_USER)) == PTE_VALID)
172 static inline pte_t clear_pte_bit(pte_t pte, pgprot_t prot)
174 pte_val(pte) &= ~pgprot_val(prot);
178 static inline pte_t set_pte_bit(pte_t pte, pgprot_t prot)
180 pte_val(pte) |= pgprot_val(prot);
184 static inline pte_t pte_wrprotect(pte_t pte)
186 return clear_pte_bit(pte, __pgprot(PTE_WRITE));
189 static inline pte_t pte_mkwrite(pte_t pte)
191 return set_pte_bit(pte, __pgprot(PTE_WRITE));
194 static inline pte_t pte_mkclean(pte_t pte)
196 return clear_pte_bit(pte, __pgprot(PTE_DIRTY));
199 static inline pte_t pte_mkdirty(pte_t pte)
201 return set_pte_bit(pte, __pgprot(PTE_DIRTY));
204 static inline pte_t pte_mkold(pte_t pte)
206 return clear_pte_bit(pte, __pgprot(PTE_AF));
209 static inline pte_t pte_mkyoung(pte_t pte)
211 return set_pte_bit(pte, __pgprot(PTE_AF));
214 static inline pte_t pte_mkspecial(pte_t pte)
216 return set_pte_bit(pte, __pgprot(PTE_SPECIAL));
219 static inline pte_t pte_mkcont(pte_t pte)
221 return set_pte_bit(pte, __pgprot(PTE_CONT));
224 static inline pte_t pte_mknoncont(pte_t pte)
226 return clear_pte_bit(pte, __pgprot(PTE_CONT));
229 static inline void set_pte(pte_t *ptep, pte_t pte)
234 * Only if the new pte is valid and kernel, otherwise TLB maintenance
235 * or update_mmu_cache() have the necessary barriers.
237 if (pte_valid_not_user(pte)) {
244 struct vm_area_struct;
246 extern void __sync_icache_dcache(pte_t pteval, unsigned long addr);
249 * PTE bits configuration in the presence of hardware Dirty Bit Management
250 * (PTE_WRITE == PTE_DBM):
252 * Dirty Writable | PTE_RDONLY PTE_WRITE PTE_DIRTY (sw)
258 * When hardware DBM is not present, the sofware PTE_DIRTY bit is updated via
259 * the page fault mechanism. Checking the dirty status of a pte becomes:
261 * PTE_DIRTY || (PTE_WRITE && !PTE_RDONLY)
263 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
264 pte_t *ptep, pte_t pte)
266 if (pte_valid(pte)) {
267 if (pte_sw_dirty(pte) && pte_write(pte))
268 pte_val(pte) &= ~PTE_RDONLY;
270 pte_val(pte) |= PTE_RDONLY;
271 if (pte_user(pte) && pte_exec(pte) && !pte_special(pte))
272 __sync_icache_dcache(pte, addr);
276 * If the existing pte is valid, check for potential race with
277 * hardware updates of the pte (ptep_set_access_flags safely changes
278 * valid ptes without going through an invalid entry).
280 if (IS_ENABLED(CONFIG_ARM64_HW_AFDBM) &&
281 pte_valid(*ptep) && pte_valid(pte)) {
282 VM_WARN_ONCE(!pte_young(pte),
283 "%s: racy access flag clearing: 0x%016llx -> 0x%016llx",
284 __func__, pte_val(*ptep), pte_val(pte));
285 VM_WARN_ONCE(pte_write(*ptep) && !pte_dirty(pte),
286 "%s: racy dirty state clearing: 0x%016llx -> 0x%016llx",
287 __func__, pte_val(*ptep), pte_val(pte));
294 * Huge pte definitions.
296 #define pte_huge(pte) (!(pte_val(pte) & PTE_TABLE_BIT))
297 #define pte_mkhuge(pte) (__pte(pte_val(pte) & ~PTE_TABLE_BIT))
300 * Hugetlb definitions.
302 #define HUGE_MAX_HSTATE 2
303 #define HPAGE_SHIFT PMD_SHIFT
304 #define HPAGE_SIZE (_AC(1, UL) << HPAGE_SHIFT)
305 #define HPAGE_MASK (~(HPAGE_SIZE - 1))
306 #define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
308 #define __HAVE_ARCH_PTE_SPECIAL
310 static inline pte_t pud_pte(pud_t pud)
312 return __pte(pud_val(pud));
315 static inline pmd_t pud_pmd(pud_t pud)
317 return __pmd(pud_val(pud));
320 static inline pte_t pmd_pte(pmd_t pmd)
322 return __pte(pmd_val(pmd));
325 static inline pmd_t pte_pmd(pte_t pte)
327 return __pmd(pte_val(pte));
330 static inline pgprot_t mk_sect_prot(pgprot_t prot)
332 return __pgprot(pgprot_val(prot) & ~PTE_TABLE_BIT);
339 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
340 #define pmd_trans_huge(pmd) (pmd_val(pmd) && !(pmd_val(pmd) & PMD_TABLE_BIT))
341 #define pmd_trans_splitting(pmd) pte_special(pmd_pte(pmd))
342 #ifdef CONFIG_HAVE_RCU_TABLE_FREE
343 #define __HAVE_ARCH_PMDP_SPLITTING_FLUSH
344 struct vm_area_struct;
345 void pmdp_splitting_flush(struct vm_area_struct *vma, unsigned long address,
347 #endif /* CONFIG_HAVE_RCU_TABLE_FREE */
348 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
350 #define pmd_dirty(pmd) pte_dirty(pmd_pte(pmd))
351 #define pmd_young(pmd) pte_young(pmd_pte(pmd))
352 #define pmd_wrprotect(pmd) pte_pmd(pte_wrprotect(pmd_pte(pmd)))
353 #define pmd_mksplitting(pmd) pte_pmd(pte_mkspecial(pmd_pte(pmd)))
354 #define pmd_mkold(pmd) pte_pmd(pte_mkold(pmd_pte(pmd)))
355 #define pmd_mkwrite(pmd) pte_pmd(pte_mkwrite(pmd_pte(pmd)))
356 #define pmd_mkdirty(pmd) pte_pmd(pte_mkdirty(pmd_pte(pmd)))
357 #define pmd_mkyoung(pmd) pte_pmd(pte_mkyoung(pmd_pte(pmd)))
358 #define pmd_mknotpresent(pmd) (__pmd(pmd_val(pmd) & ~PMD_TYPE_MASK))
360 #define __HAVE_ARCH_PMD_WRITE
361 #define pmd_write(pmd) pte_write(pmd_pte(pmd))
363 #define pmd_mkhuge(pmd) (__pmd(pmd_val(pmd) & ~PMD_TABLE_BIT))
365 #define pmd_pfn(pmd) (((pmd_val(pmd) & PMD_MASK) & PHYS_MASK) >> PAGE_SHIFT)
366 #define pfn_pmd(pfn,prot) (__pmd(((phys_addr_t)(pfn) << PAGE_SHIFT) | pgprot_val(prot)))
367 #define mk_pmd(page,prot) pfn_pmd(page_to_pfn(page),prot)
369 #define pud_write(pud) pte_write(pud_pte(pud))
370 #define pud_pfn(pud) (((pud_val(pud) & PUD_MASK) & PHYS_MASK) >> PAGE_SHIFT)
372 #define set_pmd_at(mm, addr, pmdp, pmd) set_pte_at(mm, addr, (pte_t *)pmdp, pmd_pte(pmd))
374 static inline int has_transparent_hugepage(void)
379 #define __pgprot_modify(prot,mask,bits) \
380 __pgprot((pgprot_val(prot) & ~(mask)) | (bits))
383 * Mark the prot value as uncacheable and unbufferable.
385 #define pgprot_noncached(prot) \
386 __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_nGnRnE) | PTE_PXN | PTE_UXN)
387 #define pgprot_writecombine(prot) \
388 __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_NORMAL_NC) | PTE_PXN | PTE_UXN)
389 #define pgprot_device(prot) \
390 __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_nGnRE) | PTE_PXN | PTE_UXN)
391 #define __HAVE_PHYS_MEM_ACCESS_PROT
393 extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
394 unsigned long size, pgprot_t vma_prot);
396 #define pmd_none(pmd) (!pmd_val(pmd))
397 #define pmd_present(pmd) (pmd_val(pmd))
399 #define pmd_bad(pmd) (!(pmd_val(pmd) & 2))
401 #define pmd_table(pmd) ((pmd_val(pmd) & PMD_TYPE_MASK) == \
403 #define pmd_sect(pmd) ((pmd_val(pmd) & PMD_TYPE_MASK) == \
406 #ifdef CONFIG_ARM64_64K_PAGES
407 #define pud_sect(pud) (0)
408 #define pud_table(pud) (1)
410 #define pud_sect(pud) ((pud_val(pud) & PUD_TYPE_MASK) == \
412 #define pud_table(pud) ((pud_val(pud) & PUD_TYPE_MASK) == \
416 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
423 static inline void pmd_clear(pmd_t *pmdp)
425 set_pmd(pmdp, __pmd(0));
428 static inline pte_t *pmd_page_vaddr(pmd_t pmd)
430 return __va(pmd_val(pmd) & PHYS_MASK & (s32)PAGE_MASK);
433 #define pmd_page(pmd) pfn_to_page(__phys_to_pfn(pmd_val(pmd) & PHYS_MASK))
436 * Conversion functions: convert a page and protection to a page entry,
437 * and a page entry and page directory to the page they refer to.
439 #define mk_pte(page,prot) pfn_pte(page_to_pfn(page),prot)
441 #if CONFIG_PGTABLE_LEVELS > 2
443 #define pmd_ERROR(pmd) __pmd_error(__FILE__, __LINE__, pmd_val(pmd))
445 #define pud_none(pud) (!pud_val(pud))
446 #define pud_bad(pud) (!(pud_val(pud) & 2))
447 #define pud_present(pud) (pud_val(pud))
449 static inline void set_pud(pud_t *pudp, pud_t pud)
456 static inline void pud_clear(pud_t *pudp)
458 set_pud(pudp, __pud(0));
461 static inline pmd_t *pud_page_vaddr(pud_t pud)
463 return __va(pud_val(pud) & PHYS_MASK & (s32)PAGE_MASK);
466 /* Find an entry in the second-level page table. */
467 #define pmd_index(addr) (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
469 static inline pmd_t *pmd_offset(pud_t *pud, unsigned long addr)
471 return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(addr);
474 #define pud_page(pud) pfn_to_page(__phys_to_pfn(pud_val(pud) & PHYS_MASK))
476 #endif /* CONFIG_PGTABLE_LEVELS > 2 */
478 #if CONFIG_PGTABLE_LEVELS > 3
480 #define pud_ERROR(pud) __pud_error(__FILE__, __LINE__, pud_val(pud))
482 #define pgd_none(pgd) (!pgd_val(pgd))
483 #define pgd_bad(pgd) (!(pgd_val(pgd) & 2))
484 #define pgd_present(pgd) (pgd_val(pgd))
486 static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
492 static inline void pgd_clear(pgd_t *pgdp)
494 set_pgd(pgdp, __pgd(0));
497 static inline pud_t *pgd_page_vaddr(pgd_t pgd)
499 return __va(pgd_val(pgd) & PHYS_MASK & (s32)PAGE_MASK);
502 /* Find an entry in the frst-level page table. */
503 #define pud_index(addr) (((addr) >> PUD_SHIFT) & (PTRS_PER_PUD - 1))
505 static inline pud_t *pud_offset(pgd_t *pgd, unsigned long addr)
507 return (pud_t *)pgd_page_vaddr(*pgd) + pud_index(addr);
510 #define pgd_page(pgd) pfn_to_page(__phys_to_pfn(pgd_val(pgd) & PHYS_MASK))
512 #endif /* CONFIG_PGTABLE_LEVELS > 3 */
514 #define pgd_ERROR(pgd) __pgd_error(__FILE__, __LINE__, pgd_val(pgd))
516 /* to find an entry in a page-table-directory */
517 #define pgd_index(addr) (((addr) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
519 #define pgd_offset(mm, addr) ((mm)->pgd+pgd_index(addr))
521 /* to find an entry in a kernel page-table-directory */
522 #define pgd_offset_k(addr) pgd_offset(&init_mm, addr)
524 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
526 const pteval_t mask = PTE_USER | PTE_PXN | PTE_UXN | PTE_RDONLY |
527 PTE_PROT_NONE | PTE_VALID | PTE_WRITE;
528 /* preserve the hardware dirty information */
529 if (pte_hw_dirty(pte))
530 pte = pte_mkdirty(pte);
531 pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask);
535 static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
537 return pte_pmd(pte_modify(pmd_pte(pmd), newprot));
540 #ifdef CONFIG_ARM64_HW_AFDBM
542 * Atomic pte/pmd modifications.
544 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
545 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
546 unsigned long address,
550 unsigned int tmp, res;
552 asm volatile("// ptep_test_and_clear_young\n"
553 " prfm pstl1strm, %2\n"
555 " ubfx %w3, %w0, %5, #1 // extract PTE_AF (young)\n"
556 " and %0, %0, %4 // clear PTE_AF\n"
557 " stxr %w1, %0, %2\n"
559 : "=&r" (pteval), "=&r" (tmp), "+Q" (pte_val(*ptep)), "=&r" (res)
560 : "L" (~PTE_AF), "I" (ilog2(PTE_AF)));
565 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
566 #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
567 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
568 unsigned long address,
571 return ptep_test_and_clear_young(vma, address, (pte_t *)pmdp);
573 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
575 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
576 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
577 unsigned long address, pte_t *ptep)
582 asm volatile("// ptep_get_and_clear\n"
583 " prfm pstl1strm, %2\n"
585 " stxr %w1, xzr, %2\n"
587 : "=&r" (old_pteval), "=&r" (tmp), "+Q" (pte_val(*ptep)));
589 return __pte(old_pteval);
592 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
593 #define __HAVE_ARCH_PMDP_GET_AND_CLEAR
594 static inline pmd_t pmdp_get_and_clear(struct mm_struct *mm,
595 unsigned long address, pmd_t *pmdp)
597 return pte_pmd(ptep_get_and_clear(mm, address, (pte_t *)pmdp));
599 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
602 * ptep_set_wrprotect - mark read-only while trasferring potential hardware
603 * dirty status (PTE_DBM && !PTE_RDONLY) to the software PTE_DIRTY bit.
605 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
606 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep)
611 asm volatile("// ptep_set_wrprotect\n"
612 " prfm pstl1strm, %2\n"
614 " tst %0, %4 // check for hw dirty (!PTE_RDONLY)\n"
615 " csel %1, %3, xzr, eq // set PTE_DIRTY|PTE_RDONLY if dirty\n"
616 " orr %0, %0, %1 // if !dirty, PTE_RDONLY is already set\n"
617 " and %0, %0, %5 // clear PTE_WRITE/PTE_DBM\n"
618 " stxr %w1, %0, %2\n"
620 : "=&r" (pteval), "=&r" (tmp), "+Q" (pte_val(*ptep))
621 : "r" (PTE_DIRTY|PTE_RDONLY), "L" (PTE_RDONLY), "L" (~PTE_WRITE)
625 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
626 #define __HAVE_ARCH_PMDP_SET_WRPROTECT
627 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
628 unsigned long address, pmd_t *pmdp)
630 ptep_set_wrprotect(mm, address, (pte_t *)pmdp);
633 #endif /* CONFIG_ARM64_HW_AFDBM */
635 extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
636 extern pgd_t idmap_pg_dir[PTRS_PER_PGD];
639 * Encode and decode a swap entry:
640 * bits 0-1: present (must be zero)
641 * bits 2-7: swap type
642 * bits 8-57: swap offset
644 #define __SWP_TYPE_SHIFT 2
645 #define __SWP_TYPE_BITS 6
646 #define __SWP_OFFSET_BITS 50
647 #define __SWP_TYPE_MASK ((1 << __SWP_TYPE_BITS) - 1)
648 #define __SWP_OFFSET_SHIFT (__SWP_TYPE_BITS + __SWP_TYPE_SHIFT)
649 #define __SWP_OFFSET_MASK ((1UL << __SWP_OFFSET_BITS) - 1)
651 #define __swp_type(x) (((x).val >> __SWP_TYPE_SHIFT) & __SWP_TYPE_MASK)
652 #define __swp_offset(x) (((x).val >> __SWP_OFFSET_SHIFT) & __SWP_OFFSET_MASK)
653 #define __swp_entry(type,offset) ((swp_entry_t) { ((type) << __SWP_TYPE_SHIFT) | ((offset) << __SWP_OFFSET_SHIFT) })
655 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
656 #define __swp_entry_to_pte(swp) ((pte_t) { (swp).val })
659 * Ensure that there are not more swap files than can be encoded in the kernel
662 #define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > __SWP_TYPE_BITS)
664 extern int kern_addr_valid(unsigned long addr);
666 #include <asm-generic/pgtable.h>
668 #define pgtable_cache_init() do { } while (0)
671 * On AArch64, the cache coherency is handled via the set_pte_at() function.
673 static inline void update_mmu_cache(struct vm_area_struct *vma,
674 unsigned long addr, pte_t *ptep)
677 * We don't do anything here, so there's a very small chance of
678 * us retaking a user fault which we just fixed up. The alternative
679 * is doing a dsb(ishst), but that penalises the fastpath.
683 #define update_mmu_cache_pmd(vma, address, pmd) do { } while (0)
685 #define kc_vaddr_to_offset(v) ((v) & ~VA_START)
686 #define kc_offset_to_vaddr(o) ((o) | VA_START)
688 #endif /* !__ASSEMBLY__ */
690 #endif /* __ASM_PGTABLE_H */