2 * Copyright (C) 2012,2013 - ARM Ltd
3 * Author: Marc Zyngier <marc.zyngier@arm.com>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 #ifndef __ARM64_KVM_MMU_H__
19 #define __ARM64_KVM_MMU_H__
22 #include <asm/memory.h>
25 * As we only have the TTBR0_EL2 register, we cannot express
26 * "negative" addresses. This makes it impossible to directly share
27 * mappings with the kernel.
29 * Instead, give the HYP mode its own VA region at a fixed offset from
30 * the kernel by just masking the top bits (which are all ones for a
33 #define HYP_PAGE_OFFSET_SHIFT VA_BITS
34 #define HYP_PAGE_OFFSET_MASK ((UL(1) << HYP_PAGE_OFFSET_SHIFT) - 1)
35 #define HYP_PAGE_OFFSET (PAGE_OFFSET & HYP_PAGE_OFFSET_MASK)
38 * Our virtual mapping for the idmap-ed MMU-enable code. Must be
39 * shared across all the page-tables. Conveniently, we use the last
40 * possible page, where no kernel mapping will ever exist.
42 #define TRAMPOLINE_VA (HYP_PAGE_OFFSET_MASK & PAGE_MASK)
47 * Convert a kernel VA into a HYP VA.
48 * reg: VA to be converted.
50 .macro kern_hyp_va reg
51 and \reg, \reg, #HYP_PAGE_OFFSET_MASK
56 #include <asm/cachetype.h>
57 #include <asm/cacheflush.h>
59 #define KERN_TO_HYP(kva) ((unsigned long)kva - PAGE_OFFSET + HYP_PAGE_OFFSET)
62 * We currently only support a 40bit IPA.
64 #define KVM_PHYS_SHIFT (40)
65 #define KVM_PHYS_SIZE (1UL << KVM_PHYS_SHIFT)
66 #define KVM_PHYS_MASK (KVM_PHYS_SIZE - 1UL)
68 /* Make sure we get the right size, and thus the right alignment */
69 #define PTRS_PER_S2_PGD (1 << (KVM_PHYS_SHIFT - PGDIR_SHIFT))
70 #define S2_PGD_ORDER get_order(PTRS_PER_S2_PGD * sizeof(pgd_t))
72 int create_hyp_mappings(void *from, void *to);
73 int create_hyp_io_mappings(void *from, void *to, phys_addr_t);
74 void free_boot_hyp_pgd(void);
75 void free_hyp_pgds(void);
77 int kvm_alloc_stage2_pgd(struct kvm *kvm);
78 void kvm_free_stage2_pgd(struct kvm *kvm);
79 int kvm_phys_addr_ioremap(struct kvm *kvm, phys_addr_t guest_ipa,
80 phys_addr_t pa, unsigned long size);
82 int kvm_handle_guest_abort(struct kvm_vcpu *vcpu, struct kvm_run *run);
84 void kvm_mmu_free_memory_caches(struct kvm_vcpu *vcpu);
86 phys_addr_t kvm_mmu_get_httbr(void);
87 phys_addr_t kvm_mmu_get_boot_httbr(void);
88 phys_addr_t kvm_get_idmap_vector(void);
89 int kvm_mmu_init(void);
90 void kvm_clear_hyp_idmap(void);
92 #define kvm_set_pte(ptep, pte) set_pte(ptep, pte)
93 #define kvm_set_pmd(pmdp, pmd) set_pmd(pmdp, pmd)
95 static inline void kvm_clean_pgd(pgd_t *pgd) {}
96 static inline void kvm_clean_pmd_entry(pmd_t *pmd) {}
97 static inline void kvm_clean_pte(pte_t *pte) {}
98 static inline void kvm_clean_pte_entry(pte_t *pte) {}
100 static inline void kvm_set_s2pte_writable(pte_t *pte)
102 pte_val(*pte) |= PTE_S2_RDWR;
105 static inline void kvm_set_s2pmd_writable(pmd_t *pmd)
107 pmd_val(*pmd) |= PMD_S2_RDWR;
110 #define kvm_pgd_addr_end(addr, end) pgd_addr_end(addr, end)
111 #define kvm_pud_addr_end(addr, end) pud_addr_end(addr, end)
112 #define kvm_pmd_addr_end(addr, end) pmd_addr_end(addr, end)
114 static inline bool kvm_page_empty(void *ptr)
116 struct page *ptr_page = virt_to_page(ptr);
117 return page_count(ptr_page) == 1;
120 #define kvm_pte_table_empty(ptep) kvm_page_empty(ptep)
121 #ifndef CONFIG_ARM64_64K_PAGES
122 #define kvm_pmd_table_empty(pmdp) kvm_page_empty(pmdp)
124 #define kvm_pmd_table_empty(pmdp) (0)
126 #define kvm_pud_table_empty(pudp) (0)
131 #define kvm_flush_dcache_to_poc(a,l) __flush_dcache_area((a), (l))
133 static inline bool vcpu_has_cache_enabled(struct kvm_vcpu *vcpu)
135 return (vcpu_sys_reg(vcpu, SCTLR_EL1) & 0b101) == 0b101;
138 static inline void coherent_cache_guest_page(struct kvm_vcpu *vcpu, hva_t hva,
141 if (!vcpu_has_cache_enabled(vcpu))
142 kvm_flush_dcache_to_poc((void *)hva, size);
144 if (!icache_is_aliasing()) { /* PIPT */
145 flush_icache_range(hva, hva + size);
146 } else if (!icache_is_aivivt()) { /* non ASID-tagged VIVT */
147 /* any kind of VIPT cache */
148 __flush_icache_all();
152 #define kvm_virt_to_phys(x) __virt_to_phys((unsigned long)(x))
154 void stage2_flush_vm(struct kvm *kvm);
156 #endif /* __ASSEMBLY__ */
157 #endif /* __ARM64_KVM_MMU_H__ */