arch/arm64/boot/dts/rtsm_ve-aemv8a.dts

   1 /*
   2  * ARM Ltd. Fast Models
   3  *
   4  * Architecture Envelope Model (AEM) ARMv8-A
   5  * ARMAEMv8AMPCT
   6  *
   7  * RTSM_VE_AEMv8A.lisa
   8  */
   9
  10 /dts-v1/;
  11
  12 /memreserve/ 0x80000000 0x00010000;
  13
  14 / {
  15         model = "RTSM_VE_AEMv8A";
  16         compatible = "arm,rtsm_ve,aemv8a", "arm,vexpress";
  17         interrupt-parent = <&gic>;
  18         #address-cells = <2>;
  19         #size-cells = <2>;
  20
  21         chosen { };
  22
  23         aliases {
  24                 serial0 = &v2m_serial0;
  25                 serial1 = &v2m_serial1;
  26                 serial2 = &v2m_serial2;
  27                 serial3 = &v2m_serial3;
  28         };
  29
  30         psci {
  31                 compatible = "arm,psci";
  32                 method = "smc";
  33                 /*
  34                  * Function IDs usage and compliancy with PSCI v0.2 still
  35                  * under discussion.  Current IDs should be considered
  36                  * temporary for demonstration purposes.
  37                  */
  38                 cpu_suspend = <0x84000001>;
  39                 cpu_off = <0x84000002>;
  40                 cpu_on = <0x84000003>;
  41         };
  42
  43         cpus {
  44                 #address-cells = <2>;
  45                 #size-cells = <0>;
  46
  47                 idle-states {
  48                         entry-method = "arm,psci";
  49
  50                         CPU_SLEEP_0: cpu-sleep-0 {
  51                                 compatible = "arm,idle-state";
  52                                 entry-method-param = <0x0010000>;
  53                                 entry-latency-us = <40>;
  54                                 exit-latency-us = <100>;
  55                                 min-residency-us = <150>;
  56                         };
  57
  58                         CLUSTER_SLEEP_0: cluster-sleep-0 {
  59                                 compatible = "arm,idle-state";
  60                                 entry-method-param = <0x1010000>;
  61                                 entry-latency-us = <500>;
  62                                 exit-latency-us = <1000>;
  63                                 min-residency-us = <2500>;
  64                         };
  65                 };
  66
  67                 cpu@0 {
  68                         device_type = "cpu";
  69                         compatible = "arm,armv8";
  70                         reg = <0x0 0x0>;
  71                         enable-method = "psci";
  72                         cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
  73                 };
  74                 cpu@1 {
  75                         device_type = "cpu";
  76                         compatible = "arm,armv8";
  77                         reg = <0x0 0x1>;
  78                         enable-method = "psci";
  79                         cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
  80                 };
  81                 cpu@2 {
  82                         device_type = "cpu";
  83                         compatible = "arm,armv8";
  84                         reg = <0x0 0x2>;
  85                         enable-method = "psci";
  86                         cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
  87                 };
  88                 cpu@3 {
  89                         device_type = "cpu";
  90                         compatible = "arm,armv8";
  91                         reg = <0x0 0x3>;
  92                         enable-method = "psci";
  93                         cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
  94                 };
  95         };
  96
  97         memory@80000000 {
  98                 device_type = "memory";
  99                 reg = <0x00000000 0x80000000 0 0x80000000>,
 100                       <0x00000008 0x80000000 0 0x80000000>;
 101         };
 102
 103         gic: interrupt-controller@2c001000 {
 104                 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
 105                 #interrupt-cells = <3>;
 106                 #address-cells = <0>;
 107                 interrupt-controller;
 108                 reg = <0x0 0x2c001000 0 0x1000>,
 109                       <0x0 0x2c002000 0 0x1000>,
 110                       <0x0 0x2c004000 0 0x2000>,
 111                       <0x0 0x2c006000 0 0x2000>;
 112                 interrupts = <1 9 0xf04>;
 113         };
 114
 115         timer {
 116                 compatible = "arm,armv8-timer";
 117                 interrupts = <1 13 0xff01>,
 118                              <1 14 0xff01>,
 119                              <1 11 0xff01>,
 120                              <1 10 0xff01>;
 121                 clock-frequency = <100000000>;
 122         };
 123
 124         pmu {
 125                 compatible = "arm,armv8-pmuv3";
 126                 interrupts = <0 60 4>,
 127                              <0 61 4>,
 128                              <0 62 4>,
 129                              <0 63 4>;
 130         };
 131
 132         smb {
 133                 compatible = "simple-bus";
 134
 135                 #address-cells = <2>;
 136                 #size-cells = <1>;
 137                 ranges = <0 0 0 0x08000000 0x04000000>,
 138                          <1 0 0 0x14000000 0x04000000>,
 139                          <2 0 0 0x18000000 0x04000000>,
 140                          <3 0 0 0x1c000000 0x04000000>,
 141                          <4 0 0 0x0c000000 0x04000000>,
 142                          <5 0 0 0x10000000 0x04000000>;
 143
 144                 #interrupt-cells = <1>;
 145                 interrupt-map-mask = <0 0 63>;
 146                 interrupt-map = <0 0  0 &gic 0  0 4>,
 147                                 <0 0  1 &gic 0  1 4>,
 148                                 <0 0  2 &gic 0  2 4>,
 149                                 <0 0  3 &gic 0  3 4>,
 150                                 <0 0  4 &gic 0  4 4>,
 151                                 <0 0  5 &gic 0  5 4>,
 152                                 <0 0  6 &gic 0  6 4>,
 153                                 <0 0  7 &gic 0  7 4>,
 154                                 <0 0  8 &gic 0  8 4>,
 155                                 <0 0  9 &gic 0  9 4>,
 156                                 <0 0 10 &gic 0 10 4>,
 157                                 <0 0 11 &gic 0 11 4>,
 158                                 <0 0 12 &gic 0 12 4>,
 159                                 <0 0 13 &gic 0 13 4>,
 160                                 <0 0 14 &gic 0 14 4>,
 161                                 <0 0 15 &gic 0 15 4>,
 162                                 <0 0 16 &gic 0 16 4>,
 163                                 <0 0 17 &gic 0 17 4>,
 164                                 <0 0 18 &gic 0 18 4>,
 165                                 <0 0 19 &gic 0 19 4>,
 166                                 <0 0 20 &gic 0 20 4>,
 167                                 <0 0 21 &gic 0 21 4>,
 168                                 <0 0 22 &gic 0 22 4>,
 169                                 <0 0 23 &gic 0 23 4>,
 170                                 <0 0 24 &gic 0 24 4>,
 171                                 <0 0 25 &gic 0 25 4>,
 172                                 <0 0 26 &gic 0 26 4>,
 173                                 <0 0 27 &gic 0 27 4>,
 174                                 <0 0 28 &gic 0 28 4>,
 175                                 <0 0 29 &gic 0 29 4>,
 176                                 <0 0 30 &gic 0 30 4>,
 177                                 <0 0 31 &gic 0 31 4>,
 178                                 <0 0 32 &gic 0 32 4>,
 179                                 <0 0 33 &gic 0 33 4>,
 180                                 <0 0 34 &gic 0 34 4>,
 181                                 <0 0 35 &gic 0 35 4>,
 182                                 <0 0 36 &gic 0 36 4>,
 183                                 <0 0 37 &gic 0 37 4>,
 184                                 <0 0 38 &gic 0 38 4>,
 185                                 <0 0 39 &gic 0 39 4>,
 186                                 <0 0 40 &gic 0 40 4>,
 187                                 <0 0 41 &gic 0 41 4>,
 188                                 <0 0 42 &gic 0 42 4>;
 189
 190                 /include/ "rtsm_ve-motherboard.dtsi"
 191         };
 192 };
 193
 194 /include/ "clcd-panels.dtsi"