2 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
44 #include <dt-bindings/pwm/pwm.h>
45 #include "rk3399.dtsi"
46 #include "rk3399-android.dtsi"
49 model = "Rockchip RK3399 VR Board";
50 compatible = "rockchip,vr", "rockchip,rk3399";
53 compatible = "pwm-regulator";
54 pwms = <&pwm2 0 25000 0>;
56 rockchip,pwm_voltage = <900000>;
57 regulator-name = "vdd_log";
58 regulator-min-microvolt = <800000>;
59 regulator-max-microvolt = <1400000>;
64 compatible = "regulator-fixed";
65 regulator-name = "vcc_sys";
68 regulator-min-microvolt = <4000000>;
69 regulator-max-microvolt = <4000000>;
71 vcc3v3_sys: vcc3v3-sys {
72 compatible = "regulator-fixed";
73 regulator-name = "vcc3v3_sys";
76 regulator-min-microvolt = <3300000>;
77 regulator-max-microvolt = <3300000>;
80 backlight: backlight {
81 compatible = "pwm-backlight";
82 pwms = <&pwm0 0 25000 0>;
86 16 17 18 19 20 21 22 23
87 24 25 26 27 28 29 30 31
88 32 33 34 35 36 37 38 39
89 40 41 42 43 44 45 46 47
90 48 49 50 51 52 53 54 55
91 56 57 58 59 60 61 62 63
92 64 65 66 67 68 69 70 71
93 72 73 74 75 76 77 78 79
94 80 81 82 83 84 85 86 87
95 88 89 90 91 92 93 94 95
96 96 97 98 99 100 101 102 103
97 104 105 106 107 108 109 110 111
98 112 113 114 115 116 117 118 119
99 120 121 122 123 124 125 126 127
100 128 129 130 131 132 133 134 135
101 136 137 138 139 140 141 142 143
102 144 145 146 147 148 149 150 151
103 152 153 154 155 156 157 158 159
104 160 161 162 163 164 165 166 167
105 168 169 170 171 172 173 174 175
106 176 177 178 179 180 181 182 183
107 184 185 186 187 188 189 190 191
108 192 193 194 195 196 197 198 199
109 200 201 202 203 204 205 206 207
110 208 209 210 211 212 213 214 215
111 216 217 218 219 220 221 222 223
112 224 225 226 227 228 229 230 231
113 232 233 234 235 236 237 238 239
114 240 241 242 243 244 245 246 247
115 248 249 250 251 252 253 254 255>;
116 default-brightness-level = <100>;
119 vcc_phy: vcc-phy-regulator {
120 compatible = "regulator-fixed";
121 regulator-name = "vcc_phy";
127 compatible = "rockchip,rk3399-io-voltage-domain";
128 rockchip,grf = <&grf>;
130 bt656-supply = <&vcc1v8_dvp>;
131 audio-supply = <&vcca1v8_codec>;
132 sdmmc-supply = <&vcc_sd>;
133 gpio1830-supply = <&vcc_3v0>;
137 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
138 rockchip,grf = <&pmugrf>;
140 pmu1830-supply = <&vcc_1v8>;
144 compatible = "simple-audio-card";
145 simple-audio-card,format = "i2s";
146 simple-audio-card,name = "rockchip,es8316-codec";
147 simple-audio-card,mclk-fs = <256>;
148 simple-audio-card,widgets =
149 "Microphone", "Mic Jack",
150 "Headphone", "Headphone Jack";
151 simple-audio-card,routing =
152 "Mic Jack", "MICBIAS1",
154 "Headphone Jack", "HPOL",
155 "Headphone Jack", "HPOR";
156 simple-audio-card,cpu {
159 simple-audio-card,codec {
160 sound-dai = <&es8316>;
165 compatible = "simple-audio-card";
166 simple-audio-card,name = "rockchip,spdif";
167 simple-audio-card,cpu {
168 sound-dai = <&spdif>;
170 simple-audio-card,codec {
171 sound-dai = <&spdif_out>;
175 spdif_out: spdif-out {
176 compatible = "linux,spdif-dit";
177 #sound-dai-cells = <0>;
180 sdio_pwrseq: sdio-pwrseq {
181 compatible = "mmc-pwrseq-simple";
183 clock-names = "ext_clock";
184 pinctrl-names = "default";
185 pinctrl-0 = <&wifi_enable_h>;
188 * On the module itself this is one of these (depending
189 * on the actual card populated):
190 * - SDIO_RESET_L_WL_REG_ON
191 * - PDN (power down when low)
193 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
197 compatible = "wlan-platdata";
198 rockchip,grf = <&grf>;
199 wifi_chip_type = "ap6330";
201 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
206 compatible = "bluetooth-platdata";
207 //wifi-bt-power-toggle;
208 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
209 pinctrl-names = "default", "rts_gpio";
210 pinctrl-0 = <&uart0_rts>;
211 pinctrl-1 = <&uart0_gpios>;
212 //BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
213 BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
214 BT,wake_gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
215 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
221 clock-frequency = <150000000>;
222 clock-freq-min-max = <400000 150000000>;
230 vqmmc-supply = <&vcc_sd>;
231 pinctrl-names = "default";
232 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
237 clock-frequency = <50000000>;
238 clock-freq-min-max = <200000 50000000>;
244 keep-power-in-suspend;
245 mmc-pwrseq = <&sdio_pwrseq>;
248 pinctrl-names = "default";
249 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
255 freq-sel = <200000000>;
266 mmc-hs400-enhanced-strobe;
272 rockchip,i2s-broken-burst-len;
273 rockchip,playback-channels = <8>;
274 rockchip,capture-channels = <8>;
275 #sound-dai-cells = <0>;
279 #sound-dai-cells = <0>;
284 #sound-dai-cells = <0>;
289 i2c-scl-rising-time-ns = <219>;
290 i2c-scl-falling-time-ns = <15>;
291 clock-frequency = <400000>;
293 vdd_cpu_b: syr828@41 {
294 compatible = "silergy,syr828";
296 vin-supply = <&vcc_sys>;
297 regulator-compatible = "fan53555-reg";
298 regulator-name = "vdd_cpu_b";
299 regulator-min-microvolt = <712500>;
300 regulator-max-microvolt = <1500000>;
301 regulator-ramp-delay = <1000>;
302 fcs,suspend-voltage-selector = <1>;
305 regulator-initial-state = <3>;
306 regulator-state-mem {
307 regulator-off-in-suspend;
312 compatible = "ti,lp8752";
314 vin0-supply = <&vcc_sys>;
316 vdd_gpu: lp8752_buck0 {
317 regulator-name = "vdd_gpu";
318 regulator-min-microvolt = <735000>;
319 regulator-max-microvolt = <1400000>;
327 compatible = "rockchip,rk818";
330 clock-output-names = "xin32k", "wifibt_32kin";
331 interrupt-parent = <&gpio1>;
332 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
333 pinctrl-names = "default";
334 pinctrl-0 = <&pmic_int_l>;
335 rockchip,system-power-controller;
339 vcc1-supply = <&vcc_sys>;
340 vcc2-supply = <&vcc_sys>;
341 vcc3-supply = <&vcc_sys>;
342 vcc4-supply = <&vcc_sys>;
343 vcc6-supply = <&vcc_sys>;
344 vcc7-supply = <&vcc3v3_sys>;
345 vcc8-supply = <&vcc_sys>;
346 vcc9-supply = <&vcc3v3_sys>;
349 vdd_cpu_l: DCDC_REG1 {
350 regulator-name = "vdd_cpu_l";
353 regulator-min-microvolt = <750000>;
354 regulator-max-microvolt = <1350000>;
355 regulator-ramp-delay = <6001>;
356 regulator-state-mem {
357 regulator-off-in-suspend;
361 vdd_center: DCDC_REG2 {
362 regulator-name = "vdd_center";
365 regulator-min-microvolt = <800000>;
366 regulator-max-microvolt = <1350000>;
367 regulator-ramp-delay = <6001>;
368 regulator-state-mem {
369 regulator-on-in-suspend;
370 regulator-suspend-microvolt = <1000000>;
375 regulator-name = "vcc_ddr";
378 regulator-state-mem {
379 regulator-on-in-suspend;
384 regulator-name = "vcc_1v8";
387 regulator-min-microvolt = <1800000>;
388 regulator-max-microvolt = <1800000>;
389 regulator-state-mem {
390 regulator-on-in-suspend;
391 regulator-suspend-microvolt = <1800000>;
395 vcca3v0_codec: LDO_REG1 {
398 regulator-min-microvolt = <3000000>;
399 regulator-max-microvolt = <3000000>;
400 regulator-name = "vcca3v0_codec";
401 regulator-state-mem {
402 regulator-off-in-suspend;
406 vcc3v0_tp: LDO_REG2 {
409 regulator-min-microvolt = <3000000>;
410 regulator-max-microvolt = <3000000>;
411 regulator-name = "vcc3v0_tp";
412 regulator-state-mem {
413 regulator-off-in-suspend;
417 vcca1v8_codec: LDO_REG3 {
420 regulator-min-microvolt = <1800000>;
421 regulator-max-microvolt = <1800000>;
422 regulator-name = "vcca1v8_codec";
423 regulator-state-mem {
424 regulator-off-in-suspend;
428 vcc_power_on: LDO_REG4 {
431 regulator-min-microvolt = <3300000>;
432 regulator-max-microvolt = <3300000>;
433 regulator-name = "vcc_power_on";
434 regulator-state-mem {
435 regulator-on-in-suspend;
436 regulator-suspend-microvolt = <3300000>;
443 regulator-min-microvolt = <3000000>;
444 regulator-max-microvolt = <3000000>;
445 regulator-name = "vcc_3v0";
446 regulator-state-mem {
447 regulator-on-in-suspend;
448 regulator-suspend-microvolt = <3000000>;
455 regulator-min-microvolt = <1500000>;
456 regulator-max-microvolt = <1500000>;
457 regulator-name = "vcc_1v5";
458 regulator-state-mem {
459 regulator-on-in-suspend;
460 regulator-suspend-microvolt = <1500000>;
464 vcc1v8_dvp: LDO_REG7 {
467 regulator-min-microvolt = <1800000>;
468 regulator-max-microvolt = <1800000>;
469 regulator-name = "vcc1v8_dvp";
470 regulator-state-mem {
471 regulator-on-in-suspend;
472 regulator-suspend-microvolt = <1800000>;
476 vcc3v3_s3: LDO_REG8 {
479 regulator-min-microvolt = <3300000>;
480 regulator-max-microvolt = <3300000>;
481 regulator-name = "vcc3v3_s3";
482 regulator-state-mem {
483 regulator-on-in-suspend;
484 regulator-suspend-microvolt = <3300000>;
491 regulator-min-microvolt = <1800000>;
492 regulator-max-microvolt = <3300000>;
493 regulator-name = "vcc_sd";
494 regulator-state-mem {
495 regulator-on-in-suspend;
496 regulator-suspend-microvolt = <3300000>;
500 vcc3v3_s0: SWITCH_REG {
503 regulator-name = "vcc3v3_s0";
504 regulator-state-mem {
505 regulator-on-in-suspend;
514 i2c-scl-rising-time-ns = <164>;
515 i2c-scl-falling-time-ns = <15>;
518 #sound-dai-cells = <0>;
519 compatible = "everest,es8316";
521 clocks = <&cru SCLK_I2S_8CH_OUT>;
522 clock-names = "mclk";
523 spk-con-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
524 hp-det-gpio = <&gpio4 28 GPIO_ACTIVE_LOW>;
530 i2c-scl-rising-time-ns = <600>;
531 i2c-scl-falling-time-ns = <20>;
535 compatible = "invensense,mpu6500";
536 pinctrl-names = "default";
537 pinctrl-0 = <&mpu6500_irq_gpio>;
539 irq-gpio = <&gpio1 4 IRQ_TYPE_EDGE_RISING>;
540 mpu-int_config = <0x10>;
541 mpu-level_shifter = <0>;
542 mpu-orientation = <0 1 0 1 0 0 0 0 1>;
554 compatible = "gslX680";
556 touch-gpio = <&gpio1 20 IRQ_TYPE_LEVEL_LOW>;
557 reset-gpio = <&gpio4 22 GPIO_ACTIVE_LOW>;
566 max-freq = <50000000>;
569 compatible = "inv-spi,mpu6500";
570 pinctrl-names = "default";
571 pinctrl-0 = <&mpu6500_irq_gpio>;
572 irq-gpio = <&gpio1 4 IRQ_TYPE_EDGE_RISING>;
574 spi-max-frequency = <1000000>;
577 mpu-int_config = <0x00>;
578 mpu-level_shifter = <0>;
579 mpu-orientation = <1 0 0 0 1 0 0 0 1>;
588 rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
589 rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
598 compatible = "rockchip,key";
600 io-channels = <&saradc 1>;
605 rockchip,adc_value = <340>;
610 label = "volume down";
611 rockchip,adc_value = <170>;
615 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
624 rockchip,adc_value = <620>;
629 label = "brightness";
630 rockchip,adc_value = <700>;
635 pinctrl-names = "default";
636 pinctrl-0 = <&uart0_xfer &uart0_cts>;
645 vbus_drv-gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
689 rockchip,pwm_id= <3>;
690 rockchip,pwm_voltage = <900000>;
694 #include <dt-bindings/display/screen-timing/lcd-ls055r1sx04-mipi.dtsi>
699 power_ctr: power_ctr {
701 rockchip,power_type = <GPIO>;
702 gpios = <&gpio3 5 GPIO_ACTIVE_HIGH>;
703 rockchip,delay = <10>;
706 rockchip,power_type = <GPIO>;
707 gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>;
708 rockchip,delay = <10>;
726 cpu-supply = <&vdd_cpu_l>;
730 cpu-supply = <&vdd_cpu_l>;
734 cpu-supply = <&vdd_cpu_l>;
738 cpu-supply = <&vdd_cpu_l>;
742 cpu-supply = <&vdd_cpu_b>;
746 cpu-supply = <&vdd_cpu_b>;
751 mali-supply = <&vdd_gpu>;
756 wifi_enable_h: wifi-enable-h {
757 rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
762 uart0_gpios: uart0-gpios {
763 rockchip,pins = <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
768 pmic_int_l: pmic-int-l {
770 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
773 pmic_dvs2: pmic-dvs2 {
775 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
780 mpu6500_irq_gpio: mpu6500-irq-gpio {
781 rockchip,pins = <1 4 RK_FUNC_GPIO &pcfg_pull_none>;