2 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
44 #include <dt-bindings/pwm/pwm.h>
45 #include "rk3399.dtsi"
46 #include "rk3399-android.dtsi"
49 model = "Rockchip RK3399 VR Board";
50 compatible = "rockchip,vr", "rockchip,rk3399";
53 compatible = "pwm-regulator";
54 pwms = <&pwm2 0 25000 0>;
56 rockchip,pwm_voltage = <900000>;
57 regulator-name = "vdd_log";
58 regulator-min-microvolt = <800000>;
59 regulator-max-microvolt = <1400000>;
64 compatible = "regulator-fixed";
65 regulator-name = "vcc_sys";
68 regulator-min-microvolt = <4000000>;
69 regulator-max-microvolt = <4000000>;
71 vcc3v3_sys: vcc3v3-sys {
72 compatible = "regulator-fixed";
73 regulator-name = "vcc3v3_sys";
76 regulator-min-microvolt = <3300000>;
77 regulator-max-microvolt = <3300000>;
80 vcc5v0_host: vcc5v0-host-regulator {
81 compatible = "regulator-fixed";
83 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
84 pinctrl-names = "default";
85 pinctrl-0 = <&host_vbus_drv>;
86 regulator-name = "vcc5v0_host";
89 backlight: backlight {
90 compatible = "pwm-backlight";
91 pwms = <&pwm0 0 25000 0>;
95 16 17 18 19 20 21 22 23
96 24 25 26 27 28 29 30 31
97 32 33 34 35 36 37 38 39
98 40 41 42 43 44 45 46 47
99 48 49 50 51 52 53 54 55
100 56 57 58 59 60 61 62 63
101 64 65 66 67 68 69 70 71
102 72 73 74 75 76 77 78 79
103 80 81 82 83 84 85 86 87
104 88 89 90 91 92 93 94 95
105 96 97 98 99 100 101 102 103
106 104 105 106 107 108 109 110 111
107 112 113 114 115 116 117 118 119
108 120 121 122 123 124 125 126 127
109 128 129 130 131 132 133 134 135
110 136 137 138 139 140 141 142 143
111 144 145 146 147 148 149 150 151
112 152 153 154 155 156 157 158 159
113 160 161 162 163 164 165 166 167
114 168 169 170 171 172 173 174 175
115 176 177 178 179 180 181 182 183
116 184 185 186 187 188 189 190 191
117 192 193 194 195 196 197 198 199
118 200 201 202 203 204 205 206 207
119 208 209 210 211 212 213 214 215
120 216 217 218 219 220 221 222 223
121 224 225 226 227 228 229 230 231
122 232 233 234 235 236 237 238 239
123 240 241 242 243 244 245 246 247
124 248 249 250 251 252 253 254 255>;
125 default-brightness-level = <100>;
128 vcc_phy: vcc-phy-regulator {
129 compatible = "regulator-fixed";
130 regulator-name = "vcc_phy";
136 compatible = "rockchip,rk3399-io-voltage-domain";
137 rockchip,grf = <&grf>;
139 bt656-supply = <&vcc1v8_dvp>;
140 audio-supply = <&vcca1v8_codec>;
141 sdmmc-supply = <&vcc_sd>;
142 gpio1830-supply = <&vcc_3v0>;
146 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
147 rockchip,grf = <&pmugrf>;
149 pmu1830-supply = <&vcc_1v8>;
153 compatible = "simple-audio-card";
154 simple-audio-card,format = "i2s";
155 simple-audio-card,name = "rockchip,es8316-codec";
156 simple-audio-card,mclk-fs = <256>;
157 simple-audio-card,widgets =
158 "Microphone", "Mic Jack",
159 "Headphone", "Headphone Jack";
160 simple-audio-card,routing =
161 "Mic Jack", "MICBIAS1",
163 "Headphone Jack", "HPOL",
164 "Headphone Jack", "HPOR";
165 simple-audio-card,cpu {
168 simple-audio-card,codec {
169 sound-dai = <&es8316>;
174 compatible = "simple-audio-card";
175 simple-audio-card,name = "rockchip,spdif";
176 simple-audio-card,cpu {
177 sound-dai = <&spdif>;
179 simple-audio-card,codec {
180 sound-dai = <&spdif_out>;
184 spdif_out: spdif-out {
185 compatible = "linux,spdif-dit";
186 #sound-dai-cells = <0>;
189 sdio_pwrseq: sdio-pwrseq {
190 compatible = "mmc-pwrseq-simple";
192 clock-names = "ext_clock";
193 pinctrl-names = "default";
194 pinctrl-0 = <&wifi_enable_h>;
197 * On the module itself this is one of these (depending
198 * on the actual card populated):
199 * - SDIO_RESET_L_WL_REG_ON
200 * - PDN (power down when low)
202 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
206 compatible = "wlan-platdata";
207 rockchip,grf = <&grf>;
208 wifi_chip_type = "ap6330";
210 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
215 compatible = "bluetooth-platdata";
216 //wifi-bt-power-toggle;
217 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
218 pinctrl-names = "default", "rts_gpio";
219 pinctrl-0 = <&uart0_rts>;
220 pinctrl-1 = <&uart0_gpios>;
221 //BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
222 BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
223 BT,wake_gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
224 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
231 opp-hz = /bits/ 64 <408000000>;
232 opp-microvolt = <800000>;
233 clock-latency-ns = <40000>;
236 opp-hz = /bits/ 64 <600000000>;
237 opp-microvolt = <800000>;
240 opp-hz = /bits/ 64 <816000000>;
241 opp-microvolt = <800000>;
244 opp-hz = /bits/ 64 <1008000000>;
245 opp-microvolt = <875000>;
248 opp-hz = /bits/ 64 <1200000000>;
249 opp-microvolt = <925000>;
252 opp-hz = /bits/ 64 <1416000000>;
253 opp-microvolt = <1050000>;
256 opp-hz = /bits/ 64 <1512000000>;
257 opp-microvolt = <1075000>;
263 opp-hz = /bits/ 64 <408000000>;
264 opp-microvolt = <800000>;
265 clock-latency-ns = <40000>;
268 opp-hz = /bits/ 64 <600000000>;
269 opp-microvolt = <800000>;
272 opp-hz = /bits/ 64 <816000000>;
273 opp-microvolt = <825000>;
276 opp-hz = /bits/ 64 <1008000000>;
277 opp-microvolt = <875000>;
280 opp-hz = /bits/ 64 <1200000000>;
281 opp-microvolt = <950000>;
284 opp-hz = /bits/ 64 <1416000000>;
285 opp-microvolt = <1025000>;
288 opp-hz = /bits/ 64 <1608000000>;
289 opp-microvolt = <1100000>;
292 opp-hz = /bits/ 64 <1800000000>;
293 opp-microvolt = <1175000>;
296 opp-hz = /bits/ 64 <1992000000>;
297 opp-microvolt = <1250000>;
302 compatible = "operating-points-v2";
305 opp-hz = /bits/ 64 <200000000>;
306 opp-microvolt = <800000>;
309 opp-hz = /bits/ 64 <300000000>;
310 opp-microvolt = <800000>;
313 opp-hz = /bits/ 64 <400000000>;
314 opp-microvolt = <800000>;
317 opp-hz = /bits/ 64 <500000000>;
318 opp-microvolt = <850000>;
321 opp-hz = /bits/ 64 <600000000>;
322 opp-microvolt = <900000>;
325 opp-hz = /bits/ 64 <700000000>;
326 opp-microvolt = <950000>;
329 opp-hz = /bits/ 64 <800000000>;
330 opp-microvolt = <975000>;
335 clock-frequency = <150000000>;
336 clock-freq-min-max = <400000 150000000>;
344 vqmmc-supply = <&vcc_sd>;
345 pinctrl-names = "default";
346 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
351 clock-frequency = <50000000>;
352 clock-freq-min-max = <200000 50000000>;
358 keep-power-in-suspend;
359 mmc-pwrseq = <&sdio_pwrseq>;
362 pinctrl-names = "default";
363 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
369 freq-sel = <200000000>;
380 mmc-hs400-enhanced-strobe;
386 rockchip,i2s-broken-burst-len;
387 rockchip,playback-channels = <8>;
388 rockchip,capture-channels = <8>;
389 #sound-dai-cells = <0>;
393 #sound-dai-cells = <0>;
398 #sound-dai-cells = <0>;
403 i2c-scl-rising-time-ns = <219>;
404 i2c-scl-falling-time-ns = <15>;
405 clock-frequency = <400000>;
407 vdd_cpu_b: syr827@40 {
408 compatible = "silergy,syr827";
410 vin-supply = <&vcc_sys>;
411 regulator-compatible = "fan53555-reg";
412 regulator-name = "vdd_cpu_b";
413 regulator-min-microvolt = <712500>;
414 regulator-max-microvolt = <1500000>;
415 regulator-ramp-delay = <1000>;
416 fcs,suspend-voltage-selector = <1>;
418 regulator-initial-state = <3>;
419 regulator-state-mem {
420 regulator-off-in-suspend;
425 compatible = "silergy,syr828";
427 vin-supply = <&vcc_sys>;
428 regulator-compatible = "fan53555-reg";
429 regulator-name = "vdd_gpu";
430 regulator-min-microvolt = <712500>;
431 regulator-max-microvolt = <1500000>;
432 regulator-ramp-delay = <1000>;
433 fcs,suspend-voltage-selector = <1>;
436 regulator-initial-state = <3>;
437 regulator-state-mem {
438 regulator-off-in-suspend;
443 compatible = "rockchip,rk818";
446 clock-output-names = "xin32k", "wifibt_32kin";
447 interrupt-parent = <&gpio1>;
448 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
449 pinctrl-names = "default";
450 pinctrl-0 = <&pmic_int_l>;
451 rockchip,system-power-controller;
455 vcc1-supply = <&vcc_sys>;
456 vcc2-supply = <&vcc_sys>;
457 vcc3-supply = <&vcc_sys>;
458 vcc4-supply = <&vcc_sys>;
459 vcc6-supply = <&vcc_sys>;
460 vcc7-supply = <&vcc3v3_sys>;
461 vcc8-supply = <&vcc_sys>;
462 vcc9-supply = <&vcc3v3_sys>;
465 vdd_cpu_l: DCDC_REG1 {
466 regulator-name = "vdd_cpu_l";
469 regulator-min-microvolt = <750000>;
470 regulator-max-microvolt = <1350000>;
471 regulator-ramp-delay = <6001>;
472 regulator-state-mem {
473 regulator-off-in-suspend;
477 vdd_center: DCDC_REG2 {
478 regulator-name = "vdd_center";
481 regulator-min-microvolt = <800000>;
482 regulator-max-microvolt = <1350000>;
483 regulator-ramp-delay = <6001>;
484 regulator-state-mem {
485 regulator-on-in-suspend;
486 regulator-suspend-microvolt = <1000000>;
491 regulator-name = "vcc_ddr";
494 regulator-state-mem {
495 regulator-on-in-suspend;
500 regulator-name = "vcc_1v8";
503 regulator-min-microvolt = <1800000>;
504 regulator-max-microvolt = <1800000>;
505 regulator-state-mem {
506 regulator-on-in-suspend;
507 regulator-suspend-microvolt = <1800000>;
511 vcca3v0_codec: LDO_REG1 {
514 regulator-min-microvolt = <3000000>;
515 regulator-max-microvolt = <3000000>;
516 regulator-name = "vcca3v0_codec";
517 regulator-state-mem {
518 regulator-off-in-suspend;
522 vcc3v0_tp: LDO_REG2 {
525 regulator-min-microvolt = <3000000>;
526 regulator-max-microvolt = <3000000>;
527 regulator-name = "vcc3v0_tp";
528 regulator-state-mem {
529 regulator-off-in-suspend;
533 vcca1v8_codec: LDO_REG3 {
536 regulator-min-microvolt = <1800000>;
537 regulator-max-microvolt = <1800000>;
538 regulator-name = "vcca1v8_codec";
539 regulator-state-mem {
540 regulator-off-in-suspend;
544 vcc_power_on: LDO_REG4 {
547 regulator-min-microvolt = <3300000>;
548 regulator-max-microvolt = <3300000>;
549 regulator-name = "vcc_power_on";
550 regulator-state-mem {
551 regulator-on-in-suspend;
552 regulator-suspend-microvolt = <3300000>;
559 regulator-min-microvolt = <3000000>;
560 regulator-max-microvolt = <3000000>;
561 regulator-name = "vcc_3v0";
562 regulator-state-mem {
563 regulator-on-in-suspend;
564 regulator-suspend-microvolt = <3000000>;
571 regulator-min-microvolt = <1500000>;
572 regulator-max-microvolt = <1500000>;
573 regulator-name = "vcc_1v5";
574 regulator-state-mem {
575 regulator-on-in-suspend;
576 regulator-suspend-microvolt = <1500000>;
580 vcc1v8_dvp: LDO_REG7 {
583 regulator-min-microvolt = <1800000>;
584 regulator-max-microvolt = <1800000>;
585 regulator-name = "vcc1v8_dvp";
586 regulator-state-mem {
587 regulator-on-in-suspend;
588 regulator-suspend-microvolt = <1800000>;
592 vcc3v3_s3: LDO_REG8 {
595 regulator-min-microvolt = <3300000>;
596 regulator-max-microvolt = <3300000>;
597 regulator-name = "vcc3v3_s3";
598 regulator-state-mem {
599 regulator-on-in-suspend;
600 regulator-suspend-microvolt = <3300000>;
607 regulator-min-microvolt = <1800000>;
608 regulator-max-microvolt = <3300000>;
609 regulator-name = "vcc_sd";
610 regulator-state-mem {
611 regulator-on-in-suspend;
612 regulator-suspend-microvolt = <3300000>;
616 vcc3v3_s0: SWITCH_REG {
619 regulator-name = "vcc3v3_s0";
620 regulator-state-mem {
621 regulator-on-in-suspend;
627 compatible = "rk818-battery";
629 3400 3599 3671 3701 3728 3746 3762
630 3772 3781 3792 3816 3836 3866 3910
631 3942 3971 4002 4050 4088 4132 4183>;
632 design_capacity = <4000>;
633 design_qmax = <4100>;
635 max_input_current = <2000>;
636 max_chrg_current = <1800>;
637 max_chrg_voltage = <4200>;
638 sleep_enter_current = <300>;
639 sleep_exit_current = <300>;
640 power_off_thresd = <3400>;
641 zero_algorithm_vol = <3850>;
642 fb_temperature = <115>;
644 max_soc_offset = <60>;
655 i2c-scl-rising-time-ns = <164>;
656 i2c-scl-falling-time-ns = <15>;
659 #sound-dai-cells = <0>;
660 compatible = "everest,es8316";
662 clocks = <&cru SCLK_I2S_8CH_OUT>;
663 clock-names = "mclk";
664 spk-con-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
665 hp-det-gpio = <&gpio4 28 GPIO_ACTIVE_LOW>;
671 i2c-scl-rising-time-ns = <600>;
672 i2c-scl-falling-time-ns = <20>;
679 compatible = "gslX680";
681 touch-gpio = <&gpio1 20 IRQ_TYPE_LEVEL_LOW>;
682 reset-gpio = <&gpio4 22 GPIO_ACTIVE_LOW>;
691 max-freq = <50000000>;
694 compatible = "inv-spi,mpu6500";
695 pinctrl-names = "default";
696 pinctrl-0 = <&mpu6500_irq_gpio>;
697 irq-gpio = <&gpio1 4 IRQ_TYPE_EDGE_RISING>;
699 spi-max-frequency = <1000000>;
702 mpu-int_config = <0x00>;
703 mpu-level_shifter = <0>;
704 mpu-orientation = <1 0 0 0 1 0 0 0 1>;
713 rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
714 rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
723 compatible = "rockchip,key";
725 io-channels = <&saradc 1>;
730 rockchip,adc_value = <340>;
735 label = "volume down";
736 rockchip,adc_value = <170>;
740 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
749 rockchip,adc_value = <620>;
754 label = "brightness";
755 rockchip,adc_value = <700>;
762 u2phy0_host: host-port {
763 phy-supply = <&vcc5v0_host>;
771 u2phy1_host: host-port {
772 phy-supply = <&vcc5v0_host>;
778 pinctrl-names = "default";
779 pinctrl-0 = <&uart0_xfer &uart0_cts>;
828 rockchip,pwm_id= <3>;
829 rockchip,pwm_voltage = <900000>;
833 assigned-clocks = <&cru PLL_VPLL>;
834 assigned-clock-rates = <245000000>;
835 #include <dt-bindings/display/screen-timing/lcd-ls055r1sx04-mipi.dtsi>
839 rockchip,uboot-logo-on = <1>;
844 power_ctr: power_ctr {
846 rockchip,power_type = <GPIO>;
847 gpios = <&gpio3 5 GPIO_ACTIVE_HIGH>;
848 rockchip,delay = <10>;
851 rockchip,power_type = <GPIO>;
852 gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>;
853 rockchip,delay = <10>;
871 cpu-supply = <&vdd_cpu_l>;
875 cpu-supply = <&vdd_cpu_l>;
879 cpu-supply = <&vdd_cpu_l>;
883 cpu-supply = <&vdd_cpu_l>;
887 cpu-supply = <&vdd_cpu_b>;
891 cpu-supply = <&vdd_cpu_b>;
896 mali-supply = <&vdd_gpu>;
901 wifi_enable_h: wifi-enable-h {
902 rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
907 uart0_gpios: uart0-gpios {
908 rockchip,pins = <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
913 pmic_int_l: pmic-int-l {
915 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
918 pmic_dvs2: pmic-dvs2 {
920 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
925 mpu6500_irq_gpio: mpu6500-irq-gpio {
926 rockchip,pins = <1 4 RK_FUNC_GPIO &pcfg_pull_none>;
931 host_vbus_drv: host-vbus-drv {
933 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;