2 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
44 #include <dt-bindings/pwm/pwm.h>
45 #include "rk3399.dtsi"
46 #include "rk3399-android.dtsi"
49 model = "Rockchip RK3399 VR Board";
50 compatible = "rockchip,vr", "rockchip,rk3399";
53 compatible = "pwm-regulator";
54 pwms = <&pwm2 0 25000 0>;
56 rockchip,pwm_voltage = <900000>;
57 regulator-name = "vdd_log";
58 regulator-min-microvolt = <800000>;
59 regulator-max-microvolt = <1400000>;
64 compatible = "regulator-fixed";
65 regulator-name = "vcc_sys";
68 regulator-min-microvolt = <4000000>;
69 regulator-max-microvolt = <4000000>;
71 vcc3v3_sys: vcc3v3-sys {
72 compatible = "regulator-fixed";
73 regulator-name = "vcc3v3_sys";
76 regulator-min-microvolt = <3300000>;
77 regulator-max-microvolt = <3300000>;
80 backlight: backlight {
81 compatible = "pwm-backlight";
82 pwms = <&pwm0 0 25000 0>;
86 16 17 18 19 20 21 22 23
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95 88 89 90 91 92 93 94 95
96 96 97 98 99 100 101 102 103
97 104 105 106 107 108 109 110 111
98 112 113 114 115 116 117 118 119
99 120 121 122 123 124 125 126 127
100 128 129 130 131 132 133 134 135
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107 184 185 186 187 188 189 190 191
108 192 193 194 195 196 197 198 199
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111 216 217 218 219 220 221 222 223
112 224 225 226 227 228 229 230 231
113 232 233 234 235 236 237 238 239
114 240 241 242 243 244 245 246 247
115 248 249 250 251 252 253 254 255>;
116 default-brightness-level = <100>;
119 vcc_phy: vcc-phy-regulator {
120 compatible = "regulator-fixed";
121 regulator-name = "vcc_phy";
127 compatible = "rockchip,rk3399-io-voltage-domain";
128 rockchip,grf = <&grf>;
130 bt656-supply = <&vcc1v8_dvp>;
131 audio-supply = <&vcca1v8_codec>;
132 sdmmc-supply = <&vcc_sd>;
133 gpio1830-supply = <&vcc_3v0>;
137 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
138 rockchip,grf = <&pmugrf>;
140 pmu1830-supply = <&vcc_1v8>;
144 compatible = "simple-audio-card";
145 simple-audio-card,format = "i2s";
146 simple-audio-card,name = "rockchip,es8316-codec";
147 simple-audio-card,mclk-fs = <256>;
148 simple-audio-card,widgets =
149 "Microphone", "Mic Jack",
150 "Headphone", "Headphone Jack";
151 simple-audio-card,routing =
152 "Mic Jack", "MICBIAS1",
154 "Headphone Jack", "HPOL",
155 "Headphone Jack", "HPOR";
156 simple-audio-card,cpu {
159 simple-audio-card,codec {
160 sound-dai = <&es8316>;
165 compatible = "simple-audio-card";
166 simple-audio-card,name = "rockchip,spdif";
167 simple-audio-card,cpu {
168 sound-dai = <&spdif>;
170 simple-audio-card,codec {
171 sound-dai = <&spdif_out>;
175 spdif_out: spdif-out {
176 compatible = "linux,spdif-dit";
177 #sound-dai-cells = <0>;
180 sdio_pwrseq: sdio-pwrseq {
181 compatible = "mmc-pwrseq-simple";
183 clock-names = "ext_clock";
184 pinctrl-names = "default";
185 pinctrl-0 = <&wifi_enable_h>;
188 * On the module itself this is one of these (depending
189 * on the actual card populated):
190 * - SDIO_RESET_L_WL_REG_ON
191 * - PDN (power down when low)
193 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
197 compatible = "wlan-platdata";
198 rockchip,grf = <&grf>;
199 wifi_chip_type = "ap6330";
201 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
206 compatible = "bluetooth-platdata";
207 //wifi-bt-power-toggle;
208 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
209 pinctrl-names = "default", "rts_gpio";
210 pinctrl-0 = <&uart0_rts>;
211 pinctrl-1 = <&uart0_gpios>;
212 //BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
213 BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
214 BT,wake_gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
215 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
221 clock-frequency = <150000000>;
222 clock-freq-min-max = <400000 150000000>;
230 vqmmc-supply = <&vcc_sd>;
231 pinctrl-names = "default";
232 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
237 clock-frequency = <50000000>;
238 clock-freq-min-max = <200000 50000000>;
244 keep-power-in-suspend;
245 mmc-pwrseq = <&sdio_pwrseq>;
248 pinctrl-names = "default";
249 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
255 freq-sel = <200000000>;
266 mmc-hs400-enhanced-strobe;
272 rockchip,i2s-broken-burst-len;
273 rockchip,playback-channels = <8>;
274 rockchip,capture-channels = <8>;
275 #sound-dai-cells = <0>;
280 #sound-dai-cells = <0>;
285 i2c-scl-rising-time-ns = <219>;
286 i2c-scl-falling-time-ns = <15>;
287 clock-frequency = <400000>;
289 vdd_cpu_b: syr828@41 {
290 compatible = "silergy,syr828";
292 vin-supply = <&vcc_sys>;
293 regulator-compatible = "fan53555-reg";
294 regulator-name = "vdd_cpu_b";
295 regulator-min-microvolt = <712500>;
296 regulator-max-microvolt = <1500000>;
297 regulator-ramp-delay = <1000>;
298 fcs,suspend-voltage-selector = <1>;
301 regulator-initial-state = <3>;
302 regulator-state-mem {
303 regulator-off-in-suspend;
308 compatible = "ti,lp8752";
310 vin0-supply = <&vcc_sys>;
312 vdd_gpu: lp8752_buck0 {
313 regulator-name = "vdd_gpu";
314 regulator-min-microvolt = <735000>;
315 regulator-max-microvolt = <1400000>;
323 compatible = "rockchip,rk818";
326 clock-output-names = "xin32k", "wifibt_32kin";
327 interrupt-parent = <&gpio1>;
328 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
329 pinctrl-names = "default";
330 pinctrl-0 = <&pmic_int_l>;
331 rockchip,system-power-controller;
335 vcc1-supply = <&vcc_sys>;
336 vcc2-supply = <&vcc_sys>;
337 vcc3-supply = <&vcc_sys>;
338 vcc4-supply = <&vcc_sys>;
339 vcc6-supply = <&vcc_sys>;
340 vcc7-supply = <&vcc3v3_sys>;
341 vcc8-supply = <&vcc_sys>;
342 vcc9-supply = <&vcc3v3_sys>;
345 vdd_cpu_l: DCDC_REG1 {
346 regulator-name = "vdd_cpu_l";
349 regulator-min-microvolt = <750000>;
350 regulator-max-microvolt = <1350000>;
351 regulator-ramp-delay = <6001>;
352 regulator-state-mem {
353 regulator-off-in-suspend;
357 vdd_center: DCDC_REG2 {
358 regulator-name = "vdd_center";
361 regulator-min-microvolt = <800000>;
362 regulator-max-microvolt = <1350000>;
363 regulator-ramp-delay = <6001>;
364 regulator-state-mem {
365 regulator-on-in-suspend;
366 regulator-suspend-microvolt = <1000000>;
371 regulator-name = "vcc_ddr";
374 regulator-state-mem {
375 regulator-on-in-suspend;
380 regulator-name = "vcc_1v8";
383 regulator-min-microvolt = <1800000>;
384 regulator-max-microvolt = <1800000>;
385 regulator-state-mem {
386 regulator-on-in-suspend;
387 regulator-suspend-microvolt = <1800000>;
391 vcca3v0_codec: LDO_REG1 {
394 regulator-min-microvolt = <3000000>;
395 regulator-max-microvolt = <3000000>;
396 regulator-name = "vcca3v0_codec";
397 regulator-state-mem {
398 regulator-off-in-suspend;
402 vcc3v0_tp: LDO_REG2 {
405 regulator-min-microvolt = <3000000>;
406 regulator-max-microvolt = <3000000>;
407 regulator-name = "vcc3v0_tp";
408 regulator-state-mem {
409 regulator-off-in-suspend;
413 vcca1v8_codec: LDO_REG3 {
416 regulator-min-microvolt = <1800000>;
417 regulator-max-microvolt = <1800000>;
418 regulator-name = "vcca1v8_codec";
419 regulator-state-mem {
420 regulator-off-in-suspend;
424 vcc_power_on: LDO_REG4 {
427 regulator-min-microvolt = <3300000>;
428 regulator-max-microvolt = <3300000>;
429 regulator-name = "vcc_power_on";
430 regulator-state-mem {
431 regulator-on-in-suspend;
432 regulator-suspend-microvolt = <3300000>;
439 regulator-min-microvolt = <3000000>;
440 regulator-max-microvolt = <3000000>;
441 regulator-name = "vcc_3v0";
442 regulator-state-mem {
443 regulator-on-in-suspend;
444 regulator-suspend-microvolt = <3000000>;
451 regulator-min-microvolt = <1500000>;
452 regulator-max-microvolt = <1500000>;
453 regulator-name = "vcc_1v5";
454 regulator-state-mem {
455 regulator-on-in-suspend;
456 regulator-suspend-microvolt = <1500000>;
460 vcc1v8_dvp: LDO_REG7 {
463 regulator-min-microvolt = <1800000>;
464 regulator-max-microvolt = <1800000>;
465 regulator-name = "vcc1v8_dvp";
466 regulator-state-mem {
467 regulator-on-in-suspend;
468 regulator-suspend-microvolt = <1800000>;
472 vcc3v3_s3: LDO_REG8 {
475 regulator-min-microvolt = <3300000>;
476 regulator-max-microvolt = <3300000>;
477 regulator-name = "vcc3v3_s3";
478 regulator-state-mem {
479 regulator-on-in-suspend;
480 regulator-suspend-microvolt = <3300000>;
487 regulator-min-microvolt = <1800000>;
488 regulator-max-microvolt = <3300000>;
489 regulator-name = "vcc_sd";
490 regulator-state-mem {
491 regulator-on-in-suspend;
492 regulator-suspend-microvolt = <3300000>;
496 vcc3v3_s0: SWITCH_REG {
499 regulator-name = "vcc3v3_s0";
500 regulator-state-mem {
501 regulator-on-in-suspend;
510 i2c-scl-rising-time-ns = <164>;
511 i2c-scl-falling-time-ns = <15>;
514 #sound-dai-cells = <0>;
515 compatible = "everest,es8316";
517 clocks = <&cru SCLK_I2S_8CH_OUT>;
518 clock-names = "mclk";
519 spk-con-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
520 hp-det-gpio = <&gpio4 28 GPIO_ACTIVE_LOW>;
526 i2c-scl-rising-time-ns = <600>;
527 i2c-scl-falling-time-ns = <20>;
531 compatible = "invensense,mpu6500";
532 pinctrl-names = "default";
533 pinctrl-0 = <&mpu6500_irq_gpio>;
535 irq-gpio = <&gpio1 4 IRQ_TYPE_EDGE_RISING>;
536 mpu-int_config = <0x10>;
537 mpu-level_shifter = <0>;
538 mpu-orientation = <0 1 0 1 0 0 0 0 1>;
548 max-freq = <50000000>;
551 compatible = "inv-spi,mpu6500";
552 pinctrl-names = "default";
553 pinctrl-0 = <&mpu6500_irq_gpio>;
554 irq-gpio = <&gpio1 4 IRQ_TYPE_EDGE_RISING>;
556 spi-max-frequency = <1000000>;
559 mpu-int_config = <0x00>;
560 mpu-level_shifter = <0>;
561 mpu-orientation = <1 0 0 0 1 0 0 0 1>;
570 rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
571 rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
576 pinctrl-names = "default";
577 pinctrl-0 = <&uart0_xfer &uart0_cts>;
586 vbus_drv-gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
630 rockchip,pwm_id= <3>;
631 rockchip,pwm_voltage = <900000>;
635 #include <dt-bindings/display/screen-timing/lcd-ls055r1sx04-mipi.dtsi>
640 power_ctr: power_ctr {
642 rockchip,power_type = <GPIO>;
643 gpios = <&gpio3 5 GPIO_ACTIVE_HIGH>;
644 rockchip,delay = <10>;
647 rockchip,power_type = <GPIO>;
648 gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>;
649 rockchip,delay = <10>;
667 cpu-supply = <&vdd_cpu_l>;
671 cpu-supply = <&vdd_cpu_l>;
675 cpu-supply = <&vdd_cpu_l>;
679 cpu-supply = <&vdd_cpu_l>;
683 cpu-supply = <&vdd_cpu_b>;
687 cpu-supply = <&vdd_cpu_b>;
692 mali-supply = <&vdd_gpu>;
697 wifi_enable_h: wifi-enable-h {
698 rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
703 uart0_gpios: uart0-gpios {
704 rockchip,pins = <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
709 pmic_int_l: pmic-int-l {
711 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
714 pmic_dvs2: pmic-dvs2 {
716 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
721 mpu6500_irq_gpio: mpu6500-irq-gpio {
722 rockchip,pins = <1 4 RK_FUNC_GPIO &pcfg_pull_none>;