2 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
44 #include <dt-bindings/pwm/pwm.h>
45 #include <dt-bindings/sensor-dev.h>
46 #include "rk3399.dtsi"
47 #include "rk3399-android.dtsi"
50 model = "Rockchip RK3399 VR Board";
51 compatible = "rockchip,vr", "rockchip,rk3399";
54 compatible = "pwm-regulator";
55 pwms = <&pwm2 0 25000 0>;
57 rockchip,pwm_voltage = <900000>;
58 regulator-name = "vdd_log";
59 regulator-min-microvolt = <800000>;
60 regulator-max-microvolt = <1400000>;
65 compatible = "regulator-fixed";
66 regulator-name = "vcc_sys";
69 regulator-min-microvolt = <4000000>;
70 regulator-max-microvolt = <4000000>;
72 vcc3v3_sys: vcc3v3-sys {
73 compatible = "regulator-fixed";
74 regulator-name = "vcc3v3_sys";
77 regulator-min-microvolt = <3300000>;
78 regulator-max-microvolt = <3300000>;
81 vcc5v0_host: vcc5v0-host-regulator {
82 compatible = "regulator-fixed";
84 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
85 pinctrl-names = "default";
86 pinctrl-0 = <&host_vbus_drv>;
87 regulator-name = "vcc5v0_host";
90 backlight: backlight {
91 compatible = "pwm-backlight";
92 pwms = <&pwm0 0 25000 0>;
96 16 17 18 19 20 21 22 23
97 24 25 26 27 28 29 30 31
98 32 33 34 35 36 37 38 39
99 40 41 42 43 44 45 46 47
100 48 49 50 51 52 53 54 55
101 56 57 58 59 60 61 62 63
102 64 65 66 67 68 69 70 71
103 72 73 74 75 76 77 78 79
104 80 81 82 83 84 85 86 87
105 88 89 90 91 92 93 94 95
106 96 97 98 99 100 101 102 103
107 104 105 106 107 108 109 110 111
108 112 113 114 115 116 117 118 119
109 120 121 122 123 124 125 126 127
110 128 129 130 131 132 133 134 135
111 136 137 138 139 140 141 142 143
112 144 145 146 147 148 149 150 151
113 152 153 154 155 156 157 158 159
114 160 161 162 163 164 165 166 167
115 168 169 170 171 172 173 174 175
116 176 177 178 179 180 181 182 183
117 184 185 186 187 188 189 190 191
118 192 193 194 195 196 197 198 199
119 200 201 202 203 204 205 206 207
120 208 209 210 211 212 213 214 215
121 216 217 218 219 220 221 222 223
122 224 225 226 227 228 229 230 231
123 232 233 234 235 236 237 238 239
124 240 241 242 243 244 245 246 247
125 248 249 250 251 252 253 254 255>;
126 default-brightness-level = <100>;
129 vcc_phy: vcc-phy-regulator {
130 compatible = "regulator-fixed";
131 regulator-name = "vcc_phy";
137 compatible = "rockchip,rk3399-io-voltage-domain";
138 rockchip,grf = <&grf>;
140 bt656-supply = <&vcc1v8_dvp>;
141 audio-supply = <&vcca1v8_codec>;
142 sdmmc-supply = <&vcc_sd>;
143 gpio1830-supply = <&vcc_3v0>;
147 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
148 rockchip,grf = <&pmugrf>;
150 pmu1830-supply = <&vcc_1v8>;
154 compatible = "simple-audio-card";
155 simple-audio-card,format = "i2s";
156 simple-audio-card,name = "rockchip,es8316-codec";
157 simple-audio-card,mclk-fs = <256>;
158 simple-audio-card,widgets =
159 "Microphone", "Mic Jack",
160 "Headphone", "Headphone Jack";
161 simple-audio-card,routing =
162 "Mic Jack", "MICBIAS1",
164 "Headphone Jack", "HPOL",
165 "Headphone Jack", "HPOR";
166 simple-audio-card,cpu {
169 simple-audio-card,codec {
170 sound-dai = <&es8316>;
175 compatible = "simple-audio-card";
176 simple-audio-card,name = "rockchip,spdif";
177 simple-audio-card,cpu {
178 sound-dai = <&spdif>;
180 simple-audio-card,codec {
181 sound-dai = <&spdif_out>;
185 spdif_out: spdif-out {
186 compatible = "linux,spdif-dit";
187 #sound-dai-cells = <0>;
190 sdio_pwrseq: sdio-pwrseq {
191 compatible = "mmc-pwrseq-simple";
193 clock-names = "ext_clock";
194 pinctrl-names = "default";
195 pinctrl-0 = <&wifi_enable_h>;
198 * On the module itself this is one of these (depending
199 * on the actual card populated):
200 * - SDIO_RESET_L_WL_REG_ON
201 * - PDN (power down when low)
203 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
207 compatible = "wlan-platdata";
208 rockchip,grf = <&grf>;
209 wifi_chip_type = "ap6330";
211 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
216 compatible = "bluetooth-platdata";
218 clock-names = "ext_clock";
219 //wifi-bt-power-toggle;
220 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
221 pinctrl-names = "default", "rts_gpio";
222 pinctrl-0 = <&uart0_rts>;
223 pinctrl-1 = <&uart0_gpios>;
224 //BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
225 BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
226 BT,wake_gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
227 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
232 compatible = "rockchip,uboot-charge";
233 rockchip,uboot-charge-on = <0>;
234 rockchip,android-charge-on = <1>;
240 opp-hz = /bits/ 64 <408000000>;
241 opp-microvolt = <800000>;
242 clock-latency-ns = <40000>;
245 opp-hz = /bits/ 64 <600000000>;
246 opp-microvolt = <800000>;
249 opp-hz = /bits/ 64 <816000000>;
250 opp-microvolt = <800000>;
253 opp-hz = /bits/ 64 <1008000000>;
254 opp-microvolt = <875000>;
257 opp-hz = /bits/ 64 <1200000000>;
258 opp-microvolt = <925000>;
261 opp-hz = /bits/ 64 <1416000000>;
262 opp-microvolt = <1050000>;
265 opp-hz = /bits/ 64 <1512000000>;
266 opp-microvolt = <1075000>;
272 opp-hz = /bits/ 64 <408000000>;
273 opp-microvolt = <800000>;
274 clock-latency-ns = <40000>;
277 opp-hz = /bits/ 64 <600000000>;
278 opp-microvolt = <800000>;
281 opp-hz = /bits/ 64 <816000000>;
282 opp-microvolt = <825000>;
285 opp-hz = /bits/ 64 <1008000000>;
286 opp-microvolt = <875000>;
289 opp-hz = /bits/ 64 <1200000000>;
290 opp-microvolt = <950000>;
293 opp-hz = /bits/ 64 <1416000000>;
294 opp-microvolt = <1025000>;
297 opp-hz = /bits/ 64 <1608000000>;
298 opp-microvolt = <1100000>;
301 opp-hz = /bits/ 64 <1800000000>;
302 opp-microvolt = <1175000>;
305 opp-hz = /bits/ 64 <1992000000>;
306 opp-microvolt = <1250000>;
315 518 335 /* 1008MHz */
316 617 428 /* 1200MHz */
317 728 573 /* 1416MHz */
318 827 724 /* 1608MHz */
319 925 900 /* 1800MHz */
320 1024 1108 /* 1992MHz */
351 518 335 /* 1008MHz */
352 617 428 /* 1200MHz */
353 728 573 /* 1416MHz */
354 827 724 /* 1608MHz */
355 925 900 /* 1800MHz */
356 1024 1108 /* 1992MHz */
383 compatible = "operating-points-v2";
386 opp-hz = /bits/ 64 <200000000>;
387 opp-microvolt = <825000>;
391 opp-hz = /bits/ 64 <300000000>;
392 opp-microvolt = <850000>;
395 opp-hz = /bits/ 64 <400000000>;
396 opp-microvolt = <875000>;
400 opp-hz = /bits/ 64 <500000000>;
401 opp-microvolt = <925000>;
405 opp-hz = /bits/ 64 <600000000>;
406 opp-microvolt = <975000>;
410 opp-hz = /bits/ 64 <800000000>;
411 opp-microvolt = <1025000>;
416 clock-frequency = <150000000>;
417 clock-freq-min-max = <400000 150000000>;
425 vqmmc-supply = <&vcc_sd>;
426 pinctrl-names = "default";
427 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
432 clock-frequency = <50000000>;
433 clock-freq-min-max = <200000 50000000>;
439 keep-power-in-suspend;
440 mmc-pwrseq = <&sdio_pwrseq>;
443 pinctrl-names = "default";
444 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
450 freq-sel = <200000000>;
461 mmc-hs400-enhanced-strobe;
467 rockchip,i2s-broken-burst-len;
468 rockchip,playback-channels = <8>;
469 rockchip,capture-channels = <8>;
470 #sound-dai-cells = <0>;
474 #sound-dai-cells = <0>;
479 #sound-dai-cells = <0>;
484 i2c-scl-rising-time-ns = <219>;
485 i2c-scl-falling-time-ns = <15>;
486 clock-frequency = <400000>;
488 vdd_cpu_b: syr827@40 {
489 compatible = "silergy,syr827";
491 vin-supply = <&vcc_sys>;
492 regulator-compatible = "fan53555-reg";
493 regulator-name = "vdd_cpu_b";
494 regulator-min-microvolt = <712500>;
495 regulator-max-microvolt = <1500000>;
496 regulator-ramp-delay = <1000>;
497 fcs,suspend-voltage-selector = <1>;
499 regulator-initial-state = <3>;
500 regulator-state-mem {
501 regulator-off-in-suspend;
506 compatible = "silergy,syr828";
508 vin-supply = <&vcc_sys>;
509 regulator-compatible = "fan53555-reg";
510 regulator-name = "vdd_gpu";
511 regulator-min-microvolt = <712500>;
512 regulator-max-microvolt = <1500000>;
513 regulator-ramp-delay = <1000>;
514 fcs,suspend-voltage-selector = <1>;
517 regulator-initial-state = <3>;
518 regulator-state-mem {
519 regulator-off-in-suspend;
524 compatible = "rockchip,rk818";
527 clock-output-names = "xin32k", "wifibt_32kin";
528 interrupt-parent = <&gpio1>;
529 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
530 pinctrl-names = "default";
531 pinctrl-0 = <&pmic_int_l>;
532 rockchip,system-power-controller;
537 vcc1-supply = <&vcc_sys>;
538 vcc2-supply = <&vcc_sys>;
539 vcc3-supply = <&vcc_sys>;
540 vcc4-supply = <&vcc_sys>;
541 vcc6-supply = <&vcc_sys>;
542 vcc7-supply = <&vcc3v3_sys>;
543 vcc8-supply = <&vcc_sys>;
544 vcc9-supply = <&vcc3v3_sys>;
547 vdd_cpu_l: DCDC_REG1 {
548 regulator-name = "vdd_cpu_l";
551 regulator-min-microvolt = <750000>;
552 regulator-max-microvolt = <1350000>;
553 regulator-ramp-delay = <6001>;
554 regulator-state-mem {
555 regulator-off-in-suspend;
559 vdd_center: DCDC_REG2 {
560 regulator-name = "vdd_center";
563 regulator-min-microvolt = <800000>;
564 regulator-max-microvolt = <1350000>;
565 regulator-ramp-delay = <6001>;
566 regulator-state-mem {
567 regulator-on-in-suspend;
568 regulator-suspend-microvolt = <1000000>;
573 regulator-name = "vcc_ddr";
576 regulator-state-mem {
577 regulator-on-in-suspend;
582 regulator-name = "vcc_1v8";
585 regulator-min-microvolt = <1800000>;
586 regulator-max-microvolt = <1800000>;
587 regulator-state-mem {
588 regulator-on-in-suspend;
589 regulator-suspend-microvolt = <1800000>;
593 vcca3v0_codec: LDO_REG1 {
596 regulator-min-microvolt = <3000000>;
597 regulator-max-microvolt = <3000000>;
598 regulator-name = "vcca3v0_codec";
599 regulator-state-mem {
600 regulator-off-in-suspend;
604 vcc3v0_tp: LDO_REG2 {
607 regulator-min-microvolt = <3000000>;
608 regulator-max-microvolt = <3000000>;
609 regulator-name = "vcc3v0_tp";
610 regulator-state-mem {
611 regulator-off-in-suspend;
615 vcca1v8_codec: LDO_REG3 {
618 regulator-min-microvolt = <1800000>;
619 regulator-max-microvolt = <1800000>;
620 regulator-name = "vcca1v8_codec";
621 regulator-state-mem {
622 regulator-off-in-suspend;
626 vcc_power_on: LDO_REG4 {
629 regulator-min-microvolt = <3300000>;
630 regulator-max-microvolt = <3300000>;
631 regulator-name = "vcc_power_on";
632 regulator-state-mem {
633 regulator-on-in-suspend;
634 regulator-suspend-microvolt = <3300000>;
641 regulator-min-microvolt = <3000000>;
642 regulator-max-microvolt = <3000000>;
643 regulator-name = "vcc_3v0";
644 regulator-state-mem {
645 regulator-on-in-suspend;
646 regulator-suspend-microvolt = <3000000>;
653 regulator-min-microvolt = <1500000>;
654 regulator-max-microvolt = <1500000>;
655 regulator-name = "vcc_1v5";
656 regulator-state-mem {
657 regulator-on-in-suspend;
658 regulator-suspend-microvolt = <1500000>;
662 vcc1v8_dvp: LDO_REG7 {
665 regulator-min-microvolt = <1800000>;
666 regulator-max-microvolt = <1800000>;
667 regulator-name = "vcc1v8_dvp";
668 regulator-state-mem {
669 regulator-on-in-suspend;
670 regulator-suspend-microvolt = <1800000>;
674 vcc3v3_s3: LDO_REG8 {
677 regulator-min-microvolt = <3300000>;
678 regulator-max-microvolt = <3300000>;
679 regulator-name = "vcc3v3_s3";
680 regulator-state-mem {
681 regulator-on-in-suspend;
682 regulator-suspend-microvolt = <3300000>;
689 regulator-min-microvolt = <1800000>;
690 regulator-max-microvolt = <3300000>;
691 regulator-name = "vcc_sd";
692 regulator-state-mem {
693 regulator-on-in-suspend;
694 regulator-suspend-microvolt = <3300000>;
698 vcc3v3_s0: SWITCH_REG {
701 regulator-name = "vcc3v3_s0";
702 regulator-state-mem {
703 regulator-on-in-suspend;
709 compatible = "rk818-battery";
711 3400 3599 3671 3701 3728 3746 3762
712 3772 3781 3792 3816 3836 3866 3910
713 3942 3971 4002 4050 4088 4132 4183>;
714 design_capacity = <4000>;
715 design_qmax = <4100>;
717 max_input_current = <2000>;
718 max_chrg_current = <1800>;
719 max_chrg_voltage = <4200>;
720 sleep_enter_current = <300>;
721 sleep_exit_current = <300>;
722 power_off_thresd = <3400>;
723 zero_algorithm_vol = <3850>;
724 fb_temperature = <115>;
726 max_soc_offset = <60>;
737 i2c-scl-rising-time-ns = <164>;
738 i2c-scl-falling-time-ns = <15>;
741 #sound-dai-cells = <0>;
742 compatible = "everest,es8316";
744 clocks = <&cru SCLK_I2S_8CH_OUT>;
745 clock-names = "mclk";
746 spk-con-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
747 hp-det-gpio = <&gpio4 28 GPIO_ACTIVE_LOW>;
753 i2c-scl-rising-time-ns = <345>;
754 i2c-scl-falling-time-ns = <11>;
755 clock-frequency = <400000>;
759 compatible = "ak8963";
760 pinctrl-names = "default";
761 pinctrl-0 = <&ak8963_irq_gpio>;
763 type = <SENSOR_TYPE_COMPASS>;
764 irq-gpio = <&gpio1 0 IRQ_TYPE_EDGE_RISING>;
766 poll_delay_ms = <30>;
771 compatible = "fairchild,fusb302";
773 pinctrl-names = "default";
774 pinctrl-0 = <&fusb0_int>;
775 int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
784 compatible = "gslX680";
786 touch-gpio = <&gpio1 20 IRQ_TYPE_LEVEL_LOW>;
787 reset-gpio = <&gpio4 22 GPIO_ACTIVE_LOW>;
796 max-freq = <50000000>;
797 pinctrl-names = "default", "sleep";
798 pinctrl-1 = <&spi1_gpio>;
801 compatible = "inv-spi,mpu6500";
802 pinctrl-names = "default";
803 pinctrl-0 = <&mpu6500_irq_gpio>;
804 irq-gpio = <&gpio1 4 IRQ_TYPE_EDGE_RISING>;
806 spi-max-frequency = <1000000>;
809 mpu-int_config = <0x00>;
810 mpu-level_shifter = <0>;
811 mpu-orientation = <1 0 0 0 1 0 0 0 1>;
820 rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
821 rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
830 compatible = "rockchip,key";
832 io-channels = <&saradc 1>;
837 rockchip,adc_value = <340>;
842 label = "volume down";
843 rockchip,adc_value = <170>;
847 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
856 rockchip,adc_value = <620>;
862 rockchip,adc_value = <700>;
870 u2phy0_otg: otg-port {
874 u2phy0_host: host-port {
875 phy-supply = <&vcc5v0_host>;
883 u2phy1_otg: otg-port {
887 u2phy1_host: host-port {
888 phy-supply = <&vcc5v0_host>;
894 pinctrl-names = "default";
895 pinctrl-0 = <&uart0_xfer &uart0_cts>;
950 rockchip,pwm_id= <3>;
951 rockchip,pwm_voltage = <900000>;
955 assigned-clocks = <&cru PLL_VPLL>;
956 assigned-clock-rates = <245000000>;
957 #include <dt-bindings/display/screen-timing/lcd-ls055r1sx04-mipi.dtsi>
961 rockchip,uboot-logo-on = <1>;
962 rockchip,disp-mode = <NO_DUAL>;
967 power_ctr: power_ctr {
969 rockchip,power_type = <GPIO>;
970 gpios = <&gpio3 5 GPIO_ACTIVE_HIGH>;
971 rockchip,delay = <10>;
974 rockchip,power_type = <GPIO>;
975 gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>;
976 rockchip,delay = <10>;
994 cpu-supply = <&vdd_cpu_l>;
998 cpu-supply = <&vdd_cpu_l>;
1002 cpu-supply = <&vdd_cpu_l>;
1006 cpu-supply = <&vdd_cpu_l>;
1010 cpu-supply = <&vdd_cpu_b>;
1014 cpu-supply = <&vdd_cpu_b>;
1019 mali-supply = <&vdd_gpu>;
1024 wifi_enable_h: wifi-enable-h {
1025 rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
1029 wireless-bluetooth {
1030 uart0_gpios: uart0-gpios {
1031 rockchip,pins = <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
1036 pmic_int_l: pmic-int-l {
1038 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
1041 pmic_dvs2: pmic-dvs2 {
1043 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
1048 mpu6500_irq_gpio: mpu6500-irq-gpio {
1049 rockchip,pins = <1 4 RK_FUNC_GPIO &pcfg_pull_none>;
1054 host_vbus_drv: host-vbus-drv {
1056 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
1061 ak8963_irq_gpio: ak8963-irq-gpio {
1062 rockchip,pins = <1 0 RK_FUNC_GPIO &pcfg_pull_none>;
1067 spi1_gpio: spi1-gpio {
1069 <1 7 RK_FUNC_GPIO &pcfg_output_low>,
1070 <1 8 RK_FUNC_GPIO &pcfg_output_low>,
1071 <1 9 RK_FUNC_GPIO &pcfg_output_low>,
1072 <1 10 RK_FUNC_GPIO &pcfg_output_low>;
1077 fusb0_int: fusb0-int {
1078 rockchip,pins = <1 2 RK_FUNC_GPIO &pcfg_pull_up>;