2 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
44 #include <dt-bindings/pwm/pwm.h>
45 #include <dt-bindings/sensor-dev.h>
46 #include "rk3399.dtsi"
47 #include "rk3399-android.dtsi"
48 #include "rk3399-opp.dtsi"
51 model = "Rockchip RK3399 VR Board";
52 compatible = "rockchip,vr", "rockchip,rk3399";
55 compatible = "pwm-regulator";
56 pwms = <&pwm2 0 25000 0>;
58 rockchip,pwm_voltage = <900000>;
59 regulator-name = "vdd_log";
60 regulator-min-microvolt = <800000>;
61 regulator-max-microvolt = <1400000>;
66 compatible = "regulator-fixed";
67 regulator-name = "vcc_sys";
70 regulator-min-microvolt = <4000000>;
71 regulator-max-microvolt = <4000000>;
73 vcc3v3_sys: vcc3v3-sys {
74 compatible = "regulator-fixed";
75 regulator-name = "vcc3v3_sys";
78 regulator-min-microvolt = <3300000>;
79 regulator-max-microvolt = <3300000>;
82 vcc5v0_host: vcc5v0-host-regulator {
83 compatible = "regulator-fixed";
85 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
86 pinctrl-names = "default";
87 pinctrl-0 = <&host_vbus_drv>;
88 regulator-name = "vcc5v0_host";
91 backlight: backlight {
92 compatible = "pwm-backlight";
93 pwms = <&pwm0 0 25000 0>;
97 16 17 18 19 20 21 22 23
98 24 25 26 27 28 29 30 31
99 32 33 34 35 36 37 38 39
100 40 41 42 43 44 45 46 47
101 48 49 50 51 52 53 54 55
102 56 57 58 59 60 61 62 63
103 64 65 66 67 68 69 70 71
104 72 73 74 75 76 77 78 79
105 80 81 82 83 84 85 86 87
106 88 89 90 91 92 93 94 95
107 96 97 98 99 100 101 102 103
108 104 105 106 107 108 109 110 111
109 112 113 114 115 116 117 118 119
110 120 121 122 123 124 125 126 127
111 128 129 130 131 132 133 134 135
112 136 137 138 139 140 141 142 143
113 144 145 146 147 148 149 150 151
114 152 153 154 155 156 157 158 159
115 160 161 162 163 164 165 166 167
116 168 169 170 171 172 173 174 175
117 176 177 178 179 180 181 182 183
118 184 185 186 187 188 189 190 191
119 192 193 194 195 196 197 198 199
120 200 201 202 203 204 205 206 207
121 208 209 210 211 212 213 214 215
122 216 217 218 219 220 221 222 223
123 224 225 226 227 228 229 230 231
124 232 233 234 235 236 237 238 239
125 240 241 242 243 244 245 246 247
126 248 249 250 251 252 253 254 255>;
127 default-brightness-level = <100>;
130 vcc_phy: vcc-phy-regulator {
131 compatible = "regulator-fixed";
132 regulator-name = "vcc_phy";
138 compatible = "rockchip,rk3399-io-voltage-domain";
139 rockchip,grf = <&grf>;
141 bt656-supply = <&vcc1v8_dvp>;
142 audio-supply = <&vcca1v8_codec>;
143 sdmmc-supply = <&vcc_sd>;
144 gpio1830-supply = <&vcc_3v0>;
148 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
149 rockchip,grf = <&pmugrf>;
151 pmu1830-supply = <&vcc_1v8>;
155 compatible = "simple-audio-card";
156 simple-audio-card,format = "i2s";
157 simple-audio-card,name = "rockchip,es8316-codec";
158 simple-audio-card,mclk-fs = <256>;
159 simple-audio-card,widgets =
160 "Microphone", "Mic Jack",
161 "Headphone", "Headphone Jack";
162 simple-audio-card,routing =
163 "Mic Jack", "MICBIAS1",
165 "Headphone Jack", "HPOL",
166 "Headphone Jack", "HPOR";
167 simple-audio-card,cpu {
170 simple-audio-card,codec {
171 sound-dai = <&es8316>;
176 compatible = "simple-audio-card";
177 simple-audio-card,name = "rockchip,spdif";
178 simple-audio-card,cpu {
179 sound-dai = <&spdif>;
181 simple-audio-card,codec {
182 sound-dai = <&spdif_out>;
186 spdif_out: spdif-out {
187 compatible = "linux,spdif-dit";
188 #sound-dai-cells = <0>;
191 sdio_pwrseq: sdio-pwrseq {
192 compatible = "mmc-pwrseq-simple";
194 clock-names = "ext_clock";
195 pinctrl-names = "default";
196 pinctrl-0 = <&wifi_enable_h>;
199 * On the module itself this is one of these (depending
200 * on the actual card populated):
201 * - SDIO_RESET_L_WL_REG_ON
202 * - PDN (power down when low)
204 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
208 compatible = "wlan-platdata";
209 rockchip,grf = <&grf>;
210 wifi_chip_type = "ap6330";
212 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
217 compatible = "bluetooth-platdata";
219 clock-names = "ext_clock";
220 //wifi-bt-power-toggle;
221 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
222 pinctrl-names = "default", "rts_gpio";
223 pinctrl-0 = <&uart0_rts>;
224 pinctrl-1 = <&uart0_gpios>;
225 //BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
226 BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
227 BT,wake_gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
228 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
233 compatible = "rockchip,uboot-charge";
234 rockchip,uboot-charge-on = <0>;
235 rockchip,android-charge-on = <1>;
238 rk_vr_key: rockchip-vr-key {
239 compatible = "rockchip,key";
242 io-channels = <&saradc 1>;
246 label = "volume down";
247 rockchip,adc_value = <170>;
253 rockchip,adc_value = <340>;
259 rockchip,adc_value = <420>;
265 rockchip,adc_value = <520>;
269 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
278 rockchip,adc_value = <620>;
284 rockchip,adc_value = <700>;
290 rockchip,adc_value = <780>;
295 compatible = "rockchip_headset";
296 headset_gpio = <&gpio4 28 GPIO_ACTIVE_LOW>;
297 pinctrl-names = "default";
298 pinctrl-0 = <&hp_det>;
299 io-channels = <&saradc 2>;
304 clock-frequency = <150000000>;
305 clock-freq-min-max = <400000 150000000>;
313 vqmmc-supply = <&vcc_sd>;
314 pinctrl-names = "default";
315 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
320 clock-frequency = <50000000>;
321 clock-freq-min-max = <200000 50000000>;
327 keep-power-in-suspend;
328 mmc-pwrseq = <&sdio_pwrseq>;
331 pinctrl-names = "default";
332 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
346 keep-power-in-suspend;
347 mmc-hs400-enhanced-strobe;
353 rockchip,i2s-broken-burst-len;
354 rockchip,playback-channels = <8>;
355 rockchip,capture-channels = <8>;
356 #sound-dai-cells = <0>;
360 #sound-dai-cells = <0>;
365 #sound-dai-cells = <0>;
370 i2c-scl-rising-time-ns = <219>;
371 i2c-scl-falling-time-ns = <15>;
372 clock-frequency = <400000>;
374 vdd_cpu_b: syr827@40 {
375 compatible = "silergy,syr827";
377 vin-supply = <&vcc_sys>;
378 regulator-compatible = "fan53555-reg";
379 pinctrl-0 = <&vsel1_gpio>;
380 vsel-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
381 regulator-name = "vdd_cpu_b";
382 regulator-min-microvolt = <712500>;
383 regulator-max-microvolt = <1500000>;
384 regulator-ramp-delay = <1000>;
385 fcs,suspend-voltage-selector = <1>;
387 regulator-initial-state = <3>;
388 regulator-state-mem {
389 regulator-off-in-suspend;
394 compatible = "silergy,syr828";
396 vin-supply = <&vcc_sys>;
397 regulator-compatible = "fan53555-reg";
398 pinctrl-0 = <&vsel2_gpio>;
399 vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
400 regulator-name = "vdd_gpu";
401 regulator-min-microvolt = <712500>;
402 regulator-max-microvolt = <1500000>;
403 regulator-ramp-delay = <1000>;
404 fcs,suspend-voltage-selector = <1>;
406 regulator-initial-state = <3>;
407 regulator-initial-mode = <1>;/*1:pwm 2: auto mode*/
408 regulator-state-mem {
409 regulator-off-in-suspend;
414 compatible = "rockchip,rk818";
417 clock-output-names = "xin32k", "wifibt_32kin";
418 interrupt-parent = <&gpio1>;
419 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
420 pinctrl-names = "default";
421 pinctrl-0 = <&pmic_int_l>;
422 rockchip,system-power-controller;
427 vcc1-supply = <&vcc_sys>;
428 vcc2-supply = <&vcc_sys>;
429 vcc3-supply = <&vcc_sys>;
430 vcc4-supply = <&vcc_sys>;
431 vcc6-supply = <&vcc_sys>;
432 vcc7-supply = <&vcc3v3_sys>;
433 vcc8-supply = <&vcc_sys>;
434 vcc9-supply = <&vcc3v3_sys>;
437 vdd_cpu_l: DCDC_REG1 {
438 regulator-name = "vdd_cpu_l";
441 regulator-min-microvolt = <750000>;
442 regulator-max-microvolt = <1350000>;
443 regulator-ramp-delay = <6001>;
444 regulator-state-mem {
445 regulator-off-in-suspend;
449 vdd_center: DCDC_REG2 {
450 regulator-name = "vdd_center";
453 regulator-min-microvolt = <800000>;
454 regulator-max-microvolt = <1350000>;
455 regulator-ramp-delay = <6001>;
456 regulator-state-mem {
457 regulator-off-in-suspend;
462 regulator-name = "vcc_ddr";
465 regulator-state-mem {
466 regulator-on-in-suspend;
471 regulator-name = "vcc_1v8";
474 regulator-min-microvolt = <1800000>;
475 regulator-max-microvolt = <1800000>;
476 regulator-state-mem {
477 regulator-on-in-suspend;
478 regulator-suspend-microvolt = <1800000>;
482 vcca3v0_codec: LDO_REG1 {
485 regulator-min-microvolt = <3000000>;
486 regulator-max-microvolt = <3000000>;
487 regulator-name = "vcca3v0_codec";
488 regulator-state-mem {
489 regulator-off-in-suspend;
493 vcc3v0_tp: LDO_REG2 {
496 regulator-min-microvolt = <3000000>;
497 regulator-max-microvolt = <3000000>;
498 regulator-name = "vcc3v0_tp";
499 regulator-state-mem {
500 regulator-off-in-suspend;
504 vcca1v8_codec: LDO_REG3 {
507 regulator-min-microvolt = <1800000>;
508 regulator-max-microvolt = <1800000>;
509 regulator-name = "vcca1v8_codec";
510 regulator-state-mem {
511 regulator-off-in-suspend;
515 vcc_power_on: LDO_REG4 {
518 regulator-min-microvolt = <3300000>;
519 regulator-max-microvolt = <3300000>;
520 regulator-name = "vcc_power_on";
521 regulator-state-mem {
522 regulator-on-in-suspend;
523 regulator-suspend-microvolt = <3300000>;
530 regulator-min-microvolt = <3000000>;
531 regulator-max-microvolt = <3000000>;
532 regulator-name = "vcc_3v0";
533 regulator-state-mem {
534 regulator-on-in-suspend;
535 regulator-suspend-microvolt = <3000000>;
542 regulator-min-microvolt = <1500000>;
543 regulator-max-microvolt = <1500000>;
544 regulator-name = "vcc_1v5";
545 regulator-state-mem {
546 regulator-on-in-suspend;
547 regulator-suspend-microvolt = <1500000>;
551 vcc1v8_dvp: LDO_REG7 {
554 regulator-min-microvolt = <1800000>;
555 regulator-max-microvolt = <1800000>;
556 regulator-name = "vcc1v8_dvp";
557 regulator-state-mem {
558 regulator-on-in-suspend;
559 regulator-suspend-microvolt = <1800000>;
563 vcc3v3_s3: LDO_REG8 {
566 regulator-min-microvolt = <3300000>;
567 regulator-max-microvolt = <3300000>;
568 regulator-name = "vcc3v3_s3";
569 regulator-state-mem {
570 regulator-on-in-suspend;
571 regulator-suspend-microvolt = <3300000>;
578 regulator-min-microvolt = <1800000>;
579 regulator-max-microvolt = <3300000>;
580 regulator-name = "vcc_sd";
581 regulator-state-mem {
582 regulator-on-in-suspend;
583 regulator-suspend-microvolt = <3300000>;
587 vcc3v3_s0: SWITCH_REG {
590 regulator-name = "vcc3v3_s0";
591 regulator-state-mem {
592 regulator-on-in-suspend;
598 compatible = "rk818-battery";
600 3400 3599 3671 3701 3728 3746 3762
601 3772 3781 3792 3816 3836 3866 3910
602 3942 3971 4002 4050 4088 4132 4183>;
603 design_capacity = <4000>;
604 design_qmax = <4100>;
606 max_input_current = <2000>;
607 max_chrg_current = <1800>;
608 max_chrg_voltage = <4200>;
609 sleep_enter_current = <300>;
610 sleep_exit_current = <300>;
611 power_off_thresd = <3400>;
612 zero_algorithm_vol = <3850>;
613 fb_temperature = <115>;
615 max_soc_offset = <60>;
626 i2c-scl-rising-time-ns = <164>;
627 i2c-scl-falling-time-ns = <15>;
630 #sound-dai-cells = <0>;
631 compatible = "everest,es8316";
633 clocks = <&cru SCLK_I2S_8CH_OUT>;
634 clock-names = "mclk";
635 spk-con-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
641 i2c-scl-rising-time-ns = <345>;
642 i2c-scl-falling-time-ns = <11>;
643 clock-frequency = <400000>;
647 compatible = "ak8963";
648 pinctrl-names = "default";
649 pinctrl-0 = <&ak8963_irq_gpio>;
651 type = <SENSOR_TYPE_COMPASS>;
652 irq-gpio = <&gpio1 0 IRQ_TYPE_EDGE_RISING>;
654 poll_delay_ms = <30>;
659 compatible = "fairchild,fusb302";
661 pinctrl-names = "default";
662 pinctrl-0 = <&fusb0_int>;
663 int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
672 compatible = "gslX680";
674 touch-gpio = <&gpio1 20 IRQ_TYPE_LEVEL_LOW>;
675 reset-gpio = <&gpio4 22 GPIO_ACTIVE_LOW>;
684 max-freq = <50000000>;
685 pinctrl-names = "default", "sleep";
686 pinctrl-1 = <&spi1_gpio>;
689 compatible = "inv-spi,mpu6500";
690 pinctrl-names = "default";
691 pinctrl-0 = <&mpu6500_irq_gpio>;
692 irq-gpio = <&gpio1 4 IRQ_TYPE_EDGE_RISING>;
694 spi-max-frequency = <1000000>;
697 mpu-int_config = <0x00>;
698 mpu-level_shifter = <0>;
699 mpu-orientation = <1 0 0 0 1 0 0 0 1>;
703 support-hw-poweroff = <1>;
709 temperature = <70000>; /* millicelsius */
713 temperature = <85000>; /* millicelsius */
717 temperature = <100000>; /* millicelsius */
721 rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
722 rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
723 rockchip,hw-tshut-temp = <110000>;
735 u2phy0_otg: otg-port {
739 u2phy0_host: host-port {
740 phy-supply = <&vcc5v0_host>;
748 u2phy1_otg: otg-port {
752 u2phy1_host: host-port {
753 phy-supply = <&vcc5v0_host>;
759 pinctrl-names = "default";
760 pinctrl-0 = <&uart0_xfer &uart0_cts>;
815 rockchip,pwm_id= <3>;
816 rockchip,pwm_voltage = <900000>;
824 assigned-clocks = <&cru PLL_VPLL>;
825 assigned-clock-rates = <245000000>;
826 #include <dt-bindings/display/screen-timing/lcd-ls055r1sx04-mipi.dtsi>
830 rockchip,uboot-logo-on = <1>;
831 rockchip,disp-mode = <NO_DUAL>;
836 power_ctr: power_ctr {
838 rockchip,power_type = <GPIO>;
839 gpios = <&gpio3 5 GPIO_ACTIVE_HIGH>;
840 rockchip,delay = <10>;
843 rockchip,power_type = <GPIO>;
844 gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>;
845 rockchip,delay = <10>;
863 cpu-supply = <&vdd_cpu_l>;
867 cpu-supply = <&vdd_cpu_l>;
871 cpu-supply = <&vdd_cpu_l>;
875 cpu-supply = <&vdd_cpu_l>;
879 cpu-supply = <&vdd_cpu_b>;
883 cpu-supply = <&vdd_cpu_b>;
888 mali-supply = <&vdd_gpu>;
893 wifi_enable_h: wifi-enable-h {
894 rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
899 uart0_gpios: uart0-gpios {
900 rockchip,pins = <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
905 pmic_int_l: pmic-int-l {
907 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
910 pmic_dvs2: pmic-dvs2 {
912 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
915 vsel1_gpio: vsel1-gpio {
917 <1 17 RK_FUNC_GPIO &pcfg_pull_down>;
920 vsel2_gpio: vsel2-gpio {
922 <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
927 mpu6500_irq_gpio: mpu6500-irq-gpio {
928 rockchip,pins = <1 4 RK_FUNC_GPIO &pcfg_pull_none>;
933 host_vbus_drv: host-vbus-drv {
935 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
940 ak8963_irq_gpio: ak8963-irq-gpio {
941 rockchip,pins = <1 0 RK_FUNC_GPIO &pcfg_pull_none>;
946 spi1_gpio: spi1-gpio {
948 <1 7 RK_FUNC_GPIO &pcfg_output_low>,
949 <1 8 RK_FUNC_GPIO &pcfg_output_low>,
950 <1 9 RK_FUNC_GPIO &pcfg_output_low>,
951 <1 10 RK_FUNC_GPIO &pcfg_output_low>;
956 fusb0_int: fusb0-int {
957 rockchip,pins = <1 2 RK_FUNC_GPIO &pcfg_pull_up>;
963 rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_up>;