2 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
44 #include <dt-bindings/pwm/pwm.h>
45 #include <dt-bindings/sensor-dev.h>
46 #include "rk3399.dtsi"
47 #include "rk3399-android-6.0.dtsi"
48 #include "rk3399-opp.dtsi"
51 model = "Rockchip RK3399 VR Board";
52 compatible = "rockchip,vr", "rockchip,rk3399";
55 compatible = "pwm-regulator";
56 pwms = <&pwm2 0 25000 1>;
58 rockchip,pwm_voltage = <900000>;
59 regulator-name = "vdd_log";
60 regulator-min-microvolt = <800000>;
61 regulator-max-microvolt = <1400000>;
66 compatible = "regulator-fixed";
67 regulator-name = "vcc_sys";
70 regulator-min-microvolt = <4000000>;
71 regulator-max-microvolt = <4000000>;
73 vcc3v3_sys: vcc3v3-sys {
74 compatible = "regulator-fixed";
75 regulator-name = "vcc3v3_sys";
78 regulator-min-microvolt = <3300000>;
79 regulator-max-microvolt = <3300000>;
82 vcc5v0_host: vcc5v0-host-regulator {
83 compatible = "regulator-fixed";
85 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
86 pinctrl-names = "default";
87 pinctrl-0 = <&host_vbus_drv>;
88 regulator-name = "vcc5v0_host";
92 backlight: backlight {
93 compatible = "pwm-backlight";
94 pwms = <&pwm0 0 25000 0>;
98 16 17 18 19 20 21 22 23
99 24 25 26 27 28 29 30 31
100 32 33 34 35 36 37 38 39
101 40 41 42 43 44 45 46 47
102 48 49 50 51 52 53 54 55
103 56 57 58 59 60 61 62 63
104 64 65 66 67 68 69 70 71
105 72 73 74 75 76 77 78 79
106 80 81 82 83 84 85 86 87
107 88 89 90 91 92 93 94 95
108 96 97 98 99 100 101 102 103
109 104 105 106 107 108 109 110 111
110 112 113 114 115 116 117 118 119
111 120 121 122 123 124 125 126 127
112 128 129 130 131 132 133 134 135
113 136 137 138 139 140 141 142 143
114 144 145 146 147 148 149 150 151
115 152 153 154 155 156 157 158 159
116 160 161 162 163 164 165 166 167
117 168 169 170 171 172 173 174 175
118 176 177 178 179 180 181 182 183
119 184 185 186 187 188 189 190 191
120 192 193 194 195 196 197 198 199
121 200 201 202 203 204 205 206 207
122 208 209 210 211 212 213 214 215
123 216 217 218 219 220 221 222 223
124 224 225 226 227 228 229 230 231
125 232 233 234 235 236 237 238 239
126 240 241 242 243 244 245 246 247
127 248 249 250 251 252 253 254 255>;
128 default-brightness-level = <100>;
131 vcc_phy: vcc-phy-regulator {
132 compatible = "regulator-fixed";
133 regulator-name = "vcc_phy";
139 compatible = "simple-audio-card";
140 simple-audio-card,format = "i2s";
141 simple-audio-card,name = "rockchip,es8316-codec";
142 simple-audio-card,mclk-fs = <256>;
143 simple-audio-card,widgets =
144 "Microphone", "Mic Jack",
145 "Headphone", "Headphone Jack";
146 simple-audio-card,routing =
147 "Mic Jack", "MICBIAS1",
149 "Headphone Jack", "HPOL",
150 "Headphone Jack", "HPOR";
151 simple-audio-card,cpu {
154 simple-audio-card,codec {
155 sound-dai = <&es8316>;
160 compatible = "simple-audio-card";
161 simple-audio-card,name = "rockchip,spdif";
162 simple-audio-card,cpu {
163 sound-dai = <&spdif>;
165 simple-audio-card,codec {
166 sound-dai = <&spdif_out>;
170 spdif_out: spdif-out {
171 compatible = "linux,spdif-dit";
172 #sound-dai-cells = <0>;
175 sdio_pwrseq: sdio-pwrseq {
176 compatible = "mmc-pwrseq-simple";
178 clock-names = "ext_clock";
179 pinctrl-names = "default";
180 pinctrl-0 = <&wifi_enable_h>;
183 * On the module itself this is one of these (depending
184 * on the actual card populated):
185 * - SDIO_RESET_L_WL_REG_ON
186 * - PDN (power down when low)
188 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
192 compatible = "wlan-platdata";
193 rockchip,grf = <&grf>;
194 wifi_chip_type = "ap6330";
196 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
201 compatible = "bluetooth-platdata";
203 clock-names = "ext_clock";
204 //wifi-bt-power-toggle;
205 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
206 pinctrl-names = "default", "rts_gpio";
207 pinctrl-0 = <&uart0_rts>;
208 pinctrl-1 = <&uart0_gpios>;
209 //BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
210 BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
211 BT,wake_gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
212 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
217 compatible = "rockchip,uboot-charge";
218 rockchip,uboot-charge-on = <0>;
219 rockchip,android-charge-on = <1>;
222 rk_vr_key: rockchip-vr-key {
223 compatible = "rockchip,key";
226 io-channels = <&saradc 1>;
230 label = "volume down";
231 rockchip,adc_value = <170>;
237 rockchip,adc_value = <340>;
243 rockchip,adc_value = <420>;
249 rockchip,adc_value = <520>;
253 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
262 rockchip,adc_value = <620>;
268 rockchip,adc_value = <700>;
274 rockchip,adc_value = <780>;
279 compatible = "rockchip_headset";
280 headset_gpio = <&gpio4 28 GPIO_ACTIVE_LOW>;
281 pinctrl-names = "default";
282 pinctrl-0 = <&hp_det>;
283 io-channels = <&saradc 2>;
288 clock-frequency = <150000000>;
289 clock-freq-min-max = <400000 150000000>;
297 vqmmc-supply = <&vcc_sd>;
298 pinctrl-names = "default";
299 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
304 clock-frequency = <50000000>;
305 clock-freq-min-max = <200000 50000000>;
311 keep-power-in-suspend;
312 mmc-pwrseq = <&sdio_pwrseq>;
315 pinctrl-names = "default";
316 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
330 keep-power-in-suspend;
331 mmc-hs400-enhanced-strobe;
337 rockchip,i2s-broken-burst-len;
338 rockchip,playback-channels = <8>;
339 rockchip,capture-channels = <8>;
340 #sound-dai-cells = <0>;
344 #sound-dai-cells = <0>;
350 bt656-supply = <&vcc1v8_dvp>;
351 audio-supply = <&vcca1v8_codec>;
352 sdmmc-supply = <&vcc_sd>;
353 gpio1830-supply = <&vcc_3v0>;
358 #sound-dai-cells = <0>;
363 i2c-scl-rising-time-ns = <219>;
364 i2c-scl-falling-time-ns = <15>;
365 clock-frequency = <400000>;
367 vdd_cpu_b: syr827@40 {
368 compatible = "silergy,syr827";
370 vin-supply = <&vcc_sys>;
371 regulator-compatible = "fan53555-reg";
372 pinctrl-0 = <&vsel1_gpio>;
373 vsel-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
374 regulator-name = "vdd_cpu_b";
375 regulator-min-microvolt = <712500>;
376 regulator-max-microvolt = <1500000>;
377 regulator-ramp-delay = <1000>;
378 fcs,suspend-voltage-selector = <1>;
380 regulator-initial-state = <3>;
381 regulator-state-mem {
382 regulator-off-in-suspend;
387 compatible = "silergy,syr828";
389 vin-supply = <&vcc_sys>;
390 regulator-compatible = "fan53555-reg";
391 pinctrl-0 = <&vsel2_gpio>;
392 vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
393 regulator-name = "vdd_gpu";
394 regulator-min-microvolt = <712500>;
395 regulator-max-microvolt = <1500000>;
396 regulator-ramp-delay = <1000>;
397 fcs,suspend-voltage-selector = <1>;
399 regulator-initial-state = <3>;
400 regulator-initial-mode = <1>;/*1:pwm 2: auto mode*/
401 regulator-state-mem {
402 regulator-off-in-suspend;
407 compatible = "rockchip,rk818";
410 clock-output-names = "xin32k", "wifibt_32kin";
411 interrupt-parent = <&gpio1>;
412 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
413 pinctrl-names = "default";
414 pinctrl-0 = <&pmic_int_l>;
415 rockchip,system-power-controller;
420 vcc1-supply = <&vcc_sys>;
421 vcc2-supply = <&vcc_sys>;
422 vcc3-supply = <&vcc_sys>;
423 vcc4-supply = <&vcc_sys>;
424 vcc6-supply = <&vcc_sys>;
425 vcc7-supply = <&vcc3v3_sys>;
426 vcc8-supply = <&vcc_sys>;
427 vcc9-supply = <&vcc3v3_sys>;
430 vdd_cpu_l: DCDC_REG1 {
431 regulator-name = "vdd_cpu_l";
434 regulator-min-microvolt = <750000>;
435 regulator-max-microvolt = <1350000>;
436 regulator-ramp-delay = <6001>;
437 regulator-state-mem {
438 regulator-off-in-suspend;
442 vdd_center: DCDC_REG2 {
443 regulator-name = "vdd_center";
446 regulator-min-microvolt = <800000>;
447 regulator-max-microvolt = <1350000>;
448 regulator-ramp-delay = <6001>;
449 regulator-state-mem {
450 regulator-off-in-suspend;
455 regulator-name = "vcc_ddr";
458 regulator-state-mem {
459 regulator-on-in-suspend;
464 regulator-name = "vcc_1v8";
467 regulator-min-microvolt = <1800000>;
468 regulator-max-microvolt = <1800000>;
469 regulator-state-mem {
470 regulator-on-in-suspend;
471 regulator-suspend-microvolt = <1800000>;
475 vcca3v0_codec: LDO_REG1 {
478 regulator-min-microvolt = <3000000>;
479 regulator-max-microvolt = <3000000>;
480 regulator-name = "vcca3v0_codec";
481 regulator-state-mem {
482 regulator-off-in-suspend;
486 vcc3v0_tp: LDO_REG2 {
489 regulator-min-microvolt = <3000000>;
490 regulator-max-microvolt = <3000000>;
491 regulator-name = "vcc3v0_tp";
492 regulator-state-mem {
493 regulator-off-in-suspend;
497 vcca1v8_codec: LDO_REG3 {
500 regulator-min-microvolt = <1800000>;
501 regulator-max-microvolt = <1800000>;
502 regulator-name = "vcca1v8_codec";
503 regulator-state-mem {
504 regulator-off-in-suspend;
508 vcc_power_on: LDO_REG4 {
511 regulator-min-microvolt = <3300000>;
512 regulator-max-microvolt = <3300000>;
513 regulator-name = "vcc_power_on";
514 regulator-state-mem {
515 regulator-on-in-suspend;
516 regulator-suspend-microvolt = <3300000>;
523 regulator-min-microvolt = <3000000>;
524 regulator-max-microvolt = <3000000>;
525 regulator-name = "vcc_3v0";
526 regulator-state-mem {
527 regulator-on-in-suspend;
528 regulator-suspend-microvolt = <3000000>;
535 regulator-min-microvolt = <1500000>;
536 regulator-max-microvolt = <1500000>;
537 regulator-name = "vcc_1v5";
538 regulator-state-mem {
539 regulator-on-in-suspend;
540 regulator-suspend-microvolt = <1500000>;
544 vcc1v8_dvp: LDO_REG7 {
547 regulator-min-microvolt = <1800000>;
548 regulator-max-microvolt = <1800000>;
549 regulator-name = "vcc1v8_dvp";
550 regulator-state-mem {
551 regulator-on-in-suspend;
552 regulator-suspend-microvolt = <1800000>;
556 vcc3v3_s3: LDO_REG8 {
559 regulator-min-microvolt = <3300000>;
560 regulator-max-microvolt = <3300000>;
561 regulator-name = "vcc3v3_s3";
562 regulator-state-mem {
563 regulator-on-in-suspend;
564 regulator-suspend-microvolt = <3300000>;
571 regulator-min-microvolt = <1800000>;
572 regulator-max-microvolt = <3300000>;
573 regulator-name = "vcc_sd";
574 regulator-state-mem {
575 regulator-on-in-suspend;
576 regulator-suspend-microvolt = <3300000>;
580 vcc3v3_s0: SWITCH_REG {
583 regulator-name = "vcc3v3_s0";
584 regulator-state-mem {
585 regulator-on-in-suspend;
591 compatible = "rk818-battery";
593 3400 3599 3671 3701 3728 3746 3762
594 3772 3781 3792 3816 3836 3866 3910
595 3942 3971 4002 4050 4088 4132 4183>;
596 design_capacity = <4000>;
597 design_qmax = <4100>;
599 max_input_current = <2000>;
600 max_chrg_current = <1800>;
601 max_chrg_voltage = <4200>;
602 sleep_enter_current = <300>;
603 sleep_exit_current = <300>;
604 power_off_thresd = <3400>;
605 zero_algorithm_vol = <3850>;
606 fb_temperature = <115>;
608 max_soc_offset = <60>;
619 i2c-scl-rising-time-ns = <164>;
620 i2c-scl-falling-time-ns = <15>;
623 #sound-dai-cells = <0>;
624 compatible = "everest,es8316";
626 clocks = <&cru SCLK_I2S_8CH_OUT>;
627 clock-names = "mclk";
628 spk-con-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
634 i2c-scl-rising-time-ns = <345>;
635 i2c-scl-falling-time-ns = <11>;
636 clock-frequency = <400000>;
640 compatible = "ak8963";
641 pinctrl-names = "default";
642 pinctrl-0 = <&ak8963_irq_gpio>;
644 type = <SENSOR_TYPE_COMPASS>;
645 irq-gpio = <&gpio1 0 IRQ_TYPE_EDGE_RISING>;
647 poll_delay_ms = <30>;
652 compatible = "fairchild,fusb302";
654 pinctrl-names = "default";
655 pinctrl-0 = <&fusb0_int>;
656 int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
665 compatible = "gslX680";
667 touch-gpio = <&gpio1 20 IRQ_TYPE_LEVEL_LOW>;
668 reset-gpio = <&gpio4 22 GPIO_ACTIVE_LOW>;
677 max-freq = <50000000>;
678 pinctrl-names = "default", "sleep";
679 pinctrl-1 = <&spi1_gpio>;
682 compatible = "inv-spi,mpu6500";
683 pinctrl-names = "default";
684 pinctrl-0 = <&mpu6500_irq_gpio>;
685 irq-gpio = <&gpio1 4 IRQ_TYPE_EDGE_RISING>;
687 spi-max-frequency = <1000000>;
690 mpu-int_config = <0x00>;
691 mpu-level_shifter = <0>;
692 mpu-orientation = <1 0 0 0 1 0 0 0 1>;
696 support-hw-poweroff = <1>;
702 temperature = <70000>; /* millicelsius */
706 temperature = <85000>; /* millicelsius */
710 temperature = <100000>; /* millicelsius */
714 rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
715 rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
716 rockchip,hw-tshut-temp = <110000>;
728 u2phy0_otg: otg-port {
732 u2phy0_host: host-port {
733 phy-supply = <&vcc5v0_host>;
741 u2phy1_otg: otg-port {
745 u2phy1_host: host-port {
746 phy-supply = <&vcc5v0_host>;
752 pinctrl-names = "default";
753 pinctrl-0 = <&uart0_xfer &uart0_cts>;
808 rockchip,pwm_id= <3>;
809 rockchip,pwm_voltage = <900000>;
817 assigned-clocks = <&cru PLL_VPLL>;
818 assigned-clock-rates = <245000000>;
819 #include <dt-bindings/display/screen-timing/lcd-ls055r1sx04-mipi.dtsi>
823 rockchip,uboot-logo-on = <1>;
824 rockchip,disp-mode = <NO_DUAL>;
829 power_ctr: power_ctr {
831 rockchip,power_type = <GPIO>;
832 gpios = <&gpio3 5 GPIO_ACTIVE_HIGH>;
833 rockchip,delay = <10>;
836 rockchip,power_type = <GPIO>;
837 gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>;
838 rockchip,delay = <10>;
856 cpu-supply = <&vdd_cpu_l>;
860 cpu-supply = <&vdd_cpu_l>;
864 cpu-supply = <&vdd_cpu_l>;
868 cpu-supply = <&vdd_cpu_l>;
872 cpu-supply = <&vdd_cpu_b>;
876 cpu-supply = <&vdd_cpu_b>;
881 mali-supply = <&vdd_gpu>;
886 wifi_enable_h: wifi-enable-h {
887 rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
892 uart0_gpios: uart0-gpios {
893 rockchip,pins = <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
898 pmic_int_l: pmic-int-l {
900 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
903 pmic_dvs2: pmic-dvs2 {
905 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
908 vsel1_gpio: vsel1-gpio {
910 <1 17 RK_FUNC_GPIO &pcfg_pull_down>;
913 vsel2_gpio: vsel2-gpio {
915 <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
920 mpu6500_irq_gpio: mpu6500-irq-gpio {
921 rockchip,pins = <1 4 RK_FUNC_GPIO &pcfg_pull_none>;
926 host_vbus_drv: host-vbus-drv {
928 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
933 ak8963_irq_gpio: ak8963-irq-gpio {
934 rockchip,pins = <1 0 RK_FUNC_GPIO &pcfg_pull_none>;
939 spi1_gpio: spi1-gpio {
941 <1 7 RK_FUNC_GPIO &pcfg_output_low>,
942 <1 8 RK_FUNC_GPIO &pcfg_output_low>,
943 <1 9 RK_FUNC_GPIO &pcfg_output_low>,
944 <1 10 RK_FUNC_GPIO &pcfg_output_low>;
949 fusb0_int: fusb0-int {
950 rockchip,pins = <1 2 RK_FUNC_GPIO &pcfg_pull_up>;
956 rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_up>;
971 pmu1830-supply = <&vcc_1v8>;