arch/arm64/boot/dts/rockchip/rk3399-rv1-android.dts

   1 /*
   2  * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This file is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of the
  12  *     License, or (at your option) any later version.
  13  *
  14  *     This file is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  * Or, alternatively,
  20  *
  21  *  b) Permission is hereby granted, free of charge, to any person
  22  *     obtaining a copy of this software and associated documentation
  23  *     files (the "Software"), to deal in the Software without
  24  *     restriction, including without limitation the rights to use,
  25  *     copy, modify, merge, publish, distribute, sublicense, and/or
  26  *     sell copies of the Software, and to permit persons to whom the
  27  *     Software is furnished to do so, subject to the following
  28  *     conditions:
  29  *
  30  *     The above copyright notice and this permission notice shall be
  31  *     included in all copies or substantial portions of the Software.
  32  *
  33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  40  *     OTHER DEALINGS IN THE SOFTWARE.
  41  */
  42
  43 /dts-v1/;
  44 #include <dt-bindings/pwm/pwm.h>
  45 #include <dt-bindings/sensor-dev.h>
  46 #include "rk3399.dtsi"
  47 #include "rk3399-android.dtsi"
  48
  49 / {
  50         model = "Rockchip RK3399 VR Board";
  51         compatible = "rockchip,vr", "rockchip,rk3399";
  52
  53         vdd_log: vdd-log {
  54                 compatible = "pwm-regulator";
  55                 pwms = <&pwm2 0 25000 0>;
  56                 rockchip,pwm_id= <2>;
  57                 rockchip,pwm_voltage = <900000>;
  58                 regulator-name = "vdd_log";
  59                 regulator-min-microvolt = <800000>;
  60                 regulator-max-microvolt = <1400000>;
  61                 regulator-always-on;
  62                 regulator-boot-on;
  63         };
  64
  65         vcc_sys: vcc-sys {
  66                 compatible = "regulator-fixed";
  67                 regulator-name = "vcc_sys";
  68                 regulator-always-on;
  69                 regulator-boot-on;
  70                 regulator-min-microvolt = <4000000>;
  71                 regulator-max-microvolt = <4000000>;
  72         };
  73
  74         vcc3v3_sys: vcc3v3-sys {
  75                 compatible = "regulator-fixed";
  76                 regulator-name = "vcc3v3_sys";
  77                 regulator-always-on;
  78                 regulator-boot-on;
  79                 regulator-min-microvolt = <3300000>;
  80                 regulator-max-microvolt = <3300000>;
  81         };
  82
  83         vcc_phy: vcc-phy-regulator {
  84                 compatible = "regulator-fixed";
  85                 regulator-name = "vcc_phy";
  86                 regulator-always-on;
  87                 regulator-boot-on;
  88         };
  89
  90         vcc1v8_s3: vcc1v8-s3-regulator {
  91                 compatible = "regulator-fixed";
  92                 regulator-name = "vcc1v8_s3";
  93                 regulator-always-on;
  94                 regulator-boot-on;
  95                 regulator-state-mem {
  96                         regulator-off-in-suspend;
  97                 };
  98         };
  99
 100         io-domains {
 101                 compatible = "rockchip,rk3399-io-voltage-domain";
 102                 rockchip,grf = <&grf>;
 103
 104                 bt656-supply = <&vcc1v8_s3>;
 105                 audio-supply = <&vcc1v8_s3>;
 106                 sdmmc-supply = <&vcc_sd>;
 107                 gpio1830-supply = <&vcc1v8_s3>;
 108         };
 109
 110         pmu-io-domains {
 111                 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
 112                 rockchip,grf = <&pmugrf>;
 113                 pmu1830-supply = <&vcc_1v8>;
 114         };
 115
 116         dw_hdmi_audio: dw-hdmi-audio {
 117                 status = "okay";
 118                 compatible = "rockchip,dw-hdmi-audio";
 119                 #sound-dai-cells = <0>;
 120         };
 121
 122         hdmi_sound: hdmi-sound {
 123                 status = "disabled";
 124                 compatible = "simple-audio-card";
 125                 simple-audio-card,format = "i2s";
 126                 simple-audio-card,mclk-fs = <256>;
 127                 simple-audio-card,name = "rockchip,hdmi";
 128
 129                 simple-audio-card,cpu {
 130                         sound-dai = <&i2s2>;
 131                 };
 132                 simple-audio-card,codec {
 133                         sound-dai = <&dw_hdmi_audio>;
 134                 };
 135         };
 136
 137         sdio_pwrseq: sdio-pwrseq {
 138                 compatible = "mmc-pwrseq-simple";
 139                 clocks = <&rk818 1>;
 140                 clock-names = "ext_clock";
 141                 pinctrl-names = "default";
 142                 pinctrl-0 = <&wifi_enable_h>;
 143
 144                 /*
 145                  * On the module itself this is one of these (depending
 146                  * on the actual card populated):
 147                  * - SDIO_RESET_L_WL_REG_ON
 148                  * - PDN (power down when low)
 149                  */
 150                 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
 151         };
 152
 153         wireless-wlan {
 154                 compatible = "wlan-platdata";
 155                 rockchip,grf = <&grf>;
 156                 wifi_chip_type = "ap6330";
 157                 sdio_vref = <1800>;
 158                 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
 159                 status = "okay";
 160         };
 161
 162         wireless-bluetooth {
 163                 compatible = "bluetooth-platdata";
 164                 clocks = <&rk818 1>;
 165                 clock-names = "ext_clock";
 166                 //wifi-bt-power-toggle;
 167                 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
 168                 pinctrl-names = "default", "rts_gpio";
 169                 pinctrl-0 = <&uart0_rts>;
 170                 pinctrl-1 = <&uart0_gpios>;
 171                 //BT,power_gpio  = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
 172                 BT,reset_gpio    = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
 173                 BT,wake_gpio     = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
 174                 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
 175                 status = "okay";
 176         };
 177
 178         uboot-charge {
 179                 compatible = "rockchip,uboot-charge";
 180                 rockchip,uboot-charge-on = <0>;
 181                 rockchip,android-charge-on = <1>;
 182         };
 183
 184         mpu6500_hid {
 185                 status = "okay";
 186                 compatible = "inv-hid,mpu6500";
 187         };
 188 };
 189
 190 &cluster0_opp {
 191         opp@408000000 {
 192                 opp-hz = /bits/ 64 <408000000>;
 193                 opp-microvolt = <800000>;
 194                 clock-latency-ns = <40000>;
 195         };
 196         opp@600000000 {
 197                 opp-hz = /bits/ 64 <600000000>;
 198                 opp-microvolt = <800000>;
 199         };
 200         opp@816000000 {
 201                 opp-hz = /bits/ 64 <816000000>;
 202                 opp-microvolt = <800000>;
 203         };
 204         opp@1008000000 {
 205                 opp-hz = /bits/ 64 <1008000000>;
 206                 opp-microvolt = <850000>;
 207         };
 208         opp@1200000000 {
 209                 opp-hz = /bits/ 64 <1200000000>;
 210                 opp-microvolt = <925000>;
 211         };
 212         opp@1416000000 {
 213                 opp-hz = /bits/ 64 <1416000000>;
 214                 opp-microvolt = <1075000>;
 215         };
 216         opp@1512000000 {
 217                 opp-hz = /bits/ 64 <1512000000>;
 218                 opp-microvolt = <1100000>;
 219                 status="disabled";
 220         };
 221 };
 222
 223 &cluster1_opp {
 224         opp@408000000 {
 225                 opp-hz = /bits/ 64 <408000000>;
 226                 opp-microvolt = <800000>;
 227                 clock-latency-ns = <40000>;
 228         };
 229         opp@600000000 {
 230                 opp-hz = /bits/ 64 <600000000>;
 231                 opp-microvolt = <800000>;
 232         };
 233         opp@816000000 {
 234                 opp-hz = /bits/ 64 <816000000>;
 235                 opp-microvolt = <825000>;
 236         };
 237         opp@1008000000 {
 238                 opp-hz = /bits/ 64 <1008000000>;
 239                 opp-microvolt = <850000>;
 240         };
 241         opp@1200000000 {
 242                 opp-hz = /bits/ 64 <1200000000>;
 243                 opp-microvolt = <900000>;
 244         };
 245         opp@1416000000 {
 246                 opp-hz = /bits/ 64 <1416000000>;
 247                 opp-microvolt = <1000000>;
 248         };
 249         opp@1608000000 {
 250                 opp-hz = /bits/ 64 <1608000000>;
 251                 opp-microvolt = <1050000>;
 252         };
 253         opp@1800000000 {
 254                 opp-hz = /bits/ 64 <1800000000>;
 255                 opp-microvolt = <1150000>;
 256         };
 257         opp@1992000000 {
 258                 opp-hz = /bits/ 64 <1992000000>;
 259                 opp-microvolt = <1225000>;
 260         };
 261 };
 262
 263 &CPU_COST_A72 {
 264         busy-cost-data = <
 265                 210   129       /*  408MHz */
 266                 308   184       /*  600MHz */
 267                 419   246       /*  816MHz */
 268                 518   335       /* 1008MHz */
 269                 617   428       /* 1200MHz */
 270                 728   573       /* 1416MHz */
 271                 827   724       /* 1608MHz */
 272                 925   900       /* 1800MHz */
 273                 1024  1108      /* 1992MHz */
 274         >;
 275         idle-cost-data = <
 276                 15
 277                 15
 278                 0
 279         >;
 280 };
 281
 282 &CPU_COST_A53 {
 283         busy-cost-data = <
 284                 108    46       /*  408M */
 285                 159    67       /*  600M */
 286                 216    90       /*  816M */
 287                 267    120      /* 1008M */
 288                 318    153      /* 1200M */
 289                 375    198      /* 1416M */
 290                 401    222      /* 1512M */
 291         >;
 292         idle-cost-data = <
 293                 6
 294                 6
 295                 0
 296         >;
 297 };
 298
 299 &CLUSTER_COST_A72 {
 300         busy-cost-data = <
 301                 210   129       /*  408MHz */
 302                 308   184       /*  600MHz */
 303                 419   246       /*  816MHz */
 304                 518   335       /* 1008MHz */
 305                 617   428       /* 1200MHz */
 306                 728   573       /* 1416MHz */
 307                 827   724       /* 1608MHz */
 308                 925   900       /* 1800MHz */
 309                 1024  1108      /* 1992MHz */
 310         >;
 311         idle-cost-data = <
 312                 65
 313                 65
 314                 65
 315         >;
 316 };
 317
 318 &CLUSTER_COST_A53 {
 319         busy-cost-data = <
 320                 108    46       /*  408M */
 321                 159    67       /*  600M */
 322                 216    90       /*  816M */
 323                 267    120      /* 1008M */
 324                 318    153      /* 1200M */
 325                 375    198      /* 1416M */
 326                 401    222      /* 1512M */
 327         >;
 328         idle-cost-data = <
 329                 56
 330                 56
 331                 56
 332         >;
 333 };
 334
 335 &gpu_opp_table {
 336         compatible = "operating-points-v2";
 337         opp-shared;
 338         opp@200000000 {
 339                 opp-hz = /bits/ 64 <200000000>;
 340                 opp-microvolt = <825000>;
 341         };
 342         opp@300000000 {
 343                 opp-hz = /bits/ 64 <300000000>;
 344                 opp-microvolt = <850000>;
 345         };
 346         opp@400000000 {
 347                 opp-hz = /bits/ 64 <400000000>;
 348                 opp-microvolt = <875000>;
 349         };
 350         opp@500000000 {
 351                 opp-hz = /bits/ 64 <500000000>;
 352                 opp-microvolt = <950000>;
 353         };
 354         opp@600000000 {
 355                 opp-hz = /bits/ 64 <600000000>;
 356                 opp-microvolt = <1025000>;
 357         };
 358         opp@800000000 {
 359                 opp-hz = /bits/ 64 <800000000>;
 360                 opp-microvolt = <1125000>;
 361         };
 362 };
 363
 364 &sdmmc {
 365         clock-frequency = <150000000>;
 366         clock-freq-min-max = <400000 150000000>;
 367         supports-sd;
 368         bus-width = <4>;
 369         cap-mmc-highspeed;
 370         cap-sd-highspeed;
 371         disable-wp;
 372         num-slots = <1>;
 373         sd-uhs-sdr104;
 374         vqmmc-supply = <&vcc_sd>;
 375         pinctrl-names = "default";
 376         pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
 377         status = "okay";
 378 };
 379
 380 &sdio0 {
 381         clock-frequency = <50000000>;
 382         clock-freq-min-max = <200000 50000000>;
 383         supports-sdio;
 384         bus-width = <4>;
 385         disable-wp;
 386         cap-sd-highspeed;
 387         cap-sdio-irq;
 388         keep-power-in-suspend;
 389         mmc-pwrseq = <&sdio_pwrseq>;
 390         non-removable;
 391         num-slots = <1>;
 392         pinctrl-names = "default";
 393         pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
 394         sd-uhs-sdr104;
 395         status = "okay";
 396 };
 397
 398 &emmc_phy {
 399         status = "okay";
 400 };
 401
 402 &sdhci {
 403         bus-width = <8>;
 404         mmc-hs400-1_8v;
 405         supports-emmc;
 406         non-removable;
 407         keep-power-in-suspend;
 408         mmc-hs400-enhanced-strobe;
 409         status = "okay";
 410 };
 411
 412 &i2c0 {
 413         status = "okay";
 414         i2c-scl-rising-time-ns = <219>;
 415         i2c-scl-falling-time-ns = <15>;
 416         /* clock-frequency = <400000>; */
 417
 418         fusb1: fusb30x@22 {
 419                 compatible = "fairchild,fusb302";
 420                 reg = <0x22>;
 421                 pinctrl-names = "default";
 422                 pinctrl-0 = <&fusb1_int>;
 423                 vbus-5v-gpios = <&gpio4 25 GPIO_ACTIVE_HIGH>;
 424                 int-n-gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
 425                 status = "okay";
 426         };
 427
 428         vdd_cpu_b: syr827@40 {
 429                 compatible = "silergy,syr827";
 430                 reg = <0x40>;
 431                 vin-supply = <&vcc_sys>;
 432                 regulator-compatible = "fan53555-reg";
 433                 pinctrl-0 = <&vsel1_gpio>;
 434                 vsel-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
 435                 regulator-name = "vdd_cpu_b";
 436                 regulator-min-microvolt = <712500>;
 437                 regulator-max-microvolt = <1500000>;
 438                 regulator-ramp-delay = <1000>;
 439                 fcs,suspend-voltage-selector = <1>;
 440                 regulator-always-on;
 441                 regulator-initial-state = <3>;
 442                         regulator-state-mem {
 443                         regulator-off-in-suspend;
 444                 };
 445         };
 446
 447         vdd_gpu: syr828@41 {
 448                 compatible = "silergy,syr828";
 449                 reg = <0x41>;
 450                 vin-supply = <&vcc_sys>;
 451                 regulator-compatible = "fan53555-reg";
 452                 pinctrl-0 = <&vsel2_gpio>;
 453                 vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
 454                 regulator-name = "vdd_gpu";
 455                 regulator-min-microvolt = <712500>;
 456                 regulator-max-microvolt = <1500000>;
 457                 regulator-ramp-delay = <1000>;
 458                 fcs,suspend-voltage-selector = <1>;
 459                 regulator-boot-on;
 460                 regulator-initial-state = <3>;
 461                 regulator-initial-mode = <1>;/*1:pwm 2: auto mode*/
 462                         regulator-state-mem {
 463                         regulator-off-in-suspend;
 464                 };
 465         };
 466
 467         rk818: pmic@1c {
 468                 compatible = "rockchip,rk818";
 469                 status = "okay";
 470                 reg = <0x1c>;
 471                 clock-output-names = "xin32k", "wifibt_32kin";
 472                 interrupt-parent = <&gpio1>;
 473                 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
 474                 pinctrl-names = "default";
 475                 pinctrl-0 = <&pmic_int_l>;
 476                 rockchip,system-power-controller;
 477                 wakeup-source;
 478                 extcon = <&fusb0>;
 479                 #clock-cells = <1>;
 480
 481                 vcc1-supply = <&vcc_sys>;
 482                 vcc2-supply = <&vcc_sys>;
 483                 vcc3-supply = <&vcc_sys>;
 484                 vcc4-supply = <&vcc_sys>;
 485                 vcc6-supply = <&vcc_sys>;
 486                 vcc7-supply = <&vcc3v3_sys>;
 487                 vcc8-supply = <&vcc_sys>;
 488                 vcc9-supply = <&vcc3v3_sys>;
 489
 490                 regulators {
 491                         vdd_cpu_l: DCDC_REG1 {
 492                                 regulator-name = "vdd_cpu_l";
 493                                 regulator-always-on;
 494                                 regulator-boot-on;
 495                                 regulator-min-microvolt = <750000>;
 496                                 regulator-max-microvolt = <1350000>;
 497                                 regulator-ramp-delay = <6001>;
 498                                 regulator-state-mem {
 499                                         regulator-off-in-suspend;
 500                                 };
 501                         };
 502
 503                         vdd_center: DCDC_REG2 {
 504                                 regulator-name = "vdd_center";
 505                                 regulator-always-on;
 506                                 regulator-boot-on;
 507                                 regulator-min-microvolt = <800000>;
 508                                 regulator-max-microvolt = <1350000>;
 509                                 regulator-ramp-delay = <6001>;
 510                                 regulator-state-mem {
 511                                         regulator-off-in-suspend;
 512                                 };
 513                         };
 514
 515                         vcc_ddr: DCDC_REG3 {
 516                                 regulator-name = "vcc_ddr";
 517                                 regulator-always-on;
 518                                 regulator-boot-on;
 519                                 regulator-state-mem {
 520                                         regulator-on-in-suspend;
 521                                 };
 522                         };
 523
 524                         vcc_1v8: DCDC_REG4 {
 525                                 regulator-name = "vcc_1v8";
 526                                 regulator-always-on;
 527                                 regulator-boot-on;
 528                                 regulator-min-microvolt = <1800000>;
 529                                 regulator-max-microvolt = <1800000>;
 530                                 regulator-state-mem {
 531                                         regulator-on-in-suspend;
 532                                         regulator-suspend-microvolt = <1800000>;
 533                                 };
 534                         };
 535
 536                         vcc1v8_rk1608: LDO_REG1 {
 537                                 //regulator-always-on;
 538                                 //regulator-boot-on;
 539                                 regulator-min-microvolt = <1800000>;
 540                                 regulator-max-microvolt = <1800000>;
 541                                 regulator-name = "vcc1v8_rk1608";
 542                                 regulator-state-mem {
 543                                         regulator-off-in-suspend;
 544                                 };
 545                         };
 546
 547                         vdd1v8_rk1608: LDO_REG2 {
 548                                 //regulator-always-on;
 549                                 //regulator-boot-on;
 550                                 regulator-min-microvolt = <1800000>;
 551                                 regulator-max-microvolt = <1800000>;
 552                                 regulator-name = "vdd1v8_rk1608";
 553                                 regulator-state-mem {
 554                                         regulator-off-in-suspend;
 555                                 };
 556                         };
 557
 558                         vdd1v0_rk1608: LDO_REG3 {
 559                                 //regulator-always-on;
 560                                 //regulator-boot-on;
 561                                 regulator-min-microvolt = <1000000>;
 562                                 regulator-max-microvolt = <1000000>;
 563                                 regulator-name = "vdd1v0_rk1608";
 564                                 regulator-state-mem {
 565                                         regulator-off-in-suspend;
 566                                 };
 567                         };
 568
 569                         vcc_power_on: LDO_REG4 {
 570                                 regulator-always-on;
 571                                 regulator-boot-on;
 572                                 regulator-min-microvolt = <3300000>;
 573                                 regulator-max-microvolt = <3300000>;
 574                                 regulator-name = "vcc_power_on";
 575                                 regulator-state-mem {
 576                                         regulator-on-in-suspend;
 577                                         regulator-suspend-microvolt = <3300000>;
 578                                 };
 579                         };
 580
 581                         vdd_2v8: LDO_REG5 {
 582                                 //regulator-always-on;
 583                                 //regulator-boot-on;
 584                                 regulator-min-microvolt = <2800000>;
 585                                 regulator-max-microvolt = <2800000>;
 586                                 regulator-name = "vdd_2v8";
 587                                 regulator-state-mem {
 588                                         regulator-on-in-suspend;
 589                                         regulator-suspend-microvolt = <2800000>;
 590                                 };
 591                         };
 592
 593                         vcc_1v5: LDO_REG6 {
 594                                 //regulator-always-on;
 595                                 //regulator-boot-on;
 596                                 regulator-min-microvolt = <1500000>;
 597                                 regulator-max-microvolt = <1500000>;
 598                                 regulator-name = "vcc_1v5";
 599                                 regulator-state-mem {
 600                                         regulator-on-in-suspend;
 601                                         regulator-suspend-microvolt = <1500000>;
 602                                 };
 603                         };
 604
 605                         vcc1v8_dvp: LDO_REG7 {
 606                                 //regulator-always-on;
 607                                 //regulator-boot-on;
 608                                 regulator-min-microvolt = <1800000>;
 609                                 regulator-max-microvolt = <1800000>;
 610                                 regulator-name = "vcc1v8_dvp";
 611                                 regulator-state-mem {
 612                                         regulator-on-in-suspend;
 613                                         regulator-suspend-microvolt = <1800000>;
 614                                 };
 615                         };
 616
 617                         vcc3v3_s3: LDO_REG8 {
 618                                 regulator-always-on;
 619                                 regulator-boot-on;
 620                                 regulator-min-microvolt = <3300000>;
 621                                 regulator-max-microvolt = <3300000>;
 622                                 regulator-name = "vcc3v3_s3";
 623                                 regulator-state-mem {
 624                                         regulator-on-in-suspend;
 625                                         regulator-suspend-microvolt = <3300000>;
 626                                 };
 627                         };
 628
 629                         vcc_sd: LDO_REG9 {
 630                                 regulator-always-on;
 631                                 regulator-boot-on;
 632                                 regulator-min-microvolt = <1800000>;
 633                                 regulator-max-microvolt = <3300000>;
 634                                 regulator-name = "vcc_sd";
 635                                 regulator-state-mem {
 636                                         regulator-on-in-suspend;
 637                                         regulator-suspend-microvolt = <3300000>;
 638                                 };
 639                         };
 640
 641                         vcc3v3_s0: SWITCH_REG {
 642                                 regulator-always-on;
 643                                 regulator-boot-on;
 644                                 regulator-name = "vcc3v3_s0";
 645                                 regulator-state-mem {
 646                                         regulator-on-in-suspend;
 647                                 };
 648                         };
 649                 };
 650
 651                 battery {
 652                         compatible = "rk818-battery";
 653                         ocv_table = <
 654                                 3400 3599 3671 3701 3728 3746 3762
 655                                 3772 3781 3792 3816 3836 3866 3910
 656                                 3942 3971 4002 4050 4088 4132 4183>;
 657                         design_capacity = <4000>;
 658                         design_qmax = <4100>;
 659                         bat_res = <100>;
 660                         max_input_current = <2000>;
 661                         max_chrg_current = <1800>;
 662                         max_chrg_voltage = <4200>;
 663                         sleep_enter_current = <300>;
 664                         sleep_exit_current = <300>;
 665                         power_off_thresd = <3400>;
 666                         zero_algorithm_vol = <3850>;
 667                         fb_temperature = <115>;
 668                         sample_res = <10>;
 669                         max_soc_offset = <60>;
 670                         energy_mode = <0>;
 671                         monitor_sec = <5>;
 672                         virtual_power = <1>;
 673                         power_dc2otg = <0>;
 674                 };
 675         };
 676 };
 677
 678 &i2c4 {
 679         status = "okay";
 680         i2c-scl-rising-time-ns = <345>;
 681         i2c-scl-falling-time-ns = <11>;
 682
 683         fusb0: fusb30x@22 {
 684                 compatible = "fairchild,fusb302";
 685                 reg = <0x22>;
 686                 pinctrl-names = "default";
 687                 pinctrl-0 = <&fusb0_int>;
 688                 int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
 689                 status = "okay";
 690         };
 691 };
 692
 693 &threshold {
 694         temperature = <85000>; /* millicelsius */
 695 };
 696
 697 &target {
 698         temperature = <100000>; /* millicelsius */
 699 };
 700
 701 &soc_crit {
 702         temperature = <105000>; /* millicelsius */
 703 };
 704
 705 &tsadc {
 706         rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
 707         rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
 708         rockchip,hw-tshut-temp = <110000>;
 709         status = "okay";
 710 };
 711
 712 &saradc {
 713         status = "okay";
 714 };
 715
 716 &rk_key {
 717         compatible = "rockchip,key";
 718         status = "okay";
 719         io-channels = <&saradc 1>;
 720
 721         power-key {
 722                 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
 723                 linux,code = <116>;
 724                 label = "power";
 725                 gpio-key,wakeup;
 726         };
 727 };
 728
 729 &u2phy0 {
 730         extcon = <&fusb0>;
 731         status = "okay";
 732
 733         u2phy0_otg: otg-port {
 734                 status = "okay";
 735         };
 736 };
 737
 738 &u2phy1 {
 739         extcon = <&fusb1>;
 740         status = "okay";
 741
 742         u2phy1_otg: otg-port {
 743                 status = "okay";
 744         };
 745 };
 746
 747 &uart0 {
 748         pinctrl-names = "default";
 749         pinctrl-0 = <&uart0_xfer &uart0_cts>;
 750         status = "okay";
 751 };
 752
 753 &uart2 {
 754         status = "okay";
 755 };
 756
 757 &usbdrd3_0 {
 758         extcon = <&fusb0>;
 759         status = "okay";
 760 };
 761
 762 &usbdrd_dwc3_0 {
 763         status = "okay";
 764 };
 765
 766 &usbdrd3_1 {
 767         extcon = <&fusb1>;
 768         status = "okay";
 769 };
 770
 771 &usbdrd_dwc3_1 {
 772         status = "okay";
 773 };
 774
 775 &tcphy0 {
 776         status = "okay";
 777         extcon = <&fusb0>;
 778 };
 779
 780 &tcphy1 {
 781         status = "okay";
 782         extcon = <&fusb1>;
 783 };
 784
 785 &pwm2 {
 786         status = "okay";
 787 };
 788
 789 &rk_screen {
 790         #include <dt-bindings/display/screen-timing/lcd-box.dtsi>
 791 };
 792
 793 &disp_timings {
 794         native-mode = <&timing0>; /* 720p */
 795 };
 796
 797 &timing0 {
 798         screen-width = <130>;
 799         screen-hight = <72>;
 800 };
 801 /*
 802 &fb {
 803         rockchip,uboot-logo-on = <1>;
 804         rockchip,disp-mode = <NO_DUAL>;
 805         //rockchip,disp-policy = <DISPLAY_POLICY_BOX>;
 806 };
 807 */
 808 &vopb_rk_fb {
 809         status = "okay";
 810 };
 811
 812 &vopl_rk_fb {
 813         status = "okay";
 814 };
 815
 816 &hdmi_rk_fb {
 817         status = "okay";
 818         rockchip,hdmi_video_source = <DISPLAY_SOURCE_LCDC1>;
 819 };
 820
 821 &cdn_dp_fb {
 822         status = "okay";
 823         extcon = <&fusb0>, <&fusb1>;
 824         dp_vop_sel = <DISPLAY_SOURCE_LCDC0>;
 825 };
 826
 827 &cdn_dp_sound {
 828         status = "okay";
 829 };
 830
 831 &cpu_l0 {
 832         cpu-supply = <&vdd_cpu_l>;
 833 };
 834
 835 &cpu_l1 {
 836         cpu-supply = <&vdd_cpu_l>;
 837 };
 838
 839 &cpu_l2 {
 840         cpu-supply = <&vdd_cpu_l>;
 841 };
 842
 843 &cpu_l3 {
 844         cpu-supply = <&vdd_cpu_l>;
 845 };
 846
 847 &cpu_b0 {
 848         cpu-supply = <&vdd_cpu_b>;
 849 };
 850
 851 &cpu_b1 {
 852         cpu-supply = <&vdd_cpu_b>;
 853 };
 854
 855 &gpu {
 856         status = "okay";
 857         mali-supply = <&vdd_gpu>;
 858 };
 859
 860 &pinctrl {
 861         sdio-pwrseq {
 862                 wifi_enable_h: wifi-enable-h {
 863                         rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
 864                 };
 865         };
 866
 867         wireless-bluetooth {
 868                 uart0_gpios: uart0-gpios {
 869                         rockchip,pins = <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
 870                 };
 871         };
 872
 873         pmic {
 874                 pmic_int_l: pmic-int-l {
 875                         rockchip,pins =
 876                                 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
 877                 };
 878
 879                 vsel1_gpio: vsel1-gpio {
 880                         rockchip,pins =
 881                                 <1 17 RK_FUNC_GPIO &pcfg_pull_down>;
 882                 };
 883
 884                 vsel2_gpio: vsel2-gpio {
 885                         rockchip,pins =
 886                                 <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
 887                 };
 888         };
 889
 890         spi1 {
 891                 spi1_gpio: spi1-gpio {
 892                         rockchip,pins =
 893                                 <1 7 RK_FUNC_GPIO &pcfg_output_low>,
 894                                 <1 8 RK_FUNC_GPIO &pcfg_output_low>,
 895                                 <1 9 RK_FUNC_GPIO &pcfg_output_low>,
 896                                 <1 10 RK_FUNC_GPIO &pcfg_output_low>;
 897                 };
 898         };
 899
 900         fusb30x {
 901                 fusb0_int: fusb0-int {
 902                         rockchip,pins = <1 2 RK_FUNC_GPIO &pcfg_pull_up>;
 903                 };
 904
 905                 fusb1_int: fusb1-int {
 906                         rockchip,pins = <1 24 RK_FUNC_GPIO &pcfg_pull_up>;
 907                 };
 908         };
 909 };