2 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
45 #include "rk3399.dtsi"
46 #include "rk3399-android.dtsi"
47 #include <dt-bindings/sensor-dev.h>
50 compatible = "rockchip,rk3399-mid", "rockchip,rk3399";
53 compatible = "regulator-fixed";
54 regulator-name = "vcc_sys";
57 regulator-min-microvolt = <3900000>;
58 regulator-max-microvolt = <3900000>;
61 vcc3v3_sys: vcc3v3-sys {
62 compatible = "regulator-fixed";
63 regulator-name = "vcc3v3_sys";
66 regulator-min-microvolt = <3300000>;
67 regulator-max-microvolt = <3300000>;
70 vcc5v0_host: vcc5v0-host-regulator {
71 compatible = "regulator-fixed";
73 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
74 pinctrl-names = "default";
75 pinctrl-0 = <&host_vbus_drv>;
76 regulator-name = "vcc5v0_host";
80 compatible = "pwm-regulator";
81 pwms = <&pwm2 0 25000 0>;
83 rockchip,pwm_voltage = <900000>;
84 regulator-name = "vdd_log";
85 regulator-min-microvolt = <750000>;
86 regulator-max-microvolt = <1350000>;
91 backlight: backlight {
92 compatible = "pwm-backlight";
93 pwms = <&pwm0 0 25000 0>;
95 255 254 253 252 251 250 249 248 247 246 245 244
96 243 242 241 240 239 238 237 236 235 234 233 232
97 231 230 229 228 227 226 225 224 223 222 221 220
98 219 218 217 216 215 214 213 212 211 210 209 208
99 207 206 205 204 203 202 201 200 199 198 197 196
100 195 194 193 192 191 190 189 188 187 186 185 184
101 183 182 181 180 179 178 177 176 175 174 173 172
102 171 170 169 168 167 166 165 164 163 162 161 160
103 159 158 157 156 155 154 153 152 151 150 149 148
104 147 146 145 144 143 142 141 140 139 138 137 136
105 135 134 133 132 131 130 129 128 127 126 125 124
106 123 122 121 120 119 118 117 116 115 114 113 112
107 111 110 109 108 107 106 105 104 103 102 101 100
108 99 98 97 96 95 94 93 92 91 90 89 88
109 87 86 85 84 83 82 81 80 79 78 77 76
110 75 74 73 72 71 70 69 68 67 66 65 64
111 63 62 61 60 59 58 57 56 55 54 53 52
112 51 50 49 48 47 46 45 44 43 42 41 40
113 39 38 37 36 35 34 33 32 31 30 29 28
114 27 26 25 24 23 22 21 20 19 18 17 16
115 15 14 13 12 11 10 9 8 7 6 5 4
117 default-brightness-level = <200>;
118 enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
121 vcc_phy: vcc-phy-regulator {
122 compatible = "regulator-fixed";
123 regulator-name = "vcc_phy";
129 compatible = "rockchip,rk3399-io-voltage-domain";
130 rockchip,grf = <&grf>;
132 bt656-supply = <&vcc1v8_dvp>;
133 audio-supply = <&vcca1v8_codec>;
134 sdmmc-supply = <&vcc_sd>;
135 gpio1830-supply = <&vcc_3v0>;
139 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
140 rockchip,grf = <&pmugrf>;
142 pmu1830-supply = <&vcc_1v8>;
146 compatible = "simple-audio-card";
147 simple-audio-card,format = "i2s";
148 simple-audio-card,name = "rockchip,es8316-codec";
149 simple-audio-card,mclk-fs = <256>;
150 simple-audio-card,widgets =
151 "Microphone", "Mic Jack",
152 "Headphone", "Headphone Jack";
153 simple-audio-card,routing =
154 "Mic Jack", "MICBIAS1",
156 "Headphone Jack", "HPOL",
157 "Headphone Jack", "HPOR";
158 simple-audio-card,cpu {
161 simple-audio-card,codec {
162 sound-dai = <&es8316>;
167 compatible = "simple-audio-card";
168 simple-audio-card,name = "rockchip,spdif";
169 simple-audio-card,cpu {
170 sound-dai = <&spdif>;
172 simple-audio-card,codec {
173 sound-dai = <&spdif_out>;
177 spdif_out: spdif-out {
178 compatible = "linux,spdif-dit";
179 #sound-dai-cells = <0>;
182 sdio_pwrseq: sdio-pwrseq {
183 compatible = "mmc-pwrseq-simple";
185 clock-names = "ext_clock";
186 pinctrl-names = "default";
187 pinctrl-0 = <&wifi_enable_h>;
190 * On the module itself this is one of these (depending
191 * on the actual card populated):
192 * - SDIO_RESET_L_WL_REG_ON
193 * - PDN (power down when low)
195 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
199 compatible = "wlan-platdata";
200 rockchip,grf = <&grf>;
201 wifi_chip_type = "ap6354";
203 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
208 compatible = "bluetooth-platdata";
209 //wifi-bt-power-toggle;
210 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
211 pinctrl-names = "default", "rts_gpio";
212 pinctrl-0 = <&uart0_rts>;
213 pinctrl-1 = <&uart0_gpios>;
214 //BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
215 BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
216 BT,wake_gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
217 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
224 opp-hz = /bits/ 64 <408000000>;
225 opp-microvolt = <800000>;
226 clock-latency-ns = <40000>;
229 opp-hz = /bits/ 64 <600000000>;
230 opp-microvolt = <800000>;
233 opp-hz = /bits/ 64 <816000000>;
234 opp-microvolt = <800000>;
237 opp-hz = /bits/ 64 <1008000000>;
238 opp-microvolt = <875000>;
241 opp-hz = /bits/ 64 <1200000000>;
242 opp-microvolt = <925000>;
245 opp-hz = /bits/ 64 <1416000000>;
246 opp-microvolt = <1050000>;
249 opp-hz = /bits/ 64 <1512000000>;
250 opp-microvolt = <1075000>;
256 opp-hz = /bits/ 64 <408000000>;
257 opp-microvolt = <800000>;
258 clock-latency-ns = <40000>;
261 opp-hz = /bits/ 64 <600000000>;
262 opp-microvolt = <800000>;
265 opp-hz = /bits/ 64 <816000000>;
266 opp-microvolt = <825000>;
269 opp-hz = /bits/ 64 <1008000000>;
270 opp-microvolt = <875000>;
273 opp-hz = /bits/ 64 <1200000000>;
274 opp-microvolt = <950000>;
277 opp-hz = /bits/ 64 <1416000000>;
278 opp-microvolt = <1025000>;
281 opp-hz = /bits/ 64 <1608000000>;
282 opp-microvolt = <1100000>;
285 opp-hz = /bits/ 64 <1800000000>;
286 opp-microvolt = <1175000>;
289 opp-hz = /bits/ 64 <1992000000>;
290 opp-microvolt = <1250000>;
295 compatible = "operating-points-v2";
298 opp-hz = /bits/ 64 <200000000>;
299 opp-microvolt = <850000>;
302 opp-hz = /bits/ 64 <300000000>;
303 opp-microvolt = <900000>;
306 opp-hz = /bits/ 64 <400000000>;
307 opp-microvolt = <900000>;
310 opp-hz = /bits/ 64 <500000000>;
311 opp-microvolt = <950000>;
314 opp-hz = /bits/ 64 <600000000>;
315 opp-microvolt = <1000000>;
318 opp-hz = /bits/ 64 <800000000>;
319 opp-microvolt = <1050000>;
324 compatible = "rockchip,key";
327 io-channels = <&saradc 1>;
332 rockchip,adc_value = <1>;
337 label = "volume down";
338 rockchip,adc_value = <170>;
342 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
351 rockchip,adc_value = <746>;
357 rockchip,adc_value = <355>;
363 rockchip,adc_value = <560>;
369 rockchip,adc_value = <450>;
374 clock-frequency = <50000000>;
375 clock-freq-min-max = <400000 150000000>;
383 vqmmc-supply = <&vcc_sd>;
384 pinctrl-names = "default";
385 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
390 clock-frequency = <150000000>;
391 clock-freq-min-max = <200000 150000000>;
397 keep-power-in-suspend;
398 mmc-pwrseq = <&sdio_pwrseq>;
401 pinctrl-names = "default";
402 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
408 freq-sel = <200000000>;
419 mmc-hs400-enhanced-strobe;
425 rockchip,i2s-broken-burst-len;
426 rockchip,playback-channels = <8>;
427 rockchip,capture-channels = <8>;
428 #sound-dai-cells = <0>;
432 #sound-dai-cells = <0>;
437 #sound-dai-cells = <0>;
442 i2c-scl-rising-time-ns = <180>;
443 i2c-scl-falling-time-ns = <30>;
444 clock-frequency = <400000>;
446 vdd_cpu_b: syr837@40 {
447 compatible = "silergy,syr827";
449 vin-supply = <&vcc_sys>;
450 regulator-compatible = "fan53555-reg";
451 regulator-name = "vdd_cpu_b";
452 regulator-min-microvolt = <712500>;
453 regulator-max-microvolt = <1500000>;
454 regulator-ramp-delay = <1000>;
455 fcs,suspend-voltage-selector = <1>;
457 regulator-initial-state = <3>;
458 regulator-state-mem {
459 regulator-off-in-suspend;
464 compatible = "silergy,syr828";
467 vin-supply = <&vcc_sys>;
468 regulator-compatible = "fan53555-reg";
469 regulator-name = "vdd_gpu";
470 regulator-min-microvolt = <735000>;
471 regulator-max-microvolt = <1400000>;
472 regulator-ramp-delay = <1000>;
473 fcs,suspend-voltage-selector = <1>;
476 regulator-state-mem {
477 regulator-off-in-suspend;
482 compatible = "rockchip,rk818";
485 clock-output-names = "xin32k", "wifibt_32kin";
486 interrupt-parent = <&gpio1>;
487 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
488 pinctrl-names = "default";
489 pinctrl-0 = <&pmic_int_l>;
490 rockchip,system-power-controller;
491 rk818,support_dc_chg = <1>;/*1: dc chg; 0:usb chg*/
495 vcc1-supply = <&vcc_sys>;
496 vcc2-supply = <&vcc_sys>;
497 vcc3-supply = <&vcc_sys>;
498 vcc4-supply = <&vcc_sys>;
499 vcc6-supply = <&vcc_sys>;
500 vcc7-supply = <&vcc3v3_sys>;
501 vcc8-supply = <&vcc_sys>;
502 vcc9-supply = <&vcc3v3_sys>;
505 vdd_cpu_l: DCDC_REG1 {
506 regulator-name = "vdd_cpu_l";
509 regulator-min-microvolt = <750000>;
510 regulator-max-microvolt = <1350000>;
511 regulator-ramp-delay = <6001>;
512 regulator-state-mem {
513 regulator-off-in-suspend;
517 vdd_center: DCDC_REG2 {
518 regulator-name = "vdd_center";
521 regulator-min-microvolt = <800000>;
522 regulator-max-microvolt = <1350000>;
523 regulator-ramp-delay = <6001>;
524 regulator-state-mem {
525 regulator-on-in-suspend;
526 regulator-suspend-microvolt = <1000000>;
531 regulator-name = "vcc_ddr";
534 regulator-state-mem {
535 regulator-on-in-suspend;
540 regulator-name = "vcc_1v8";
543 regulator-min-microvolt = <1800000>;
544 regulator-max-microvolt = <1800000>;
545 regulator-state-mem {
546 regulator-on-in-suspend;
547 regulator-suspend-microvolt = <1800000>;
551 vcca3v0_codec: LDO_REG1 {
554 regulator-min-microvolt = <3000000>;
555 regulator-max-microvolt = <3000000>;
556 regulator-name = "vcca3v0_codec";
557 regulator-state-mem {
558 regulator-off-in-suspend;
562 vcc3v0_tp: LDO_REG2 {
565 regulator-min-microvolt = <3000000>;
566 regulator-max-microvolt = <3000000>;
567 regulator-name = "vcc3v0_tp";
568 regulator-state-mem {
569 regulator-off-in-suspend;
573 vcca1v8_codec: LDO_REG3 {
576 regulator-min-microvolt = <1800000>;
577 regulator-max-microvolt = <1800000>;
578 regulator-name = "vcca1v8_codec";
579 regulator-state-mem {
580 regulator-off-in-suspend;
584 vcc_power_on: LDO_REG4 {
587 regulator-min-microvolt = <3300000>;
588 regulator-max-microvolt = <3300000>;
589 regulator-name = "vcc_power_on";
590 regulator-state-mem {
591 regulator-on-in-suspend;
592 regulator-suspend-microvolt = <3300000>;
599 regulator-min-microvolt = <3000000>;
600 regulator-max-microvolt = <3000000>;
601 regulator-name = "vcc_3v0";
602 regulator-state-mem {
603 regulator-off-in-suspend;
610 regulator-min-microvolt = <1500000>;
611 regulator-max-microvolt = <1500000>;
612 regulator-name = "vcc_1v5";
613 regulator-state-mem {
614 regulator-off-in-suspend;
618 vcc1v8_dvp: LDO_REG7 {
621 regulator-min-microvolt = <1800000>;
622 regulator-max-microvolt = <1800000>;
623 regulator-name = "vcc1v8_dvp";
624 regulator-state-mem {
625 regulator-off-in-suspend;
629 vcc3v3_s3: LDO_REG8 {
632 regulator-min-microvolt = <3300000>;
633 regulator-max-microvolt = <3300000>;
634 regulator-name = "vcc3v3_s3";
635 regulator-state-mem {
636 regulator-on-in-suspend;
637 regulator-suspend-microvolt = <3300000>;
644 regulator-min-microvolt = <1800000>;
645 regulator-max-microvolt = <3300000>;
646 regulator-name = "vcc_sd";
647 regulator-state-mem {
648 regulator-on-in-suspend;
649 regulator-suspend-microvolt = <3300000>;
653 vcc3v3_s0: SWITCH_REG {
656 regulator-name = "vcc3v3_s0";
657 regulator-state-mem {
658 regulator-on-in-suspend;
664 ocv_table = <3400 3675 3689 3716 3740 3756 3768 3780
665 3793 3807 3827 3853 3896 3937 3974 4007 4066
666 4110 4161 4217 4308>;
667 design_capacity = <7916>;
668 design_qmax = <8708>;
670 max_input_current = <3000>;
671 max_chrg_current = <4500>;
672 max_chrg_voltage = <4350>;
673 sleep_enter_current = <300>;
674 sleep_exit_current = <300>;
675 power_off_thresd = <3400>;
676 zero_algorithm_vol = <3950>;
677 fb_temperature = <115>;
678 max_soc_offset = <60>;
690 i2c-scl-rising-time-ns = <140>;
691 i2c-scl-falling-time-ns = <30>;
694 #sound-dai-cells = <0>;
695 compatible = "everest,es8316";
697 pinctrl-names = "default";
698 pinctrl-0 = <&hp_det>;
699 clocks = <&cru SCLK_I2S_8CH_OUT>;
700 clock-names = "mclk";
701 spk-con-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
702 hp-det-gpio = <&gpio4 28 GPIO_ACTIVE_HIGH>;
708 i2c-scl-rising-time-ns = <345>;
709 i2c-scl-falling-time-ns = <11>;
710 clock-frequency = <400000>;
714 compatible = "lsm330_acc";
715 pinctrl-names = "default";
716 pinctrl-0 = <&lsm330a_irq_gpio>;
718 irq-gpio = <&gpio2 27 IRQ_TYPE_EDGE_RISING>;
719 type = <SENSOR_TYPE_ACCEL>;
721 poll_delay_ms = <30>;
727 compatible = "lsm330_gyro";
728 pinctrl-names = "default";
729 pinctrl-0 = <&lsm330g_irq_gpio>;
731 irq-gpio = <&gpio1 20 IRQ_TYPE_EDGE_RISING>;
732 type = <SENSOR_TYPE_GYROSCOPE>;
734 poll_delay_ms = <30>;
739 compatible = "invensense,mpu6500";
740 pinctrl-names = "default";
741 pinctrl-0 = <&mpu6500_irq_gpio>;
743 irq-gpio = <&gpio2 27 IRQ_TYPE_EDGE_RISING>;
744 mpu-int_config = <0x10>;
745 mpu-level_shifter = <0>;
746 mpu-orientation = <1 0 0 0 1 0 0 0 1>;
755 compatible = "ak8963";
756 pinctrl-names = "default";
757 pinctrl-0 = <&ak8963_irq_gpio>;
759 type = <SENSOR_TYPE_COMPASS>;
760 irq-gpio = <&gpio2 28 IRQ_TYPE_EDGE_RISING>;
762 poll_delay_ms = <30>;
768 compatible = "capella,light_cm3218";
769 pinctrl-names = "default";
770 pinctrl-0 = <&cm3218_irq_gpio>;
772 type = <SENSOR_TYPE_LIGHT>;
773 irq-gpio = <&gpio4 24 IRQ_TYPE_EDGE_RISING>;
775 poll_delay_ms = <30>;
781 i2c-scl-rising-time-ns = <150>;
782 i2c-scl-falling-time-ns = <30>;
783 clock-frequency = <400000>;
786 compatible = "goodix,gt9xx";
788 touch-gpio = <&gpio3 12 IRQ_TYPE_LEVEL_LOW>;
789 reset-gpio = <&gpio3 13 GPIO_ACTIVE_HIGH>;
793 tp-supply = <&vcc3v0_tp>;
806 cpu-supply = <&vdd_cpu_l>;
810 cpu-supply = <&vdd_cpu_l>;
814 cpu-supply = <&vdd_cpu_l>;
818 cpu-supply = <&vdd_cpu_l>;
822 cpu-supply = <&vdd_cpu_b>;
826 cpu-supply = <&vdd_cpu_b>;
831 mali-supply = <&vdd_gpu>;
840 max-freq = <50000000>;
843 compatible = "inv-spi,mpu6500";
844 pinctrl-names = "default";
845 pinctrl-0 = <&mpu6500_irq_gpio>;
846 irq-gpio = <&gpio2 27 IRQ_TYPE_EDGE_RISING>;
848 spi-max-frequency = <1000000>;
851 mpu-int_config = <0x00>;
852 mpu-level_shifter = <0>;
853 mpu-orientation = <1 0 0 0 1 0 0 0 1>;
862 rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
863 rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
870 u2phy0_otg: otg-port {
878 u2phy1_otg: otg-port {
882 u2phy1_host: host-port {
883 phy-supply = <&vcc5v0_host>;
889 pinctrl-names = "default";
890 pinctrl-0 = <&uart0_xfer &uart0_cts>;
944 wifi_enable_h: wifi-enable-h {
945 rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
950 uart0_gpios: uart0-gpios {
951 rockchip,pins = <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
956 pmic_int_l: pmic-int-l {
958 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
961 pmic_dvs2: pmic-dvs2 {
963 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
969 rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_up>;
974 lcdpwr_enable_h: lcdpwr-enable-h {
975 rockchip,pins = <3 8 RK_FUNC_GPIO &pcfg_pull_up>;
980 lsm330a_irq_gpio: lsm330a-irq-gpio {
981 rockchip,pins = <2 27 RK_FUNC_GPIO &pcfg_pull_none>;
986 lsm330g_irq_gpio: lsm330g-irq-gpio {
987 rockchip,pins = <1 20 RK_FUNC_GPIO &pcfg_pull_none>;
992 mpu6500_irq_gpio: mpu6500-irq-gpio {
993 rockchip,pins = <2 27 RK_FUNC_GPIO &pcfg_pull_none>;
998 ak8963_irq_gpio: ak8963-irq-gpio {
999 rockchip,pins = <2 28 RK_FUNC_GPIO &pcfg_pull_none>;
1004 cm3218_irq_gpio: cm3218-irq-gpio {
1005 rockchip,pins = <4 24 RK_FUNC_GPIO &pcfg_pull_none>;
1010 host_vbus_drv: host-vbus-drv {
1012 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
1018 #include <dt-bindings/display/screen-timing/lcd-LP097Qx2.dtsi>
1023 power_ctr: power_ctr {
1024 rockchip,debug = <0>;
1027 rockchip,power_type = <GPIO>;
1028 pinctrl-names = "default";
1029 pinctrl-0 = <&lcdpwr_enable_h>;
1030 gpios = <&gpio3 8 GPIO_ACTIVE_HIGH>;
1031 rockchip,delay = <10>;