2 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
45 #include "rk3399.dtsi"
46 #include "rk3399-android.dtsi"
47 #include "rk3399-opp.dtsi"
48 #include <dt-bindings/sensor-dev.h>
49 #include <dt-bindings/pwm/pwm.h>
52 compatible = "rockchip,rk3399-mid", "rockchip,rk3399";
54 hall_sensor: hall-mh248 {
55 compatible = "hall-mh248";
56 pinctrl-names = "default";
57 pinctrl-0 = <&mh248_irq_gpio>;
58 irq-gpio = <&gpio1 2 IRQ_TYPE_EDGE_BOTH>;
64 compatible = "regulator-fixed";
65 regulator-name = "vcc_sys";
68 regulator-min-microvolt = <3900000>;
69 regulator-max-microvolt = <3900000>;
72 vcc3v3_sys: vcc3v3-sys {
73 compatible = "regulator-fixed";
74 regulator-name = "vcc3v3_sys";
77 regulator-min-microvolt = <3300000>;
78 regulator-max-microvolt = <3300000>;
81 vcc5v0_host: vcc5v0-host-regulator {
82 compatible = "regulator-fixed";
84 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
85 pinctrl-names = "default";
86 pinctrl-0 = <&host_vbus_drv>;
87 regulator-name = "vcc5v0_host";
91 compatible = "pwm-regulator";
92 pwms = <&pwm2 0 25000 0>;
94 rockchip,pwm_voltage = <900000>;
95 regulator-name = "vdd_log";
96 regulator-min-microvolt = <750000>;
97 regulator-max-microvolt = <1350000>;
102 backlight: backlight {
103 compatible = "pwm-backlight";
104 pwms = <&vop0_pwm 0 25000 PWM_POLARITY_INVERTED>;
105 brightness-levels = <
106 0 1 51 52 52 53 53 54
107 54 55 55 56 56 57 57 58
108 58 59 59 60 61 61 62 63
109 63 64 65 65 66 67 67 68
110 69 69 70 71 71 72 73 73
111 74 75 75 76 77 77 78 79
112 79 80 80 81 81 82 83 83
113 84 85 86 86 87 88 89 89
114 90 91 92 92 93 94 95 95
115 96 97 98 98 99 100 101 101
116 102 103 104 104 105 106 107 107
117 108 109 110 110 111 112 113 113
118 114 115 116 116 117 118 119 119
119 120 121 122 122 123 124 125 125
120 126 127 128 128 129 130 131 131
121 132 133 134 134 135 136 137 137
122 138 139 140 140 141 142 143 143
123 144 145 146 146 147 148 149 149
124 150 151 152 152 153 154 155 155
125 156 157 158 158 159 160 161 161
126 162 163 164 164 165 166 167 167
127 168 169 170 170 171 172 173 173
128 174 175 176 176 177 178 179 179
129 180 181 182 182 183 184 185 185
130 186 187 188 188 189 190 191 191
131 216 217 218 218 219 220 221 221
132 222 223 224 224 225 226 227 227
133 228 229 230 230 231 232 233 233
134 234 235 236 236 237 238 239 239
135 240 241 242 242 243 244 245 245
136 246 247 248 248 249 250 251 251
137 252 253 254 254 255 255 255 255>;
138 default-brightness-level = <200>;
139 enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
142 vcc_phy: vcc-phy-regulator {
143 compatible = "regulator-fixed";
144 regulator-name = "vcc_phy";
150 compatible = "rockchip,rk3399-io-voltage-domain";
151 rockchip,grf = <&grf>;
153 bt656-supply = <&vcc1v8_dvp>;
154 audio-supply = <&vcca1v8_codec>;
155 sdmmc-supply = <&vcc_sd>;
156 gpio1830-supply = <&vcc_3v0>;
160 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
161 rockchip,grf = <&pmugrf>;
163 pmu1830-supply = <&vcc_1v8>;
167 compatible = "simple-audio-card";
168 simple-audio-card,format = "i2s";
169 simple-audio-card,name = "rockchip,es8316-codec";
170 simple-audio-card,mclk-fs = <256>;
171 simple-audio-card,widgets =
172 "Microphone", "Mic Jack",
173 "Headphone", "Headphone Jack";
174 simple-audio-card,routing =
175 "Mic Jack", "MICBIAS1",
177 "Headphone Jack", "HPOL",
178 "Headphone Jack", "HPOR";
179 simple-audio-card,cpu {
182 simple-audio-card,codec {
183 sound-dai = <&es8316>;
188 compatible = "simple-audio-card";
189 simple-audio-card,name = "rockchip,spdif";
190 simple-audio-card,cpu {
191 sound-dai = <&spdif>;
193 simple-audio-card,codec {
194 sound-dai = <&spdif_out>;
198 spdif_out: spdif-out {
199 compatible = "linux,spdif-dit";
200 #sound-dai-cells = <0>;
203 sdio_pwrseq: sdio-pwrseq {
204 compatible = "mmc-pwrseq-simple";
206 clock-names = "ext_clock";
207 pinctrl-names = "default";
208 pinctrl-0 = <&wifi_enable_h>;
211 * On the module itself this is one of these (depending
212 * on the actual card populated):
213 * - SDIO_RESET_L_WL_REG_ON
214 * - PDN (power down when low)
216 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
220 compatible = "wlan-platdata";
221 rockchip,grf = <&grf>;
222 wifi_chip_type = "ap6354";
224 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
229 compatible = "bluetooth-platdata";
231 clock-names = "ext_clock";
232 //wifi-bt-power-toggle;
233 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
234 pinctrl-names = "default", "rts_gpio";
235 pinctrl-0 = <&uart0_rts>;
236 pinctrl-1 = <&uart0_gpios>;
237 //BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
238 BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
239 BT,wake_gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
240 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
245 compatible = "rockchip,uboot-charge";
246 rockchip,uboot-charge-on = <0>;
247 rockchip,android-charge-on = <1>;
251 compatible = "rk-vibrator-gpio";
252 vibrator-gpio = <&gpio4 30 GPIO_ACTIVE_LOW>;
257 compatible = "rockchip_headset";
258 headset_gpio = <&gpio4 28 GPIO_ACTIVE_HIGH>;
259 pinctrl-names = "default";
260 pinctrl-0 = <&hp_det>;
261 io-channels = <&saradc 2>;
266 compatible = "rockchip,key";
269 io-channels = <&saradc 1>;
274 rockchip,adc_value = <1>;
279 label = "volume down";
280 rockchip,adc_value = <170>;
284 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
293 rockchip,adc_value = <746>;
299 rockchip,adc_value = <355>;
305 rockchip,adc_value = <560>;
311 rockchip,adc_value = <450>;
316 clock-frequency = <50000000>;
317 clock-freq-min-max = <400000 150000000>;
325 vqmmc-supply = <&vcc_sd>;
326 pinctrl-names = "default";
327 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
332 clock-frequency = <150000000>;
333 clock-freq-min-max = <200000 150000000>;
339 keep-power-in-suspend;
340 mmc-pwrseq = <&sdio_pwrseq>;
343 pinctrl-names = "default";
344 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
358 keep-power-in-suspend;
359 mmc-hs400-enhanced-strobe;
365 rockchip,i2s-broken-burst-len;
366 rockchip,playback-channels = <8>;
367 rockchip,capture-channels = <8>;
368 #sound-dai-cells = <0>;
372 #sound-dai-cells = <0>;
377 #sound-dai-cells = <0>;
382 i2c-scl-rising-time-ns = <180>;
383 i2c-scl-falling-time-ns = <30>;
384 clock-frequency = <400000>;
386 vdd_cpu_b: syr837@40 {
387 compatible = "silergy,syr827";
389 vin-supply = <&vcc_sys>;
390 regulator-compatible = "fan53555-reg";
391 pinctrl-0 = <&vsel1_gpio>;
392 vsel-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
393 regulator-name = "vdd_cpu_b";
394 regulator-min-microvolt = <712500>;
395 regulator-max-microvolt = <1500000>;
396 regulator-ramp-delay = <1000>;
397 fcs,suspend-voltage-selector = <1>;
399 regulator-initial-state = <3>;
400 regulator-state-mem {
401 regulator-off-in-suspend;
406 compatible = "silergy,syr828";
409 vin-supply = <&vcc_sys>;
410 regulator-compatible = "fan53555-reg";
411 pinctrl-0 = <&vsel2_gpio>;
412 vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
413 regulator-name = "vdd_gpu";
414 regulator-min-microvolt = <735000>;
415 regulator-max-microvolt = <1400000>;
416 regulator-ramp-delay = <1000>;
417 fcs,suspend-voltage-selector = <1>;
419 regulator-state-mem {
420 regulator-off-in-suspend;
425 compatible = "rockchip,rk818";
428 clock-output-names = "xin32k", "wifibt_32kin";
429 interrupt-parent = <&gpio1>;
430 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
431 pinctrl-names = "default";
432 pinctrl-0 = <&pmic_int_l>;
433 rockchip,system-power-controller;
434 rk818,support_dc_chg = <1>;/*1: dc chg; 0:usb chg*/
439 vcc1-supply = <&vcc_sys>;
440 vcc2-supply = <&vcc_sys>;
441 vcc3-supply = <&vcc_sys>;
442 vcc4-supply = <&vcc_sys>;
443 vcc6-supply = <&vcc_sys>;
444 vcc7-supply = <&vcc3v3_sys>;
445 vcc8-supply = <&vcc_sys>;
446 vcc9-supply = <&vcc3v3_sys>;
449 vdd_cpu_l: DCDC_REG1 {
450 regulator-name = "vdd_cpu_l";
453 regulator-min-microvolt = <750000>;
454 regulator-max-microvolt = <1350000>;
455 regulator-ramp-delay = <6001>;
456 regulator-state-mem {
457 regulator-off-in-suspend;
461 vdd_center: DCDC_REG2 {
462 regulator-name = "vdd_center";
465 regulator-min-microvolt = <800000>;
466 regulator-max-microvolt = <1350000>;
467 regulator-ramp-delay = <6001>;
468 regulator-state-mem {
469 regulator-off-in-suspend;
474 regulator-name = "vcc_ddr";
477 regulator-state-mem {
478 regulator-on-in-suspend;
483 regulator-name = "vcc_1v8";
486 regulator-min-microvolt = <1800000>;
487 regulator-max-microvolt = <1800000>;
488 regulator-state-mem {
489 regulator-on-in-suspend;
490 regulator-suspend-microvolt = <1800000>;
494 vcca3v0_codec: LDO_REG1 {
497 regulator-min-microvolt = <3000000>;
498 regulator-max-microvolt = <3000000>;
499 regulator-name = "vcca3v0_codec";
500 regulator-state-mem {
501 regulator-off-in-suspend;
505 vcc3v0_tp: LDO_REG2 {
508 regulator-min-microvolt = <3000000>;
509 regulator-max-microvolt = <3000000>;
510 regulator-name = "vcc3v0_tp";
511 regulator-state-mem {
512 regulator-off-in-suspend;
516 vcca1v8_codec: LDO_REG3 {
519 regulator-min-microvolt = <1800000>;
520 regulator-max-microvolt = <1800000>;
521 regulator-name = "vcca1v8_codec";
522 regulator-state-mem {
523 regulator-off-in-suspend;
527 vcc_power_on: LDO_REG4 {
530 regulator-min-microvolt = <3300000>;
531 regulator-max-microvolt = <3300000>;
532 regulator-name = "vcc_power_on";
533 regulator-state-mem {
534 regulator-on-in-suspend;
535 regulator-suspend-microvolt = <3300000>;
542 regulator-min-microvolt = <3000000>;
543 regulator-max-microvolt = <3000000>;
544 regulator-name = "vcc_3v0";
545 regulator-state-mem {
546 regulator-on-in-suspend;
547 regulator-suspend-microvolt = <3000000>;
554 regulator-min-microvolt = <1500000>;
555 regulator-max-microvolt = <1500000>;
556 regulator-name = "vcc_1v5";
557 regulator-state-mem {
558 regulator-on-in-suspend;
559 regulator-suspend-microvolt = <1500000>;
563 vcc1v8_dvp: LDO_REG7 {
566 regulator-min-microvolt = <1800000>;
567 regulator-max-microvolt = <1800000>;
568 regulator-name = "vcc1v8_dvp";
569 regulator-state-mem {
570 regulator-off-in-suspend;
574 vcc3v3_s3: LDO_REG8 {
577 regulator-min-microvolt = <3300000>;
578 regulator-max-microvolt = <3300000>;
579 regulator-name = "vcc3v3_s3";
580 regulator-state-mem {
581 regulator-off-in-suspend;
588 regulator-min-microvolt = <1800000>;
589 regulator-max-microvolt = <3300000>;
590 regulator-name = "vcc_sd";
591 regulator-state-mem {
592 regulator-on-in-suspend;
593 regulator-suspend-microvolt = <3300000>;
597 vcc3v3_s0: SWITCH_REG {
600 regulator-name = "vcc3v3_s0";
601 regulator-state-mem {
602 regulator-on-in-suspend;
608 compatible = "rk818-battery";
609 ocv_table = <3400 3675 3689 3716 3740 3756 3768 3780
610 3793 3807 3827 3853 3896 3937 3974 4007 4066
611 4110 4161 4217 4308>;
612 design_capacity = <7916>;
613 design_qmax = <8708>;
615 max_input_current = <3000>;
616 max_chrg_current = <3000>;
617 max_chrg_voltage = <4350>;
618 sleep_enter_current = <300>;
619 sleep_exit_current = <300>;
620 power_off_thresd = <3400>;
621 zero_algorithm_vol = <3950>;
622 fb_temperature = <105>;
624 max_soc_offset = <60>;
635 i2c-scl-rising-time-ns = <140>;
636 i2c-scl-falling-time-ns = <30>;
639 #sound-dai-cells = <0>;
640 compatible = "everest,es8316";
642 clocks = <&cru SCLK_I2S_8CH_OUT>;
643 clock-names = "mclk";
644 spk-con-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
650 i2c-scl-rising-time-ns = <345>;
651 i2c-scl-falling-time-ns = <11>;
652 clock-frequency = <400000>;
656 compatible = "lsm330_acc";
657 pinctrl-names = "default";
658 pinctrl-0 = <&lsm330a_irq_gpio>;
660 irq-gpio = <&gpio2 27 IRQ_TYPE_EDGE_RISING>;
661 type = <SENSOR_TYPE_ACCEL>;
663 poll_delay_ms = <30>;
664 power-off-in-suspend = <1>;
670 compatible = "lsm330_gyro";
671 pinctrl-names = "default";
672 pinctrl-0 = <&lsm330g_irq_gpio>;
674 irq-gpio = <&gpio1 20 IRQ_TYPE_EDGE_RISING>;
675 type = <SENSOR_TYPE_GYROSCOPE>;
677 power-off-in-suspend = <1>;
678 poll_delay_ms = <30>;
683 compatible = "invensense,mpu6500";
684 pinctrl-names = "default";
685 pinctrl-0 = <&mpu6500_irq_gpio>;
687 irq-gpio = <&gpio2 27 IRQ_TYPE_EDGE_RISING>;
688 mpu-int_config = <0x10>;
689 mpu-level_shifter = <0>;
690 mpu-orientation = <1 0 0 0 1 0 0 0 1>;
694 support-hw-poweroff = <1>;
700 compatible = "ak8963";
701 pinctrl-names = "default";
702 pinctrl-0 = <&ak8963_irq_gpio>;
704 type = <SENSOR_TYPE_COMPASS>;
705 irq-gpio = <&gpio2 28 IRQ_TYPE_EDGE_RISING>;
707 poll_delay_ms = <30>;
713 compatible = "capella,light_cm3218";
714 pinctrl-names = "default";
715 pinctrl-0 = <&cm3218_irq_gpio>;
717 type = <SENSOR_TYPE_LIGHT>;
718 irq-gpio = <&gpio4 24 IRQ_TYPE_EDGE_FALLING>;
720 poll_delay_ms = <30>;
724 compatible = "fairchild,fusb302";
726 pinctrl-names = "default";
727 pinctrl-0 = <&fusb0_int>;
728 int-n-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
735 i2c-scl-rising-time-ns = <150>;
736 i2c-scl-falling-time-ns = <30>;
737 clock-frequency = <400000>;
740 compatible = "goodix,gt9xx";
742 touch-gpio = <&gpio3 12 IRQ_TYPE_LEVEL_LOW>;
743 reset-gpio = <&gpio3 13 GPIO_ACTIVE_HIGH>;
747 tp-supply = <&vcc3v0_tp>;
760 cpu-supply = <&vdd_cpu_l>;
764 cpu-supply = <&vdd_cpu_l>;
768 cpu-supply = <&vdd_cpu_l>;
772 cpu-supply = <&vdd_cpu_l>;
776 cpu-supply = <&vdd_cpu_b>;
780 cpu-supply = <&vdd_cpu_b>;
785 mali-supply = <&vdd_gpu>;
794 max-freq = <50000000>;
797 compatible = "inv-spi,mpu6500";
798 pinctrl-names = "default";
799 pinctrl-0 = <&mpu6500_irq_gpio>;
800 irq-gpio = <&gpio2 27 IRQ_TYPE_EDGE_RISING>;
802 spi-max-frequency = <1000000>;
805 mpu-int_config = <0x00>;
806 mpu-level_shifter = <0>;
807 mpu-orientation = <1 0 0 0 1 0 0 0 1>;
811 support-hw-poweroff = <1>;
822 rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
823 rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
831 u2phy0_otg: otg-port {
835 u2phy0_host: host-port {
836 phy-supply = <&vcc5v0_host>;
842 pinctrl-names = "default";
843 pinctrl-0 = <&uart0_xfer &uart0_cts>;
869 assigned-clocks = <&cru SCLK_VOP0_PWM>;
870 assigned-clock-rates = <50000000>;
884 wifi_enable_h: wifi-enable-h {
885 rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
890 uart0_gpios: uart0-gpios {
891 rockchip,pins = <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
896 pmic_int_l: pmic-int-l {
898 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
901 pmic_dvs2: pmic-dvs2 {
903 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
905 vsel1_gpio: vsel1-gpio {
907 <1 17 RK_FUNC_GPIO &pcfg_pull_down>;
909 vsel2_gpio: vsel2-gpio {
911 <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
916 mh248_irq_gpio: mh248-irq-gpio {
917 rockchip,pins = <1 2 RK_FUNC_GPIO &pcfg_pull_up>;
923 rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_up>;
928 lcdpwr_enable_h: lcdpwr-enable-h {
929 rockchip,pins = <3 8 RK_FUNC_GPIO &pcfg_pull_up>;
934 lsm330a_irq_gpio: lsm330a-irq-gpio {
935 rockchip,pins = <2 27 RK_FUNC_GPIO &pcfg_pull_none>;
940 lsm330g_irq_gpio: lsm330g-irq-gpio {
941 rockchip,pins = <1 20 RK_FUNC_GPIO &pcfg_pull_none>;
946 mpu6500_irq_gpio: mpu6500-irq-gpio {
947 rockchip,pins = <2 27 RK_FUNC_GPIO &pcfg_pull_none>;
952 ak8963_irq_gpio: ak8963-irq-gpio {
953 rockchip,pins = <2 28 RK_FUNC_GPIO &pcfg_pull_none>;
958 cm3218_irq_gpio: cm3218-irq-gpio {
959 rockchip,pins = <4 24 RK_FUNC_GPIO &pcfg_pull_up>;
964 host_vbus_drv: host-vbus-drv {
966 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
971 fusb0_int: fusb0-int {
973 <1 1 RK_FUNC_GPIO &pcfg_pull_up>;
979 #include <dt-bindings/display/screen-timing/lcd-LP097Qx2.dtsi>
990 dp_vop_sel = <DISPLAY_SOURCE_LCDC1>;
995 rockchip,cabc_mode = <1>;
996 power_ctr: power_ctr {
997 rockchip,debug = <0>;
1000 rockchip,power_type = <GPIO>;
1001 pinctrl-names = "default";
1002 pinctrl-0 = <&lcdpwr_enable_h>;
1003 gpios = <&gpio3 8 GPIO_ACTIVE_HIGH>;
1004 rockchip,delay = <10>;