2 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
45 #include "rk3399.dtsi"
46 #include "rk3399-android.dtsi"
47 #include <dt-bindings/sensor-dev.h>
48 #include <dt-bindings/pwm/pwm.h>
51 compatible = "rockchip,rk3399-mid", "rockchip,rk3399";
54 compatible = "regulator-fixed";
55 regulator-name = "vcc_sys";
58 regulator-min-microvolt = <3900000>;
59 regulator-max-microvolt = <3900000>;
62 vcc3v3_sys: vcc3v3-sys {
63 compatible = "regulator-fixed";
64 regulator-name = "vcc3v3_sys";
67 regulator-min-microvolt = <3300000>;
68 regulator-max-microvolt = <3300000>;
71 vcc5v0_host: vcc5v0-host-regulator {
72 compatible = "regulator-fixed";
74 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
75 pinctrl-names = "default";
76 pinctrl-0 = <&host_vbus_drv>;
77 regulator-name = "vcc5v0_host";
81 compatible = "pwm-regulator";
82 pwms = <&pwm2 0 25000 0>;
84 rockchip,pwm_voltage = <900000>;
85 regulator-name = "vdd_log";
86 regulator-min-microvolt = <750000>;
87 regulator-max-microvolt = <1350000>;
92 backlight: backlight {
93 compatible = "pwm-backlight";
94 pwms = <&vop0_pwm 0 25000 PWM_POLARITY_INVERTED>;
96 0 255 51 51 52 53 53 54
97 54 55 56 56 57 57 58 59
98 59 60 60 61 62 62 63 63
99 64 65 65 66 66 67 68 68
100 69 69 70 71 71 72 72 73
101 74 74 75 75 76 77 77 78
102 78 79 80 80 81 81 82 83
103 83 84 85 85 86 86 87 88
104 88 89 89 90 91 91 92 92
105 93 94 94 95 95 96 97 97
106 98 98 99 100 100 101 101 102
107 103 103 104 104 105 106 106 107
108 107 108 109 109 110 110 111 112
109 112 113 113 114 114 115 116 116
110 117 118 118 119 119 120 120 121
111 122 122 123 123 124 125 125 126
112 126 127 128 128 129 129 130 131
113 131 132 132 133 133 134 135 135
114 136 137 138 138 139 140 140 141
115 141 142 143 143 144 144 145 146
116 146 147 148 148 149 149 149 150
117 150 151 151 151 152 152 152 153
118 153 153 154 154 155 156 156 157
119 157 158 159 159 160 160 161 161
120 162 163 163 164 165 165 166 166
121 167 168 168 169 169 170 171 171
122 172 172 173 174 174 175 175 176
123 176 177 178 178 179 179 180 181
124 181 182 183 183 184 185 185 186
125 186 187 188 188 189 189 190 190
126 191 191 192 193 193 194 194 195
127 196 197 197 198 199 199 200 200>;
128 default-brightness-level = <200>;
129 enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
132 vcc_phy: vcc-phy-regulator {
133 compatible = "regulator-fixed";
134 regulator-name = "vcc_phy";
140 compatible = "rockchip,rk3399-io-voltage-domain";
141 rockchip,grf = <&grf>;
143 bt656-supply = <&vcc1v8_dvp>;
144 audio-supply = <&vcca1v8_codec>;
145 sdmmc-supply = <&vcc_sd>;
146 gpio1830-supply = <&vcc_3v0>;
150 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
151 rockchip,grf = <&pmugrf>;
153 pmu1830-supply = <&vcc_1v8>;
157 compatible = "simple-audio-card";
158 simple-audio-card,format = "i2s";
159 simple-audio-card,name = "rockchip,es8316-codec";
160 simple-audio-card,mclk-fs = <256>;
161 simple-audio-card,widgets =
162 "Microphone", "Mic Jack",
163 "Headphone", "Headphone Jack";
164 simple-audio-card,routing =
165 "Mic Jack", "MICBIAS1",
167 "Headphone Jack", "HPOL",
168 "Headphone Jack", "HPOR";
169 simple-audio-card,cpu {
172 simple-audio-card,codec {
173 sound-dai = <&es8316>;
178 compatible = "simple-audio-card";
179 simple-audio-card,name = "rockchip,spdif";
180 simple-audio-card,cpu {
181 sound-dai = <&spdif>;
183 simple-audio-card,codec {
184 sound-dai = <&spdif_out>;
188 spdif_out: spdif-out {
189 compatible = "linux,spdif-dit";
190 #sound-dai-cells = <0>;
193 sdio_pwrseq: sdio-pwrseq {
194 compatible = "mmc-pwrseq-simple";
196 clock-names = "ext_clock";
197 pinctrl-names = "default";
198 pinctrl-0 = <&wifi_enable_h>;
201 * On the module itself this is one of these (depending
202 * on the actual card populated):
203 * - SDIO_RESET_L_WL_REG_ON
204 * - PDN (power down when low)
206 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
210 compatible = "wlan-platdata";
211 rockchip,grf = <&grf>;
212 wifi_chip_type = "ap6354";
214 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
219 compatible = "bluetooth-platdata";
221 clock-names = "ext_clock";
222 //wifi-bt-power-toggle;
223 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
224 pinctrl-names = "default", "rts_gpio";
225 pinctrl-0 = <&uart0_rts>;
226 pinctrl-1 = <&uart0_gpios>;
227 //BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
228 BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
229 BT,wake_gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
230 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
235 compatible = "rockchip,uboot-charge";
236 rockchip,uboot-charge-on = <0>;
237 rockchip,android-charge-on = <1>;
247 center-supply = <&vdd_center>;
249 downdifferential = <20>;
254 opp-hz = /bits/ 64 <300000000>;
255 opp-microvolt = <900000>;
258 opp-hz = /bits/ 64 <400000000>;
259 opp-microvolt = <900000>;
262 opp-hz = /bits/ 64 <528000000>;
263 opp-microvolt = <900000>;
266 opp-hz = /bits/ 64 <600000000>;
267 opp-microvolt = <900000>;
270 opp-hz = /bits/ 64 <666000000>;
271 opp-microvolt = <900000>;
278 opp-hz = /bits/ 64 <408000000>;
279 opp-microvolt = <800000>;
280 clock-latency-ns = <40000>;
283 opp-hz = /bits/ 64 <600000000>;
284 opp-microvolt = <800000>;
287 opp-hz = /bits/ 64 <816000000>;
288 opp-microvolt = <800000>;
291 opp-hz = /bits/ 64 <1008000000>;
292 opp-microvolt = <875000>;
295 opp-hz = /bits/ 64 <1200000000>;
296 opp-microvolt = <925000>;
299 opp-hz = /bits/ 64 <1416000000>;
300 opp-microvolt = <1050000>;
303 opp-hz = /bits/ 64 <1512000000>;
304 opp-microvolt = <1100000>;
310 opp-hz = /bits/ 64 <408000000>;
311 opp-microvolt = <800000>;
312 clock-latency-ns = <40000>;
315 opp-hz = /bits/ 64 <600000000>;
316 opp-microvolt = <800000>;
319 opp-hz = /bits/ 64 <816000000>;
320 opp-microvolt = <825000>;
323 opp-hz = /bits/ 64 <1008000000>;
324 opp-microvolt = <875000>;
327 opp-hz = /bits/ 64 <1200000000>;
328 opp-microvolt = <950000>;
331 opp-hz = /bits/ 64 <1416000000>;
332 opp-microvolt = <1025000>;
335 opp-hz = /bits/ 64 <1608000000>;
336 opp-microvolt = <1100000>;
339 opp-hz = /bits/ 64 <1800000000>;
340 opp-microvolt = <1175000>;
343 opp-hz = /bits/ 64 <1992000000>;
344 opp-microvolt = <1250000>;
353 518 335 /* 1008MHz */
354 617 428 /* 1200MHz */
355 728 573 /* 1416MHz */
356 827 724 /* 1608MHz */
357 925 900 /* 1800MHz */
358 1024 1108 /* 1992MHz */
389 518 335 /* 1008MHz */
390 617 428 /* 1200MHz */
391 728 573 /* 1416MHz */
392 827 724 /* 1608MHz */
393 925 900 /* 1800MHz */
394 1024 1108 /* 1992MHz */
421 compatible = "operating-points-v2";
424 opp-hz = /bits/ 64 <200000000>;
425 opp-microvolt = <825000>;
428 opp-hz = /bits/ 64 <300000000>;
429 opp-microvolt = <850000>;
432 opp-hz = /bits/ 64 <400000000>;
433 opp-microvolt = <875000>;
436 opp-hz = /bits/ 64 <500000000>;
437 opp-microvolt = <950000>;
440 opp-hz = /bits/ 64 <600000000>;
441 opp-microvolt = <1025000>;
444 opp-hz = /bits/ 64 <800000000>;
445 opp-microvolt = <1125000>;
450 compatible = "rockchip,key";
453 io-channels = <&saradc 1>;
458 rockchip,adc_value = <1>;
463 label = "volume down";
464 rockchip,adc_value = <170>;
468 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
477 rockchip,adc_value = <746>;
483 rockchip,adc_value = <355>;
489 rockchip,adc_value = <560>;
495 rockchip,adc_value = <450>;
500 clock-frequency = <50000000>;
501 clock-freq-min-max = <400000 150000000>;
509 vqmmc-supply = <&vcc_sd>;
510 pinctrl-names = "default";
511 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
516 clock-frequency = <150000000>;
517 clock-freq-min-max = <200000 150000000>;
523 keep-power-in-suspend;
524 mmc-pwrseq = <&sdio_pwrseq>;
527 pinctrl-names = "default";
528 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
534 freq-sel = <200000000>;
545 mmc-hs400-enhanced-strobe;
551 rockchip,i2s-broken-burst-len;
552 rockchip,playback-channels = <8>;
553 rockchip,capture-channels = <8>;
554 #sound-dai-cells = <0>;
558 #sound-dai-cells = <0>;
563 #sound-dai-cells = <0>;
568 i2c-scl-rising-time-ns = <180>;
569 i2c-scl-falling-time-ns = <30>;
570 clock-frequency = <400000>;
572 vdd_cpu_b: syr837@40 {
573 compatible = "silergy,syr827";
575 vin-supply = <&vcc_sys>;
576 regulator-compatible = "fan53555-reg";
577 pinctrl-0 = <&vsel1_gpio>;
578 vsel-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
579 regulator-name = "vdd_cpu_b";
580 regulator-min-microvolt = <712500>;
581 regulator-max-microvolt = <1500000>;
582 regulator-ramp-delay = <1000>;
583 fcs,suspend-voltage-selector = <1>;
585 regulator-initial-state = <3>;
586 regulator-state-mem {
587 regulator-off-in-suspend;
592 compatible = "silergy,syr828";
595 vin-supply = <&vcc_sys>;
596 regulator-compatible = "fan53555-reg";
597 pinctrl-0 = <&vsel2_gpio>;
598 vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
599 regulator-name = "vdd_gpu";
600 regulator-min-microvolt = <735000>;
601 regulator-max-microvolt = <1400000>;
602 regulator-ramp-delay = <1000>;
603 fcs,suspend-voltage-selector = <1>;
606 regulator-state-mem {
607 regulator-off-in-suspend;
612 compatible = "rockchip,rk818";
615 clock-output-names = "xin32k", "wifibt_32kin";
616 interrupt-parent = <&gpio1>;
617 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
618 pinctrl-names = "default";
619 pinctrl-0 = <&pmic_int_l>;
620 rockchip,system-power-controller;
621 rk818,support_dc_chg = <1>;/*1: dc chg; 0:usb chg*/
626 vcc1-supply = <&vcc_sys>;
627 vcc2-supply = <&vcc_sys>;
628 vcc3-supply = <&vcc_sys>;
629 vcc4-supply = <&vcc_sys>;
630 vcc6-supply = <&vcc_sys>;
631 vcc7-supply = <&vcc3v3_sys>;
632 vcc8-supply = <&vcc_sys>;
633 vcc9-supply = <&vcc3v3_sys>;
636 vdd_cpu_l: DCDC_REG1 {
637 regulator-name = "vdd_cpu_l";
640 regulator-min-microvolt = <750000>;
641 regulator-max-microvolt = <1350000>;
642 regulator-ramp-delay = <6001>;
643 regulator-state-mem {
644 regulator-off-in-suspend;
648 vdd_center: DCDC_REG2 {
649 regulator-name = "vdd_center";
652 regulator-min-microvolt = <800000>;
653 regulator-max-microvolt = <1350000>;
654 regulator-ramp-delay = <6001>;
655 regulator-state-mem {
656 regulator-off-in-suspend;
661 regulator-name = "vcc_ddr";
664 regulator-state-mem {
665 regulator-on-in-suspend;
670 regulator-name = "vcc_1v8";
673 regulator-min-microvolt = <1800000>;
674 regulator-max-microvolt = <1800000>;
675 regulator-state-mem {
676 regulator-on-in-suspend;
677 regulator-suspend-microvolt = <1800000>;
681 vcca3v0_codec: LDO_REG1 {
684 regulator-min-microvolt = <3000000>;
685 regulator-max-microvolt = <3000000>;
686 regulator-name = "vcca3v0_codec";
687 regulator-state-mem {
688 regulator-off-in-suspend;
692 vcc3v0_tp: LDO_REG2 {
695 regulator-min-microvolt = <3000000>;
696 regulator-max-microvolt = <3000000>;
697 regulator-name = "vcc3v0_tp";
698 regulator-state-mem {
699 regulator-off-in-suspend;
703 vcca1v8_codec: LDO_REG3 {
706 regulator-min-microvolt = <1800000>;
707 regulator-max-microvolt = <1800000>;
708 regulator-name = "vcca1v8_codec";
709 regulator-state-mem {
710 regulator-off-in-suspend;
714 vcc_power_on: LDO_REG4 {
717 regulator-min-microvolt = <3300000>;
718 regulator-max-microvolt = <3300000>;
719 regulator-name = "vcc_power_on";
720 regulator-state-mem {
721 regulator-on-in-suspend;
722 regulator-suspend-microvolt = <3300000>;
729 regulator-min-microvolt = <3000000>;
730 regulator-max-microvolt = <3000000>;
731 regulator-name = "vcc_3v0";
732 regulator-state-mem {
733 regulator-off-in-suspend;
740 regulator-min-microvolt = <1500000>;
741 regulator-max-microvolt = <1500000>;
742 regulator-name = "vcc_1v5";
743 regulator-state-mem {
744 regulator-off-in-suspend;
748 vcc1v8_dvp: LDO_REG7 {
751 regulator-min-microvolt = <1800000>;
752 regulator-max-microvolt = <1800000>;
753 regulator-name = "vcc1v8_dvp";
754 regulator-state-mem {
755 regulator-off-in-suspend;
759 vcc3v3_s3: LDO_REG8 {
762 regulator-min-microvolt = <3300000>;
763 regulator-max-microvolt = <3300000>;
764 regulator-name = "vcc3v3_s3";
765 regulator-state-mem {
766 regulator-off-in-suspend;
773 regulator-min-microvolt = <1800000>;
774 regulator-max-microvolt = <3300000>;
775 regulator-name = "vcc_sd";
776 regulator-state-mem {
777 regulator-on-in-suspend;
778 regulator-suspend-microvolt = <3300000>;
782 vcc3v3_s0: SWITCH_REG {
785 regulator-name = "vcc3v3_s0";
786 regulator-state-mem {
787 regulator-on-in-suspend;
793 compatible = "rk818-battery";
794 ocv_table = <3400 3675 3689 3716 3740 3756 3768 3780
795 3793 3807 3827 3853 3896 3937 3974 4007 4066
796 4110 4161 4217 4308>;
797 design_capacity = <7916>;
798 design_qmax = <8708>;
800 max_input_current = <3000>;
801 max_chrg_current = <3000>;
802 max_chrg_voltage = <4350>;
803 sleep_enter_current = <300>;
804 sleep_exit_current = <300>;
805 power_off_thresd = <3400>;
806 zero_algorithm_vol = <3950>;
807 fb_temperature = <105>;
809 max_soc_offset = <60>;
820 i2c-scl-rising-time-ns = <140>;
821 i2c-scl-falling-time-ns = <30>;
824 #sound-dai-cells = <0>;
825 compatible = "everest,es8316";
827 pinctrl-names = "default";
828 pinctrl-0 = <&hp_det>;
829 clocks = <&cru SCLK_I2S_8CH_OUT>;
830 clock-names = "mclk";
831 spk-con-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
832 hp-det-gpio = <&gpio4 28 GPIO_ACTIVE_HIGH>;
838 i2c-scl-rising-time-ns = <345>;
839 i2c-scl-falling-time-ns = <11>;
840 clock-frequency = <400000>;
844 compatible = "lsm330_acc";
845 pinctrl-names = "default";
846 pinctrl-0 = <&lsm330a_irq_gpio>;
848 irq-gpio = <&gpio2 27 IRQ_TYPE_EDGE_RISING>;
849 type = <SENSOR_TYPE_ACCEL>;
851 poll_delay_ms = <30>;
857 compatible = "lsm330_gyro";
858 pinctrl-names = "default";
859 pinctrl-0 = <&lsm330g_irq_gpio>;
861 irq-gpio = <&gpio1 20 IRQ_TYPE_EDGE_RISING>;
862 type = <SENSOR_TYPE_GYROSCOPE>;
864 poll_delay_ms = <30>;
869 compatible = "invensense,mpu6500";
870 pinctrl-names = "default";
871 pinctrl-0 = <&mpu6500_irq_gpio>;
873 irq-gpio = <&gpio2 27 IRQ_TYPE_EDGE_RISING>;
874 mpu-int_config = <0x10>;
875 mpu-level_shifter = <0>;
876 mpu-orientation = <1 0 0 0 1 0 0 0 1>;
880 support-hw-poweroff = <1>;
886 compatible = "ak8963";
887 pinctrl-names = "default";
888 pinctrl-0 = <&ak8963_irq_gpio>;
890 type = <SENSOR_TYPE_COMPASS>;
891 irq-gpio = <&gpio2 28 IRQ_TYPE_EDGE_RISING>;
893 poll_delay_ms = <30>;
899 compatible = "capella,light_cm3218";
900 pinctrl-names = "default";
901 pinctrl-0 = <&cm3218_irq_gpio>;
903 type = <SENSOR_TYPE_LIGHT>;
904 irq-gpio = <&gpio4 24 IRQ_TYPE_EDGE_FALLING>;
906 poll_delay_ms = <30>;
910 compatible = "fairchild,fusb302";
912 pinctrl-names = "default";
913 pinctrl-0 = <&fusb0_int>;
914 int-n-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
921 i2c-scl-rising-time-ns = <150>;
922 i2c-scl-falling-time-ns = <30>;
923 clock-frequency = <400000>;
926 compatible = "goodix,gt9xx";
928 touch-gpio = <&gpio3 12 IRQ_TYPE_LEVEL_LOW>;
929 reset-gpio = <&gpio3 13 GPIO_ACTIVE_HIGH>;
933 tp-supply = <&vcc3v0_tp>;
946 cpu-supply = <&vdd_cpu_l>;
950 cpu-supply = <&vdd_cpu_l>;
954 cpu-supply = <&vdd_cpu_l>;
958 cpu-supply = <&vdd_cpu_l>;
962 cpu-supply = <&vdd_cpu_b>;
966 cpu-supply = <&vdd_cpu_b>;
971 mali-supply = <&vdd_gpu>;
980 max-freq = <50000000>;
983 compatible = "inv-spi,mpu6500";
984 pinctrl-names = "default";
985 pinctrl-0 = <&mpu6500_irq_gpio>;
986 irq-gpio = <&gpio2 27 IRQ_TYPE_EDGE_RISING>;
988 spi-max-frequency = <1000000>;
991 mpu-int_config = <0x00>;
992 mpu-level_shifter = <0>;
993 mpu-orientation = <1 0 0 0 1 0 0 0 1>;
997 support-hw-poweroff = <1>;
1008 rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
1009 rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
1017 u2phy0_otg: otg-port {
1021 u2phy0_host: host-port {
1022 phy-supply = <&vcc5v0_host>;
1028 pinctrl-names = "default";
1029 pinctrl-0 = <&uart0_xfer &uart0_cts>;
1055 assigned-clocks = <&cru SCLK_VOP0_PWM>;
1056 assigned-clock-rates = <50000000>;
1070 wifi_enable_h: wifi-enable-h {
1071 rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
1075 wireless-bluetooth {
1076 uart0_gpios: uart0-gpios {
1077 rockchip,pins = <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
1082 pmic_int_l: pmic-int-l {
1084 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
1087 pmic_dvs2: pmic-dvs2 {
1089 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
1091 vsel1_gpio: vsel1-gpio {
1093 <1 17 RK_FUNC_GPIO &pcfg_pull_down>;
1095 vsel2_gpio: vsel2-gpio {
1097 <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
1103 rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_up>;
1108 lcdpwr_enable_h: lcdpwr-enable-h {
1109 rockchip,pins = <3 8 RK_FUNC_GPIO &pcfg_pull_up>;
1114 lsm330a_irq_gpio: lsm330a-irq-gpio {
1115 rockchip,pins = <2 27 RK_FUNC_GPIO &pcfg_pull_none>;
1120 lsm330g_irq_gpio: lsm330g-irq-gpio {
1121 rockchip,pins = <1 20 RK_FUNC_GPIO &pcfg_pull_none>;
1126 mpu6500_irq_gpio: mpu6500-irq-gpio {
1127 rockchip,pins = <2 27 RK_FUNC_GPIO &pcfg_pull_none>;
1132 ak8963_irq_gpio: ak8963-irq-gpio {
1133 rockchip,pins = <2 28 RK_FUNC_GPIO &pcfg_pull_none>;
1138 cm3218_irq_gpio: cm3218-irq-gpio {
1139 rockchip,pins = <4 24 RK_FUNC_GPIO &pcfg_pull_up>;
1144 host_vbus_drv: host-vbus-drv {
1146 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
1151 fusb0_int: fusb0-int {
1153 <1 1 RK_FUNC_GPIO &pcfg_pull_up>;
1159 #include <dt-bindings/display/screen-timing/lcd-LP097Qx2.dtsi>
1164 rockchip,cabc_mode = <1>;
1165 power_ctr: power_ctr {
1166 rockchip,debug = <0>;
1169 rockchip,power_type = <GPIO>;
1170 pinctrl-names = "default";
1171 pinctrl-0 = <&lcdpwr_enable_h>;
1172 gpios = <&gpio3 8 GPIO_ACTIVE_HIGH>;
1173 rockchip,delay = <10>;