2 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
45 #include "rk3399.dtsi"
46 #include "rk3399-android.dtsi"
47 #include <dt-bindings/sensor-dev.h>
48 #include <dt-bindings/pwm/pwm.h>
51 compatible = "rockchip,rk3399-mid", "rockchip,rk3399";
54 compatible = "regulator-fixed";
55 regulator-name = "vcc_sys";
58 regulator-min-microvolt = <3900000>;
59 regulator-max-microvolt = <3900000>;
62 vcc3v3_sys: vcc3v3-sys {
63 compatible = "regulator-fixed";
64 regulator-name = "vcc3v3_sys";
67 regulator-min-microvolt = <3300000>;
68 regulator-max-microvolt = <3300000>;
71 vcc5v0_host: vcc5v0-host-regulator {
72 compatible = "regulator-fixed";
74 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
75 pinctrl-names = "default";
76 pinctrl-0 = <&host_vbus_drv>;
77 regulator-name = "vcc5v0_host";
81 compatible = "pwm-regulator";
82 pwms = <&pwm2 0 25000 0>;
84 rockchip,pwm_voltage = <900000>;
85 regulator-name = "vdd_log";
86 regulator-min-microvolt = <750000>;
87 regulator-max-microvolt = <1350000>;
92 backlight: backlight {
93 compatible = "pwm-backlight";
94 pwms = <&vop0_pwm 0 25000 PWM_POLARITY_INVERTED>;
96 0 255 51 51 52 53 53 54
97 54 55 56 56 57 57 58 59
98 59 60 60 61 62 62 63 63
99 64 65 65 66 66 67 68 68
100 69 69 70 71 71 72 72 73
101 74 74 75 75 76 77 77 78
102 78 79 80 80 81 81 82 83
103 83 84 85 85 86 86 87 88
104 88 89 89 90 91 91 92 92
105 93 94 94 95 95 96 97 97
106 98 98 99 100 100 101 101 102
107 103 103 104 104 105 106 106 107
108 107 108 109 109 110 110 111 112
109 112 113 113 114 114 115 116 116
110 117 118 118 119 119 120 120 121
111 122 122 123 123 124 125 125 126
112 126 127 128 128 129 129 130 131
113 131 132 132 133 133 134 135 135
114 136 137 138 138 139 140 140 141
115 141 142 143 143 144 144 145 146
116 146 147 148 148 149 149 149 150
117 150 151 151 151 152 152 152 153
118 153 153 154 154 155 156 156 157
119 157 158 159 159 160 160 161 161
120 162 163 163 164 165 165 166 166
121 167 168 168 169 169 170 171 171
122 172 172 173 174 174 175 175 176
123 176 177 178 178 179 179 180 181
124 181 182 183 183 184 185 185 186
125 186 187 188 188 189 189 190 190
126 191 191 192 193 193 194 194 195
127 196 197 197 198 199 199 200 200>;
128 default-brightness-level = <200>;
129 enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
132 vcc_phy: vcc-phy-regulator {
133 compatible = "regulator-fixed";
134 regulator-name = "vcc_phy";
140 compatible = "rockchip,rk3399-io-voltage-domain";
141 rockchip,grf = <&grf>;
143 bt656-supply = <&vcc1v8_dvp>;
144 audio-supply = <&vcca1v8_codec>;
145 sdmmc-supply = <&vcc_sd>;
146 gpio1830-supply = <&vcc_3v0>;
150 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
151 rockchip,grf = <&pmugrf>;
153 pmu1830-supply = <&vcc_1v8>;
157 compatible = "simple-audio-card";
158 simple-audio-card,format = "i2s";
159 simple-audio-card,name = "rockchip,es8316-codec";
160 simple-audio-card,mclk-fs = <256>;
161 simple-audio-card,widgets =
162 "Microphone", "Mic Jack",
163 "Headphone", "Headphone Jack";
164 simple-audio-card,routing =
165 "Mic Jack", "MICBIAS1",
167 "Headphone Jack", "HPOL",
168 "Headphone Jack", "HPOR";
169 simple-audio-card,cpu {
172 simple-audio-card,codec {
173 sound-dai = <&es8316>;
178 compatible = "simple-audio-card";
179 simple-audio-card,name = "rockchip,spdif";
180 simple-audio-card,cpu {
181 sound-dai = <&spdif>;
183 simple-audio-card,codec {
184 sound-dai = <&spdif_out>;
188 spdif_out: spdif-out {
189 compatible = "linux,spdif-dit";
190 #sound-dai-cells = <0>;
193 sdio_pwrseq: sdio-pwrseq {
194 compatible = "mmc-pwrseq-simple";
196 clock-names = "ext_clock";
197 pinctrl-names = "default";
198 pinctrl-0 = <&wifi_enable_h>;
201 * On the module itself this is one of these (depending
202 * on the actual card populated):
203 * - SDIO_RESET_L_WL_REG_ON
204 * - PDN (power down when low)
206 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
210 compatible = "wlan-platdata";
211 rockchip,grf = <&grf>;
212 wifi_chip_type = "ap6354";
214 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
219 compatible = "bluetooth-platdata";
220 //wifi-bt-power-toggle;
221 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
222 pinctrl-names = "default", "rts_gpio";
223 pinctrl-0 = <&uart0_rts>;
224 pinctrl-1 = <&uart0_gpios>;
225 //BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
226 BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
227 BT,wake_gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
228 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
233 compatible = "rockchip,uboot-charge";
234 rockchip,uboot-charge-on = <0>;
235 rockchip,android-charge-on = <1>;
241 opp-hz = /bits/ 64 <408000000>;
242 opp-microvolt = <800000>;
243 clock-latency-ns = <40000>;
246 opp-hz = /bits/ 64 <600000000>;
247 opp-microvolt = <800000>;
250 opp-hz = /bits/ 64 <816000000>;
251 opp-microvolt = <800000>;
254 opp-hz = /bits/ 64 <1008000000>;
255 opp-microvolt = <875000>;
258 opp-hz = /bits/ 64 <1200000000>;
259 opp-microvolt = <925000>;
262 opp-hz = /bits/ 64 <1416000000>;
263 opp-microvolt = <1050000>;
266 opp-hz = /bits/ 64 <1512000000>;
267 opp-microvolt = <1075000>;
273 opp-hz = /bits/ 64 <408000000>;
274 opp-microvolt = <800000>;
275 clock-latency-ns = <40000>;
278 opp-hz = /bits/ 64 <600000000>;
279 opp-microvolt = <800000>;
282 opp-hz = /bits/ 64 <816000000>;
283 opp-microvolt = <825000>;
286 opp-hz = /bits/ 64 <1008000000>;
287 opp-microvolt = <875000>;
290 opp-hz = /bits/ 64 <1200000000>;
291 opp-microvolt = <950000>;
294 opp-hz = /bits/ 64 <1416000000>;
295 opp-microvolt = <1025000>;
298 opp-hz = /bits/ 64 <1608000000>;
299 opp-microvolt = <1100000>;
302 opp-hz = /bits/ 64 <1800000000>;
303 opp-microvolt = <1175000>;
306 opp-hz = /bits/ 64 <1992000000>;
307 opp-microvolt = <1250000>;
312 compatible = "operating-points-v2";
315 opp-hz = /bits/ 64 <200000000>;
316 opp-microvolt = <850000>;
319 opp-hz = /bits/ 64 <300000000>;
320 opp-microvolt = <900000>;
323 opp-hz = /bits/ 64 <400000000>;
324 opp-microvolt = <900000>;
327 opp-hz = /bits/ 64 <500000000>;
328 opp-microvolt = <950000>;
331 opp-hz = /bits/ 64 <600000000>;
332 opp-microvolt = <1000000>;
335 opp-hz = /bits/ 64 <800000000>;
336 opp-microvolt = <1050000>;
341 compatible = "rockchip,key";
344 io-channels = <&saradc 1>;
349 rockchip,adc_value = <1>;
354 label = "volume down";
355 rockchip,adc_value = <170>;
359 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
368 rockchip,adc_value = <746>;
374 rockchip,adc_value = <355>;
380 rockchip,adc_value = <560>;
386 rockchip,adc_value = <450>;
391 clock-frequency = <50000000>;
392 clock-freq-min-max = <400000 150000000>;
400 vqmmc-supply = <&vcc_sd>;
401 pinctrl-names = "default";
402 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
407 clock-frequency = <150000000>;
408 clock-freq-min-max = <200000 150000000>;
414 keep-power-in-suspend;
415 mmc-pwrseq = <&sdio_pwrseq>;
418 pinctrl-names = "default";
419 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
425 freq-sel = <200000000>;
436 mmc-hs400-enhanced-strobe;
442 rockchip,i2s-broken-burst-len;
443 rockchip,playback-channels = <8>;
444 rockchip,capture-channels = <8>;
445 #sound-dai-cells = <0>;
449 #sound-dai-cells = <0>;
454 #sound-dai-cells = <0>;
459 i2c-scl-rising-time-ns = <180>;
460 i2c-scl-falling-time-ns = <30>;
461 clock-frequency = <400000>;
463 vdd_cpu_b: syr837@40 {
464 compatible = "silergy,syr827";
466 vin-supply = <&vcc_sys>;
467 regulator-compatible = "fan53555-reg";
468 pinctrl-0 = <&vsel1_gpio>;
469 vsel-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
470 regulator-name = "vdd_cpu_b";
471 regulator-min-microvolt = <712500>;
472 regulator-max-microvolt = <1500000>;
473 regulator-ramp-delay = <1000>;
474 fcs,suspend-voltage-selector = <1>;
476 regulator-initial-state = <3>;
477 regulator-state-mem {
478 regulator-off-in-suspend;
483 compatible = "silergy,syr828";
486 vin-supply = <&vcc_sys>;
487 regulator-compatible = "fan53555-reg";
488 pinctrl-0 = <&vsel2_gpio>;
489 vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
490 regulator-name = "vdd_gpu";
491 regulator-min-microvolt = <735000>;
492 regulator-max-microvolt = <1400000>;
493 regulator-ramp-delay = <1000>;
494 fcs,suspend-voltage-selector = <1>;
497 regulator-state-mem {
498 regulator-off-in-suspend;
503 compatible = "rockchip,rk818";
506 clock-output-names = "xin32k", "wifibt_32kin";
507 interrupt-parent = <&gpio1>;
508 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
509 pinctrl-names = "default";
510 pinctrl-0 = <&pmic_int_l>;
511 rockchip,system-power-controller;
512 rk818,support_dc_chg = <1>;/*1: dc chg; 0:usb chg*/
517 vcc1-supply = <&vcc_sys>;
518 vcc2-supply = <&vcc_sys>;
519 vcc3-supply = <&vcc_sys>;
520 vcc4-supply = <&vcc_sys>;
521 vcc6-supply = <&vcc_sys>;
522 vcc7-supply = <&vcc3v3_sys>;
523 vcc8-supply = <&vcc_sys>;
524 vcc9-supply = <&vcc3v3_sys>;
527 vdd_cpu_l: DCDC_REG1 {
528 regulator-name = "vdd_cpu_l";
531 regulator-min-microvolt = <750000>;
532 regulator-max-microvolt = <1350000>;
533 regulator-ramp-delay = <6001>;
534 regulator-state-mem {
535 regulator-off-in-suspend;
539 vdd_center: DCDC_REG2 {
540 regulator-name = "vdd_center";
543 regulator-min-microvolt = <800000>;
544 regulator-max-microvolt = <1350000>;
545 regulator-ramp-delay = <6001>;
546 regulator-state-mem {
547 regulator-off-in-suspend;
552 regulator-name = "vcc_ddr";
555 regulator-state-mem {
556 regulator-on-in-suspend;
561 regulator-name = "vcc_1v8";
564 regulator-min-microvolt = <1800000>;
565 regulator-max-microvolt = <1800000>;
566 regulator-state-mem {
567 regulator-on-in-suspend;
568 regulator-suspend-microvolt = <1800000>;
572 vcca3v0_codec: LDO_REG1 {
575 regulator-min-microvolt = <3000000>;
576 regulator-max-microvolt = <3000000>;
577 regulator-name = "vcca3v0_codec";
578 regulator-state-mem {
579 regulator-off-in-suspend;
583 vcc3v0_tp: LDO_REG2 {
586 regulator-min-microvolt = <3000000>;
587 regulator-max-microvolt = <3000000>;
588 regulator-name = "vcc3v0_tp";
589 regulator-state-mem {
590 regulator-off-in-suspend;
594 vcca1v8_codec: LDO_REG3 {
597 regulator-min-microvolt = <1800000>;
598 regulator-max-microvolt = <1800000>;
599 regulator-name = "vcca1v8_codec";
600 regulator-state-mem {
601 regulator-off-in-suspend;
605 vcc_power_on: LDO_REG4 {
608 regulator-min-microvolt = <3300000>;
609 regulator-max-microvolt = <3300000>;
610 regulator-name = "vcc_power_on";
611 regulator-state-mem {
612 regulator-on-in-suspend;
613 regulator-suspend-microvolt = <3300000>;
620 regulator-min-microvolt = <3000000>;
621 regulator-max-microvolt = <3000000>;
622 regulator-name = "vcc_3v0";
623 regulator-state-mem {
624 regulator-off-in-suspend;
631 regulator-min-microvolt = <1500000>;
632 regulator-max-microvolt = <1500000>;
633 regulator-name = "vcc_1v5";
634 regulator-state-mem {
635 regulator-off-in-suspend;
639 vcc1v8_dvp: LDO_REG7 {
642 regulator-min-microvolt = <1800000>;
643 regulator-max-microvolt = <1800000>;
644 regulator-name = "vcc1v8_dvp";
645 regulator-state-mem {
646 regulator-off-in-suspend;
650 vcc3v3_s3: LDO_REG8 {
653 regulator-min-microvolt = <3300000>;
654 regulator-max-microvolt = <3300000>;
655 regulator-name = "vcc3v3_s3";
656 regulator-state-mem {
657 regulator-off-in-suspend;
664 regulator-min-microvolt = <1800000>;
665 regulator-max-microvolt = <3300000>;
666 regulator-name = "vcc_sd";
667 regulator-state-mem {
668 regulator-on-in-suspend;
669 regulator-suspend-microvolt = <3300000>;
673 vcc3v3_s0: SWITCH_REG {
676 regulator-name = "vcc3v3_s0";
677 regulator-state-mem {
678 regulator-on-in-suspend;
684 compatible = "rk818-battery";
685 ocv_table = <3400 3675 3689 3716 3740 3756 3768 3780
686 3793 3807 3827 3853 3896 3937 3974 4007 4066
687 4110 4161 4217 4308>;
688 design_capacity = <7916>;
689 design_qmax = <8708>;
691 max_input_current = <3000>;
692 max_chrg_current = <3000>;
693 max_chrg_voltage = <4350>;
694 sleep_enter_current = <300>;
695 sleep_exit_current = <300>;
696 power_off_thresd = <3400>;
697 zero_algorithm_vol = <3950>;
698 fb_temperature = <105>;
700 max_soc_offset = <60>;
711 i2c-scl-rising-time-ns = <140>;
712 i2c-scl-falling-time-ns = <30>;
715 #sound-dai-cells = <0>;
716 compatible = "everest,es8316";
718 pinctrl-names = "default";
719 pinctrl-0 = <&hp_det>;
720 clocks = <&cru SCLK_I2S_8CH_OUT>;
721 clock-names = "mclk";
722 spk-con-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
723 hp-det-gpio = <&gpio4 28 GPIO_ACTIVE_HIGH>;
729 i2c-scl-rising-time-ns = <345>;
730 i2c-scl-falling-time-ns = <11>;
731 clock-frequency = <400000>;
735 compatible = "lsm330_acc";
736 pinctrl-names = "default";
737 pinctrl-0 = <&lsm330a_irq_gpio>;
739 irq-gpio = <&gpio2 27 IRQ_TYPE_EDGE_RISING>;
740 type = <SENSOR_TYPE_ACCEL>;
742 poll_delay_ms = <30>;
748 compatible = "lsm330_gyro";
749 pinctrl-names = "default";
750 pinctrl-0 = <&lsm330g_irq_gpio>;
752 irq-gpio = <&gpio1 20 IRQ_TYPE_EDGE_RISING>;
753 type = <SENSOR_TYPE_GYROSCOPE>;
755 poll_delay_ms = <30>;
760 compatible = "invensense,mpu6500";
761 pinctrl-names = "default";
762 pinctrl-0 = <&mpu6500_irq_gpio>;
764 irq-gpio = <&gpio2 27 IRQ_TYPE_EDGE_RISING>;
765 mpu-int_config = <0x10>;
766 mpu-level_shifter = <0>;
767 mpu-orientation = <1 0 0 0 1 0 0 0 1>;
776 compatible = "ak8963";
777 pinctrl-names = "default";
778 pinctrl-0 = <&ak8963_irq_gpio>;
780 type = <SENSOR_TYPE_COMPASS>;
781 irq-gpio = <&gpio2 28 IRQ_TYPE_EDGE_RISING>;
783 poll_delay_ms = <30>;
789 compatible = "capella,light_cm3218";
790 pinctrl-names = "default";
791 pinctrl-0 = <&cm3218_irq_gpio>;
793 type = <SENSOR_TYPE_LIGHT>;
794 irq-gpio = <&gpio4 24 IRQ_TYPE_EDGE_FALLING>;
796 poll_delay_ms = <30>;
800 compatible = "fairchild,fusb302";
802 pinctrl-names = "default";
803 pinctrl-0 = <&fusb0_int>;
804 int-n-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
811 i2c-scl-rising-time-ns = <150>;
812 i2c-scl-falling-time-ns = <30>;
813 clock-frequency = <400000>;
816 compatible = "goodix,gt9xx";
818 touch-gpio = <&gpio3 12 IRQ_TYPE_LEVEL_LOW>;
819 reset-gpio = <&gpio3 13 GPIO_ACTIVE_HIGH>;
823 tp-supply = <&vcc3v0_tp>;
836 cpu-supply = <&vdd_cpu_l>;
840 cpu-supply = <&vdd_cpu_l>;
844 cpu-supply = <&vdd_cpu_l>;
848 cpu-supply = <&vdd_cpu_l>;
852 cpu-supply = <&vdd_cpu_b>;
856 cpu-supply = <&vdd_cpu_b>;
861 mali-supply = <&vdd_gpu>;
870 max-freq = <50000000>;
873 compatible = "inv-spi,mpu6500";
874 pinctrl-names = "default";
875 pinctrl-0 = <&mpu6500_irq_gpio>;
876 irq-gpio = <&gpio2 27 IRQ_TYPE_EDGE_RISING>;
878 spi-max-frequency = <1000000>;
881 mpu-int_config = <0x00>;
882 mpu-level_shifter = <0>;
883 mpu-orientation = <1 0 0 0 1 0 0 0 1>;
897 rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
898 rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
906 u2phy0_otg: otg-port {
910 u2phy0_host: host-port {
911 phy-supply = <&vcc5v0_host>;
917 pinctrl-names = "default";
918 pinctrl-0 = <&uart0_xfer &uart0_cts>;
944 assigned-clocks = <&cru SCLK_VOP0_PWM>;
945 assigned-clock-rates = <50000000>;
959 wifi_enable_h: wifi-enable-h {
960 rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
965 uart0_gpios: uart0-gpios {
966 rockchip,pins = <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
971 pmic_int_l: pmic-int-l {
973 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
976 pmic_dvs2: pmic-dvs2 {
978 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
980 vsel1_gpio: vsel1-gpio {
982 <1 17 RK_FUNC_GPIO &pcfg_pull_down>;
984 vsel2_gpio: vsel2-gpio {
986 <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
992 rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_up>;
997 lcdpwr_enable_h: lcdpwr-enable-h {
998 rockchip,pins = <3 8 RK_FUNC_GPIO &pcfg_pull_up>;
1003 lsm330a_irq_gpio: lsm330a-irq-gpio {
1004 rockchip,pins = <2 27 RK_FUNC_GPIO &pcfg_pull_none>;
1009 lsm330g_irq_gpio: lsm330g-irq-gpio {
1010 rockchip,pins = <1 20 RK_FUNC_GPIO &pcfg_pull_none>;
1015 mpu6500_irq_gpio: mpu6500-irq-gpio {
1016 rockchip,pins = <2 27 RK_FUNC_GPIO &pcfg_pull_none>;
1021 ak8963_irq_gpio: ak8963-irq-gpio {
1022 rockchip,pins = <2 28 RK_FUNC_GPIO &pcfg_pull_none>;
1027 cm3218_irq_gpio: cm3218-irq-gpio {
1028 rockchip,pins = <4 24 RK_FUNC_GPIO &pcfg_pull_up>;
1033 host_vbus_drv: host-vbus-drv {
1035 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
1040 fusb0_int: fusb0-int {
1042 <1 1 RK_FUNC_GPIO &pcfg_pull_up>;
1048 #include <dt-bindings/display/screen-timing/lcd-LP097Qx2.dtsi>
1053 rockchip,cabc_mode = <1>;
1054 power_ctr: power_ctr {
1055 rockchip,debug = <0>;
1058 rockchip,power_type = <GPIO>;
1059 pinctrl-names = "default";
1060 pinctrl-0 = <&lcdpwr_enable_h>;
1061 gpios = <&gpio3 8 GPIO_ACTIVE_HIGH>;
1062 rockchip,delay = <10>;