arch/arm64/boot/dts/rockchip/rk3399-evb.dtsi

   1 /*
   2  * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This file is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of the
  12  *     License, or (at your option) any later version.
  13  *
  14  *     This file is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  * Or, alternatively,
  20  *
  21  *  b) Permission is hereby granted, free of charge, to any person
  22  *     obtaining a copy of this software and associated documentation
  23  *     files (the "Software"), to deal in the Software without
  24  *     restriction, including without limitation the rights to use,
  25  *     copy, modify, merge, publish, distribute, sublicense, and/or
  26  *     sell copies of the Software, and to permit persons to whom the
  27  *     Software is furnished to do so, subject to the following
  28  *     conditions:
  29  *
  30  *     The above copyright notice and this permission notice shall be
  31  *     included in all copies or substantial portions of the Software.
  32  *
  33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  40  *     OTHER DEALINGS IN THE SOFTWARE.
  41  */
  42
  43 #include <dt-bindings/pwm/pwm.h>
  44 #include "rk3399.dtsi"
  45
  46 / {
  47         compatible = "rockchip,rk3399-evb", "rockchip,rk3399";
  48
  49         vdd_center: vdd-center {
  50                 compatible = "pwm-regulator";
  51                 pwms = <&pwm3 0 25000 0>;
  52                 regulator-name = "vdd_center";
  53                 regulator-min-microvolt = <800000>;
  54                 regulator-max-microvolt = <1400000>;
  55                 regulator-always-on;
  56                 regulator-boot-on;
  57         };
  58
  59         vcc3v3_sys: vcc3v3-sys {
  60                 compatible = "regulator-fixed";
  61                 regulator-name = "vcc3v3_sys";
  62                 regulator-always-on;
  63                 regulator-boot-on;
  64                 regulator-min-microvolt = <3300000>;
  65                 regulator-max-microvolt = <3300000>;
  66         };
  67
  68         backlight: backlight {
  69                 compatible = "pwm-backlight";
  70                 pwms = <&pwm0 0 25000 0>;
  71                 brightness-levels = <
  72                           0   1   2   3   4   5   6   7
  73                           8   9  10  11  12  13  14  15
  74                          16  17  18  19  20  21  22  23
  75                          24  25  26  27  28  29  30  31
  76                          32  33  34  35  36  37  38  39
  77                          40  41  42  43  44  45  46  47
  78                          48  49  50  51  52  53  54  55
  79                          56  57  58  59  60  61  62  63
  80                          64  65  66  67  68  69  70  71
  81                          72  73  74  75  76  77  78  79
  82                          80  81  82  83  84  85  86  87
  83                          88  89  90  91  92  93  94  95
  84                          96  97  98  99 100 101 102 103
  85                         104 105 106 107 108 109 110 111
  86                         112 113 114 115 116 117 118 119
  87                         120 121 122 123 124 125 126 127
  88                         128 129 130 131 132 133 134 135
  89                         136 137 138 139 140 141 142 143
  90                         144 145 146 147 148 149 150 151
  91                         152 153 154 155 156 157 158 159
  92                         160 161 162 163 164 165 166 167
  93                         168 169 170 171 172 173 174 175
  94                         176 177 178 179 180 181 182 183
  95                         184 185 186 187 188 189 190 191
  96                         192 193 194 195 196 197 198 199
  97                         200 201 202 203 204 205 206 207
  98                         208 209 210 211 212 213 214 215
  99                         216 217 218 219 220 221 222 223
 100                         224 225 226 227 228 229 230 231
 101                         232 233 234 235 236 237 238 239
 102                         240 241 242 243 244 245 246 247
 103                         248 249 250 251 252 253 254 255>;
 104                 default-brightness-level = <200>;
 105                 enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
 106         };
 107
 108         clkin_gmac: external-gmac-clock {
 109                 compatible = "fixed-clock";
 110                 clock-frequency = <125000000>;
 111                 clock-output-names = "clkin_gmac";
 112                 #clock-cells = <0>;
 113         };
 114
 115         vcc_phy: vcc-phy-regulator {
 116                 compatible = "regulator-fixed";
 117                 regulator-name = "vcc_phy";
 118                 regulator-always-on;
 119                 regulator-boot-on;
 120         };
 121
 122         io-domains {
 123                 compatible = "rockchip,rk3399-io-voltage-domain";
 124                 rockchip,grf = <&grf>;
 125
 126                 bt656-supply = <&vcc1v8_dvp>;
 127                 audio-supply = <&vcca1v8_codec>;
 128                 sdmmc-supply = <&vcc_sd>;
 129                 gpio1830-supply = <&vcc_3v0>;
 130         };
 131
 132         pmu-io-domains {
 133                 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
 134                 rockchip,grf = <&pmugrf>;
 135
 136                 pmu1830-supply = <&vcc1v8_pmu>;
 137         };
 138
 139         es8316-sound {
 140                 compatible = "simple-audio-card";
 141                 simple-audio-card,format = "i2s";
 142                 simple-audio-card,name = "rockchip,es8316-codec";
 143                 simple-audio-card,mclk-fs = <256>;
 144                 simple-audio-card,widgets =
 145                         "Microphone", "Mic Jack",
 146                         "Headphone", "Headphone Jack";
 147                 simple-audio-card,routing =
 148                         "Mic Jack", "MICBIAS1",
 149                         "IN1P", "Mic Jack",
 150                         "Headphone Jack", "HPOL",
 151                         "Headphone Jack", "HPOR";
 152                 simple-audio-card,cpu {
 153                         sound-dai = <&i2s0>;
 154                 };
 155                 simple-audio-card,codec {
 156                         sound-dai = <&es8316>;
 157                 };
 158         };
 159
 160         spdif_sound: spdif-sound {
 161                 status = "disabled";
 162                 compatible = "simple-audio-card";
 163                 simple-audio-card,name = "ROCKCHIP,SPDIF";
 164                 simple-audio-card,cpu {
 165                         sound-dai = <&spdif>;
 166                 };
 167                 simple-audio-card,codec {
 168                         sound-dai = <&spdif_out>;
 169                 };
 170         };
 171
 172         spdif_out: spdif-out {
 173                 status = "disabled";
 174                 compatible = "linux,spdif-dit";
 175                 #sound-dai-cells = <0>;
 176         };
 177
 178         sdio_pwrseq: sdio-pwrseq {
 179                 compatible = "mmc-pwrseq-simple";
 180                 clocks = <&rk808 1>;
 181                 clock-names = "ext_clock";
 182                 pinctrl-names = "default";
 183                 pinctrl-0 = <&wifi_enable_h>;
 184
 185                 /*
 186                  * On the module itself this is one of these (depending
 187                  * on the actual card populated):
 188                  * - SDIO_RESET_L_WL_REG_ON
 189                  * - PDN (power down when low)
 190                  */
 191                 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
 192         };
 193
 194         wireless-wlan {
 195                 compatible = "wlan-platdata";
 196                 rockchip,grf = <&grf>;
 197                 wifi_chip_type = "ap6354";
 198                 sdio_vref = <1800>;
 199                 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
 200                 status = "okay";
 201         };
 202
 203         wireless-bluetooth {
 204                 compatible = "bluetooth-platdata";
 205                 //wifi-bt-power-toggle;
 206                 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
 207                 pinctrl-names = "default", "rts_gpio";
 208                 pinctrl-0 = <&uart0_rts>;
 209                 pinctrl-1 = <&uart0_gpios>;
 210                 //BT,power_gpio  = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
 211                 BT,reset_gpio    = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
 212                 BT,wake_gpio     = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
 213                 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
 214                 status = "okay";
 215         };
 216 };
 217
 218 &cpu_l0 {
 219         cpu-supply = <&vdd_cpu_l>;
 220 };
 221
 222 &cpu_l1 {
 223         cpu-supply = <&vdd_cpu_l>;
 224 };
 225
 226 &cpu_l2 {
 227         cpu-supply = <&vdd_cpu_l>;
 228 };
 229
 230 &cpu_l3 {
 231         cpu-supply = <&vdd_cpu_l>;
 232 };
 233
 234 &cpu_b0 {
 235         cpu-supply = <&vdd_cpu_b>;
 236 };
 237
 238 &cpu_b1 {
 239         cpu-supply = <&vdd_cpu_b>;
 240 };
 241
 242 &gpu {
 243         status = "okay";
 244         mali-supply = <&vdd_gpu>;
 245 };
 246
 247 &sdmmc {
 248         clock-frequency = <150000000>;
 249         clock-freq-min-max = <400000 150000000>;
 250         supports-sd;
 251         bus-width = <4>;
 252         cap-mmc-highspeed;
 253         cap-sd-highspeed;
 254         disable-wp;
 255         num-slots = <1>;
 256         sd-uhs-sdr104;
 257         vqmmc-supply = <&vcc_sd>;
 258         pinctrl-names = "default";
 259         pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
 260         status = "okay";
 261 };
 262
 263 &sdio0 {
 264         clock-frequency = <50000000>;
 265         clock-freq-min-max = <200000 50000000>;
 266         supports-sdio;
 267         bus-width = <4>;
 268         disable-wp;
 269         cap-sd-highspeed;
 270         cap-sdio-irq;
 271         keep-power-in-suspend;
 272         mmc-pwrseq = <&sdio_pwrseq>;
 273         non-removable;
 274         num-slots = <1>;
 275         pinctrl-names = "default";
 276         pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
 277         sd-uhs-sdr104;
 278         status = "okay";
 279 };
 280
 281 &emmc_phy {
 282         freq-sel = <200000000>;
 283         dr-sel = <50>;
 284         opdelay = <4>;
 285         status = "okay";
 286 };
 287
 288 &sdhci {
 289         bus-width = <8>;
 290         mmc-hs400-1_8v;
 291         supports-emmc;
 292         non-removable;
 293         keep-power-in-suspend;
 294         mmc-hs400-enhanced-strobe;
 295         status = "okay";
 296 };
 297
 298 &i2s0 {
 299         status = "okay";
 300         rockchip,i2s-broken-burst-len;
 301         rockchip,playback-channels = <8>;
 302         rockchip,capture-channels = <8>;
 303         #sound-dai-cells = <0>;
 304 };
 305
 306 &i2s2 {
 307         #sound-dai-cells = <0>;
 308 };
 309
 310 &spdif {
 311         #sound-dai-cells = <0>;
 312 };
 313
 314 &i2c0 {
 315         status = "okay";
 316         i2c-scl-rising-time-ns = <450>;
 317         i2c-scl-falling-time-ns = <15>;
 318 };
 319
 320 &i2c1 {
 321         status = "okay";
 322         i2c-scl-rising-time-ns = <300>;
 323         i2c-scl-falling-time-ns = <15>;
 324
 325         es8316: es8316@10 {
 326                 #sound-dai-cells = <0>;
 327                 compatible = "everest,es8316";
 328                 reg = <0x10>;
 329                 clocks = <&cru SCLK_I2S_8CH_OUT>;
 330                 clock-names = "mclk";
 331                 spk-con-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
 332                 hp-det-gpio = <&gpio4 28 GPIO_ACTIVE_LOW>;
 333         };
 334 };
 335
 336 &i2c4 {
 337         status = "okay";
 338         i2c-scl-rising-time-ns = <600>;
 339         i2c-scl-falling-time-ns = <20>;
 340
 341         gt9xx: gt9xx@14 {
 342                 compatible = "goodix,gt9xx";
 343                 reg = <0x14>;
 344                 touch-gpio = <&gpio1 20 IRQ_TYPE_LEVEL_LOW>;
 345                 reset-gpio = <&gpio4 22 GPIO_ACTIVE_HIGH>;
 346                 max-x = <1200>;
 347                 max-y = <1900>;
 348                 tp-size = <911>;
 349                 tp-supply = <&vcc3v0_tp>;
 350         };
 351 };
 352
 353 &pcie0 {
 354         assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
 355         assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
 356         assigned-clock-rates = <100000000>;
 357         ep-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
 358         num-lanes = <4>;
 359         pinctrl-names = "default";
 360         pinctrl-0 = <&pcie_clkreqn>;
 361         status = "okay";
 362 };
 363
 364 &tsadc {
 365         rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
 366         rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
 367         status = "okay";
 368 };
 369
 370 &uart0 {
 371         pinctrl-names = "default";
 372         pinctrl-0 = <&uart0_xfer &uart0_cts>;
 373         status = "okay";
 374 };
 375
 376 &uart2 {
 377         status = "okay";
 378 };
 379
 380 &usb2phy {
 381         vbus_drv-gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
 382 };
 383
 384 &usb_host0_ehci {
 385         status = "okay";
 386 };
 387
 388 &usb_host0_ohci {
 389         status = "okay";
 390 };
 391
 392 &usb_host1_ehci {
 393         status = "okay";
 394 };
 395
 396 &usb_host1_ohci {
 397         status = "okay";
 398 };
 399
 400 &usbdrd3_0 {
 401         status = "okay";
 402 };
 403
 404 &usbdrd_dwc3_0 {
 405         status = "okay";
 406 };
 407
 408 &usbdrd3_1 {
 409         status = "okay";
 410 };
 411
 412 &usbdrd_dwc3_1 {
 413         status = "okay";
 414 };
 415
 416 &pwm0 {
 417         status = "okay";
 418 };
 419
 420 &pwm3 {
 421         status = "okay";
 422 };
 423
 424 &gmac {
 425         phy-supply = <&vcc_phy>;
 426         phy-mode = "rgmii";
 427         clock_in_out = "input";
 428         snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
 429         snps,reset-active-low;
 430         snps,reset-delays-us = <0 10000 50000>;
 431         assigned-clocks = <&cru SCLK_RMII_SRC>;
 432         assigned-clock-parents = <&clkin_gmac>;
 433         pinctrl-names = "default";
 434         pinctrl-0 = <&rgmii_pins>;
 435         tx_delay = <0x28>;
 436         rx_delay = <0x11>;
 437         status = "okay";
 438 };
 439
 440 &saradc {
 441         status = "okay";
 442 };
 443
 444 &pinctrl {
 445         sdio-pwrseq {
 446                 wifi_enable_h: wifi-enable-h {
 447                         rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
 448                 };
 449         };
 450
 451         wireless-bluetooth {
 452                 uart0_gpios: uart0-gpios {
 453                         rockchip,pins = <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
 454                 };
 455         };
 456
 457         pmic {
 458                 pmic_int_l: pmic-int-l {
 459                         rockchip,pins =
 460                                 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
 461                 };
 462
 463                 pmic_dvs2: pmic-dvs2 {
 464                         rockchip,pins =
 465                                 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
 466                 };
 467         };
 468 };