2 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
43 #include <dt-bindings/pwm/pwm.h>
44 #include "rk3399.dtsi"
47 compatible = "rockchip,rk3399-evb", "rockchip,rk3399";
49 vcc3v3_sys: vcc3v3-sys {
50 compatible = "regulator-fixed";
51 regulator-name = "vcc3v3_sys";
54 regulator-min-microvolt = <3300000>;
55 regulator-max-microvolt = <3300000>;
58 vcc5v0_host: vcc5v0-host-regulator {
59 compatible = "regulator-fixed";
61 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
62 pinctrl-names = "default";
63 pinctrl-0 = <&host_vbus_drv>;
64 regulator-name = "vcc5v0_host";
67 backlight: backlight {
68 compatible = "pwm-backlight";
69 pwms = <&pwm0 0 25000 0>;
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85 112 113 114 115 116 117 118 119
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87 128 129 130 131 132 133 134 135
88 136 137 138 139 140 141 142 143
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99 224 225 226 227 228 229 230 231
100 232 233 234 235 236 237 238 239
101 240 241 242 243 244 245 246 247
102 248 249 250 251 252 253 254 255>;
103 default-brightness-level = <200>;
106 clkin_gmac: external-gmac-clock {
107 compatible = "fixed-clock";
108 clock-frequency = <125000000>;
109 clock-output-names = "clkin_gmac";
113 vcc_phy: vcc-phy-regulator {
114 compatible = "regulator-fixed";
115 regulator-name = "vcc_phy";
121 compatible = "rockchip,rk3399-io-voltage-domain";
122 rockchip,grf = <&grf>;
124 bt656-supply = <&vcc1v8_dvp>;
125 audio-supply = <&vcca1v8_codec>;
126 sdmmc-supply = <&vcc_sd>;
127 gpio1830-supply = <&vcc_3v0>;
131 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
132 rockchip,grf = <&pmugrf>;
134 pmu1830-supply = <&vcc1v8_pmu>;
138 compatible = "simple-audio-card";
139 simple-audio-card,format = "i2s";
140 simple-audio-card,name = "rockchip,es8316-codec";
141 simple-audio-card,mclk-fs = <256>;
142 simple-audio-card,widgets =
143 "Microphone", "Mic Jack",
144 "Headphone", "Headphone Jack";
145 simple-audio-card,routing =
146 "Mic Jack", "MICBIAS1",
148 "Headphone Jack", "HPOL",
149 "Headphone Jack", "HPOR";
150 simple-audio-card,cpu {
153 simple-audio-card,codec {
154 sound-dai = <&es8316>;
158 hdmi_sound: hdmi-sound {
160 compatible = "simple-audio-card";
161 simple-audio-card,format = "i2s";
162 simple-audio-card,mclk-fs = <256>;
163 simple-audio-card,name = "rockchip,hdmi";
164 simple-audio-card,cpu {
167 simple-audio-card,codec {
168 sound-dai = <&dw_hdmi_audio>;
172 dw_hdmi_audio: dw-hdmi-audio {
174 compatible = "rockchip,dw-hdmi-audio";
175 #sound-dai-cells = <0>;
178 spdif_sound: spdif-sound {
180 compatible = "simple-audio-card";
181 simple-audio-card,name = "ROCKCHIP,SPDIF";
182 simple-audio-card,cpu {
183 sound-dai = <&spdif>;
185 simple-audio-card,codec {
186 sound-dai = <&spdif_out>;
190 spdif_out: spdif-out {
192 compatible = "linux,spdif-dit";
193 #sound-dai-cells = <0>;
196 sdio_pwrseq: sdio-pwrseq {
197 compatible = "mmc-pwrseq-simple";
199 clock-names = "ext_clock";
200 pinctrl-names = "default";
201 pinctrl-0 = <&wifi_enable_h>;
204 * On the module itself this is one of these (depending
205 * on the actual card populated):
206 * - SDIO_RESET_L_WL_REG_ON
207 * - PDN (power down when low)
209 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
213 compatible = "wlan-platdata";
214 rockchip,grf = <&grf>;
215 wifi_chip_type = "ap6354";
217 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
222 compatible = "bluetooth-platdata";
224 clock-names = "ext_clock";
225 //wifi-bt-power-toggle;
226 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
227 pinctrl-names = "default", "rts_gpio";
228 pinctrl-0 = <&uart0_rts>;
229 pinctrl-1 = <&uart0_gpios>;
230 //BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
231 BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
232 BT,wake_gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
233 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
243 cpu-supply = <&vdd_cpu_l>;
247 cpu-supply = <&vdd_cpu_l>;
251 cpu-supply = <&vdd_cpu_l>;
255 cpu-supply = <&vdd_cpu_l>;
259 cpu-supply = <&vdd_cpu_b>;
263 cpu-supply = <&vdd_cpu_b>;
268 mali-supply = <&vdd_gpu>;
272 clock-frequency = <150000000>;
273 clock-freq-min-max = <400000 150000000>;
281 vqmmc-supply = <&vcc_sd>;
282 pinctrl-names = "default";
283 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
288 clock-frequency = <150000000>;
289 clock-freq-min-max = <200000 150000000>;
295 keep-power-in-suspend;
296 mmc-pwrseq = <&sdio_pwrseq>;
299 pinctrl-names = "default";
300 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
306 freq-sel = <200000000>;
318 center-supply = <&vdd_center>;
320 downdifferential = <40>;
325 opp-hz = /bits/ 64 <200000000>;
326 opp-microvolt = <900000>;
329 opp-hz = /bits/ 64 <300000000>;
330 opp-microvolt = <900000>;
333 opp-hz = /bits/ 64 <400000000>;
334 opp-microvolt = <900000>;
337 opp-hz = /bits/ 64 <528000000>;
338 opp-microvolt = <900000>;
341 opp-hz = /bits/ 64 <600000000>;
342 opp-microvolt = <900000>;
345 opp-hz = /bits/ 64 <666000000>;
346 opp-microvolt = <900000>;
350 opp-hz = /bits/ 64 <800000000>;
351 opp-microvolt = <900000>;
360 keep-power-in-suspend;
361 mmc-hs400-enhanced-strobe;
367 rockchip,i2s-broken-burst-len;
368 rockchip,playback-channels = <8>;
369 rockchip,capture-channels = <8>;
370 #sound-dai-cells = <0>;
374 #sound-dai-cells = <0>;
378 #sound-dai-cells = <0>;
383 i2c-scl-rising-time-ns = <450>;
384 i2c-scl-falling-time-ns = <15>;
389 i2c-scl-rising-time-ns = <300>;
390 i2c-scl-falling-time-ns = <15>;
393 #sound-dai-cells = <0>;
394 compatible = "everest,es8316";
396 clocks = <&cru SCLK_I2S_8CH_OUT>;
397 clock-names = "mclk";
398 spk-con-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
399 hp-det-gpio = <&gpio4 28 GPIO_ACTIVE_LOW>;
405 i2c-scl-rising-time-ns = <600>;
406 i2c-scl-falling-time-ns = <20>;
409 compatible = "goodix,gt9xx";
411 touch-gpio = <&gpio1 20 IRQ_TYPE_LEVEL_LOW>;
412 reset-gpio = <&gpio4 22 GPIO_ACTIVE_HIGH>;
416 tp-supply = <&vcc3v0_tp>;
419 gsl3673: gsl3673@40 {
420 compatible = "GSL,GSL3673";
422 screen_max_x = <1536>;
423 screen_max_y = <2048>;
424 irq_gpio_number = <&gpio1 20 IRQ_TYPE_LEVEL_LOW>;
425 rst_gpio_number = <&gpio4 22 GPIO_ACTIVE_HIGH>;
434 ep-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
436 pinctrl-names = "default";
437 pinctrl-0 = <&pcie_clkreqn>;
452 rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
453 rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
461 u2phy0_otg: otg-port {
465 u2phy0_host: host-port {
466 phy-supply = <&vcc5v0_host>;
475 u2phy1_otg: otg-port {
479 u2phy1_host: host-port {
480 phy-supply = <&vcc5v0_host>;
486 pinctrl-names = "default";
487 pinctrl-0 = <&uart0_xfer &uart0_cts>;
534 phy-supply = <&vcc_phy>;
536 clock_in_out = "input";
537 snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
538 snps,reset-active-low;
539 snps,reset-delays-us = <0 10000 50000>;
540 assigned-clocks = <&cru SCLK_RMII_SRC>;
541 assigned-clock-parents = <&clkin_gmac>;
542 pinctrl-names = "default";
543 pinctrl-0 = <&rgmii_pins>;
555 wifi_enable_h: wifi-enable-h {
556 rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
561 uart0_gpios: uart0-gpios {
562 rockchip,pins = <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
567 pmic_int_l: pmic-int-l {
569 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
572 pmic_dvs2: pmic-dvs2 {
574 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
576 vsel1_gpio: vsel1-gpio {
578 <1 17 RK_FUNC_GPIO &pcfg_pull_down>;
580 vsel2_gpio: vsel2-gpio {
582 <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
587 host_vbus_drv: host-vbus-drv {
589 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
594 fusb0_int: fusb0-int {
595 rockchip,pins = <1 2 RK_FUNC_GPIO &pcfg_pull_up>;
598 fusb1_int: fusb1-int {
599 rockchip,pins = <1 24 RK_FUNC_GPIO &pcfg_pull_up>;