2 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
43 #include <dt-bindings/pwm/pwm.h>
44 #include "rk3399.dtsi"
47 compatible = "rockchip,rk3399-evb", "rockchip,rk3399";
49 vdd_center: vdd-center {
50 compatible = "pwm-regulator";
51 pwms = <&pwm3 0 25000 0>;
52 regulator-name = "vdd_center";
53 regulator-min-microvolt = <800000>;
54 regulator-max-microvolt = <1400000>;
59 vcc3v3_sys: vcc3v3-sys {
60 compatible = "regulator-fixed";
61 regulator-name = "vcc3v3_sys";
64 regulator-min-microvolt = <3300000>;
65 regulator-max-microvolt = <3300000>;
68 backlight: backlight {
69 compatible = "pwm-backlight";
70 pwms = <&pwm0 0 25000 0>;
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102 240 241 242 243 244 245 246 247
103 248 249 250 251 252 253 254 255>;
104 default-brightness-level = <200>;
105 enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
108 clkin_gmac: external-gmac-clock {
109 compatible = "fixed-clock";
110 clock-frequency = <125000000>;
111 clock-output-names = "clkin_gmac";
115 vcc_phy: vcc-phy-regulator {
116 compatible = "regulator-fixed";
117 regulator-name = "vcc_phy";
123 compatible = "rockchip,rk3399-io-voltage-domain";
124 rockchip,grf = <&grf>;
126 bt656-supply = <&vcc1v8_dvp>;
127 audio-supply = <&vcca1v8_codec>;
128 sdmmc-supply = <&vcc_sd>;
129 gpio1830-supply = <&vcc_3v0>;
133 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
134 rockchip,grf = <&pmugrf>;
136 pmu1830-supply = <&vcc1v8_pmu>;
140 compatible = "simple-audio-card";
141 simple-audio-card,format = "i2s";
142 simple-audio-card,name = "rockchip,es8316-codec";
143 simple-audio-card,mclk-fs = <256>;
144 simple-audio-card,widgets =
145 "Microphone", "Mic Jack",
146 "Headphone", "Headphone Jack";
147 simple-audio-card,routing =
148 "Mic Jack", "MICBIAS1",
150 "Headphone Jack", "HPOL",
151 "Headphone Jack", "HPOR";
152 simple-audio-card,cpu {
155 simple-audio-card,codec {
156 sound-dai = <&es8316>;
161 compatible = "simple-audio-card";
162 simple-audio-card,name = "rockchip,spdif";
163 simple-audio-card,cpu {
164 sound-dai = <&spdif>;
166 simple-audio-card,codec {
167 sound-dai = <&spdif_out>;
171 spdif_out: spdif-out {
172 compatible = "linux,spdif-dit";
173 #sound-dai-cells = <0>;
176 sdio_pwrseq: sdio-pwrseq {
177 compatible = "mmc-pwrseq-simple";
179 clock-names = "ext_clock";
180 pinctrl-names = "default";
181 pinctrl-0 = <&wifi_enable_h>;
184 * On the module itself this is one of these (depending
185 * on the actual card populated):
186 * - SDIO_RESET_L_WL_REG_ON
187 * - PDN (power down when low)
189 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
193 compatible = "wlan-platdata";
194 rockchip,grf = <&grf>;
195 wifi_chip_type = "ap6354";
197 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
202 compatible = "bluetooth-platdata";
203 //wifi-bt-power-toggle;
204 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
205 pinctrl-names = "default", "rts_gpio";
206 pinctrl-0 = <&uart0_rts>;
207 pinctrl-1 = <&uart0_gpios>;
208 //BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
209 BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
210 BT,wake_gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
211 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
217 clock-frequency = <150000000>;
218 clock-freq-min-max = <400000 150000000>;
226 vqmmc-supply = <&vcc_sd>;
227 pinctrl-names = "default";
228 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
233 clock-frequency = <50000000>;
234 clock-freq-min-max = <200000 50000000>;
240 keep-power-in-suspend;
241 mmc-pwrseq = <&sdio_pwrseq>;
244 pinctrl-names = "default";
245 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
251 freq-sel = <200000000>;
262 mmc-hs400-enhanced-strobe;
268 rockchip,i2s-broken-burst-len;
269 rockchip,playback-channels = <8>;
270 rockchip,capture-channels = <8>;
271 #sound-dai-cells = <0>;
276 #sound-dai-cells = <0>;
281 i2c-scl-rising-time-ns = <450>;
282 i2c-scl-falling-time-ns = <15>;
287 i2c-scl-rising-time-ns = <600>;
288 i2c-scl-falling-time-ns = <20>;
291 compatible = "goodix,gt9xx";
293 touch-gpio = <&gpio1 20 IRQ_TYPE_LEVEL_LOW>;
294 reset-gpio = <&gpio4 22 GPIO_ACTIVE_HIGH>;
298 tp-supply = <&vcc3v0_tp>;
304 i2c-scl-rising-time-ns = <300>;
305 i2c-scl-falling-time-ns = <15>;
308 #sound-dai-cells = <0>;
309 compatible = "everest,es8316";
311 clocks = <&cru SCLK_I2S_8CH_OUT>;
312 clock-names = "mclk";
313 spk-con-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
314 hp-det-gpio = <&gpio4 28 GPIO_ACTIVE_LOW>;
319 assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
320 assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
321 assigned-clock-rates = <100000000>;
322 ep-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
324 pinctrl-names = "default";
325 pinctrl-0 = <&pcie_clkreqn>;
330 rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
331 rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
336 pinctrl-names = "default";
337 pinctrl-0 = <&uart0_xfer &uart0_cts>;
346 vbus_drv-gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
390 phy-supply = <&vcc_phy>;
392 clock_in_out = "input";
393 snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
394 snps,reset-active-low;
395 snps,reset-delays-us = <0 10000 50000>;
396 assigned-clocks = <&cru SCLK_RMII_SRC>;
397 assigned-clock-parents = <&clkin_gmac>;
398 pinctrl-names = "default";
399 pinctrl-0 = <&rgmii_pins>;
411 wifi_enable_h: wifi-enable-h {
412 rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
417 uart0_gpios: uart0-gpios {
418 rockchip,pins = <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
423 pmic_int_l: pmic-int-l {
425 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
428 pmic_dvs2: pmic-dvs2 {
430 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;