arm64: dts: rockchip: rk3399-evb: add utmi-avalid for evb1/evb2
[firefly-linux-kernel-4.4.55.git] / arch / arm64 / boot / dts / rockchip / rk3399-evb-rev2.dtsi
1 /*
2  * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
3  *
4  * This file is dual-licensed: you can use it either under the terms
5  * of the GPL or the X11 license, at your option. Note that this dual
6  * licensing only applies to this file, and not this project as a
7  * whole.
8  *
9  *  a) This file is free software; you can redistribute it and/or
10  *     modify it under the terms of the GNU General Public License as
11  *     published by the Free Software Foundation; either version 2 of the
12  *     License, or (at your option) any later version.
13  *
14  *     This file is distributed in the hope that it will be useful,
15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *     GNU General Public License for more details.
18  *
19  * Or, alternatively,
20  *
21  *  b) Permission is hereby granted, free of charge, to any person
22  *     obtaining a copy of this software and associated documentation
23  *     files (the "Software"), to deal in the Software without
24  *     restriction, including without limitation the rights to use,
25  *     copy, modify, merge, publish, distribute, sublicense, and/or
26  *     sell copies of the Software, and to permit persons to whom the
27  *     Software is furnished to do so, subject to the following
28  *     conditions:
29  *
30  *     The above copyright notice and this permission notice shall be
31  *     included in all copies or substantial portions of the Software.
32  *
33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40  *     OTHER DEALINGS IN THE SOFTWARE.
41  */
42
43 #include "rk3399-evb.dtsi"
44
45 / {
46         compatible = "rockchip,rk3399-evb-rev2", "rockchip,rk3399";
47
48         vcc5v0_sys: vcc5v0-sys {
49                 compatible = "regulator-fixed";
50                 regulator-name = "vcc5v0_sys";
51                 regulator-always-on;
52                 regulator-boot-on;
53                 regulator-min-microvolt = <5000000>;
54                 regulator-max-microvolt = <5000000>;
55         };
56 };
57
58 &cpu_l0 {
59         dynamic-power-coefficient = <121>;
60 };
61
62 &cpu_b0 {
63         dynamic-power-coefficient = <1068>;
64 };
65
66 &cluster0_opp {
67         opp@408000000 {
68                 opp-hz = /bits/ 64 <408000000>;
69                 opp-microvolt = <800000>;
70                 clock-latency-ns = <40000>;
71         };
72         opp@600000000 {
73                 opp-hz = /bits/ 64 <600000000>;
74                 opp-microvolt = <800000>;
75         };
76         opp@816000000 {
77                 opp-hz = /bits/ 64 <816000000>;
78                 opp-microvolt = <800000>;
79         };
80         opp@1008000000 {
81                 opp-hz = /bits/ 64 <1008000000>;
82                 opp-microvolt = <875000>;
83         };
84         opp@1200000000 {
85                 opp-hz = /bits/ 64 <1200000000>;
86                 opp-microvolt = <925000>;
87         };
88         opp@1416000000 {
89                 opp-hz = /bits/ 64 <1416000000>;
90                 opp-microvolt = <1025000>;
91         };
92         opp@1512000000 {
93                 opp-hz = /bits/ 64 <1512000000>;
94                 opp-microvolt = <1075000>;
95         };
96 };
97
98 &cluster1_opp {
99         opp@408000000 {
100                 opp-hz = /bits/ 64 <408000000>;
101                 opp-microvolt = <800000>;
102                 clock-latency-ns = <40000>;
103         };
104         opp@600000000 {
105                 opp-hz = /bits/ 64 <600000000>;
106                 opp-microvolt = <800000>;
107         };
108         opp@816000000 {
109                 opp-hz = /bits/ 64 <816000000>;
110                 opp-microvolt = <800000>;
111         };
112         opp@1008000000 {
113                 opp-hz = /bits/ 64 <1008000000>;
114                 opp-microvolt = <850000>;
115         };
116         opp@1200000000 {
117                 opp-hz = /bits/ 64 <1200000000>;
118                 opp-microvolt = <925000>;
119         };
120         opp@1416000000 {
121                 opp-hz = /bits/ 64 <1416000000>;
122                 opp-microvolt = <1025000>;
123         };
124         opp@1608000000 {
125                 opp-hz = /bits/ 64 <1608000000>;
126                 opp-microvolt = <1125000>;
127         };
128         opp@1800000000 {
129                 opp-hz = /bits/ 64 <1800000000>;
130                 opp-microvolt = <1200000>;
131                 status = "disabeld";
132         };
133 };
134
135 &CPU_COST_A72 {
136         busy-cost-data = <
137                 232   349       /*  408MHz */
138                 341   547       /*  600MHz */
139                 464   794       /*  816MHz */
140                 573   1141      /* 1008MHz */
141                 683   1850      /* 1200MHz */
142                 805   2499      /* 1416MHz */
143                 915   2922      /* 1608MHz */
144         //      1024  3416      /* 1800MHz */
145         >;
146         idle-cost-data = <
147               15
148               15
149                0
150         >;
151 };
152
153 &CPU_COST_A53 {
154         busy-cost-data = <
155                 121    40       /*  408M */
156                 179    62       /*  600M */
157                 243    90       /*  816M */
158                 300    126      /* 1008M */
159                 357    196      /* 1200M */
160                 421    246      /* 1416M */
161                 449    263      /* 1512M */
162         >;
163         idle-cost-data = <
164               6
165               6
166               0
167         >;
168 };
169
170 &CLUSTER_COST_A72 {
171         busy-cost-data = <
172                 232   349       /*  408MHz */
173                 341   547       /*  600MHz */
174                 464   794       /*  816MHz */
175                 573   1141      /* 1008MHz */
176                 683   1850      /* 1200MHz */
177                 805   2499      /* 1416MHz */
178                 915   2922      /* 1608MHz */
179         //      1024  3416      /* 1800MHz */
180         >;
181         idle-cost-data = <
182                  65
183                  65
184                  65
185         >;
186 };
187
188 &CLUSTER_COST_A53 {
189         busy-cost-data = <
190                 121    40       /*  408M */
191                 179    62       /*  600M */
192                 243    90       /*  816M */
193                 300    126      /* 1008M */
194                 357    196      /* 1200M */
195                 421    246      /* 1416M */
196                 449    263      /* 1512M */
197         >;
198         idle-cost-data = <
199                 56
200                 56
201                 56
202         >;
203 };
204
205 &soc_thermal {
206         sustainable-power = <1600>; /* milliwatts */
207
208         cooling-maps {
209                 map0 {
210                         trip = <&target>;
211                         cooling-device =
212                                 <&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
213                         contribution = <10240>;
214                 };
215                 map1 {
216                         trip = <&target>;
217                         cooling-device =
218                                 <&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
219                         contribution = <1024>;
220                 };
221                 map2 {
222                         trip = <&target>;
223                         cooling-device =
224                                 <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
225                         contribution = <10240>;
226                 };
227         };
228 };
229
230 &gpu_power_model {
231         dynamic-power = <1780>;
232 };
233
234 &i2c0 {
235         vdd_cpu_b: syr827@40 {
236                 compatible = "silergy,syr827";
237                 reg = <0x40>;
238                 vin-supply = <&vcc5v0_sys>;
239                 regulator-compatible = "fan53555-reg";
240                 regulator-name = "vdd_cpu_b";
241                 regulator-min-microvolt = <712500>;
242                 regulator-max-microvolt = <1500000>;
243                 regulator-ramp-delay = <1000>;
244                 fcs,suspend-voltage-selector = <1>;
245                 regulator-always-on;
246                 regulator-boot-on;
247                 regulator-initial-state = <3>;
248                         regulator-state-mem {
249                         regulator-off-in-suspend;
250                 };
251         };
252
253         lp8752: lp8752@60 {
254                 compatible = "ti,lp8752";
255                 reg = <0x60>;
256                 vin0-supply = <&vcc5v0_sys>;
257                 regulators {
258                         vdd_gpu: lp8752_buck0 {
259                                 regulator-name = "vdd_gpu";
260                                 regulator-min-microvolt = <735000>;
261                                 regulator-max-microvolt = <1400000>;
262                                 regulator-always-on;
263                                 regulator-boot-on;
264                         };
265                 };
266         };
267
268         rk808: pmic@1b {
269                 compatible = "rockchip,rk808";
270                 reg = <0x1b>;
271                 interrupt-parent = <&gpio1>;
272                 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
273                 pinctrl-names = "default";
274                 pinctrl-0 = <&pmic_int_l &pmic_dvs2>;
275                 rockchip,system-power-controller;
276                 wakeup-source;
277                 #clock-cells = <1>;
278                 clock-output-names = "xin32k", "rk808-clkout2";
279
280                 vcc1-supply = <&vcc3v3_sys>;
281                 vcc2-supply = <&vcc3v3_sys>;
282                 vcc3-supply = <&vcc3v3_sys>;
283                 vcc4-supply = <&vcc3v3_sys>;
284                 vcc6-supply = <&vcc3v3_sys>;
285                 vcc7-supply = <&vcc3v3_sys>;
286                 vcc8-supply = <&vcc3v3_sys>;
287                 vcc9-supply = <&vcc3v3_sys>;
288                 vcc10-supply = <&vcc3v3_sys>;
289                 vcc11-supply = <&vcc3v3_sys>;
290                 vcc12-supply = <&vcc3v3_sys>;
291                 vddio-supply = <&vcc1v8_pmu>;
292
293                 regulators {
294                         vdd_log: DCDC_REG1 {
295                                 regulator-always-on;
296                                 regulator-boot-on;
297                                 regulator-min-microvolt = <750000>;
298                                 regulator-max-microvolt = <1350000>;
299                                 regulator-name = "vdd_log";
300                                 regulator-state-mem {
301                                         regulator-on-in-suspend;
302                                         regulator-suspend-microvolt = <900000>;
303                                 };
304                         };
305
306                         vdd_cpu_l: DCDC_REG2 {
307                                 regulator-always-on;
308                                 regulator-boot-on;
309                                 regulator-min-microvolt = <750000>;
310                                 regulator-max-microvolt = <1350000>;
311                                 regulator-name = "vdd_cpu_l";
312                                 regulator-state-mem {
313                                         regulator-off-in-suspend;
314                                 };
315                         };
316
317                         vcc_ddr: DCDC_REG3 {
318                                 regulator-always-on;
319                                 regulator-boot-on;
320                                 regulator-name = "vcc_ddr";
321                                 regulator-state-mem {
322                                         regulator-on-in-suspend;
323                                 };
324                         };
325
326                         vcc_1v8: DCDC_REG4 {
327                                 regulator-always-on;
328                                 regulator-boot-on;
329                                 regulator-min-microvolt = <1800000>;
330                                 regulator-max-microvolt = <1800000>;
331                                 regulator-name = "vcc_1v8";
332                                 regulator-state-mem {
333                                         regulator-on-in-suspend;
334                                         regulator-suspend-microvolt = <1800000>;
335                                 };
336                         };
337
338                         vcc1v8_dvp: LDO_REG1 {
339                                 regulator-always-on;
340                                 regulator-boot-on;
341                                 regulator-min-microvolt = <1800000>;
342                                 regulator-max-microvolt = <1800000>;
343                                 regulator-name = "vcc1v8_dvp";
344                                 regulator-state-mem {
345                                         regulator-off-in-suspend;
346                                 };
347                         };
348
349                         vcc3v0_tp: LDO_REG2 {
350                                 regulator-always-on;
351                                 regulator-boot-on;
352                                 regulator-min-microvolt = <3000000>;
353                                 regulator-max-microvolt = <3000000>;
354                                 regulator-name = "vcc3v0_tp";
355                                 regulator-state-mem {
356                                         regulator-off-in-suspend;
357                                 };
358                         };
359
360                         vcc1v8_pmu: LDO_REG3 {
361                                 regulator-always-on;
362                                 regulator-boot-on;
363                                 regulator-min-microvolt = <1800000>;
364                                 regulator-max-microvolt = <1800000>;
365                                 regulator-name = "vcc1v8_pmu";
366                                 regulator-state-mem {
367                                         regulator-on-in-suspend;
368                                         regulator-suspend-microvolt = <1800000>;
369                                 };
370                         };
371
372                         vcc_sd: LDO_REG4 {
373                                 regulator-always-on;
374                                 regulator-boot-on;
375                                 regulator-min-microvolt = <1800000>;
376                                 regulator-max-microvolt = <3300000>;
377                                 regulator-name = "vcc_sd";
378                                 regulator-state-mem {
379                                         regulator-on-in-suspend;
380                                         regulator-suspend-microvolt = <3300000>;
381                                 };
382                         };
383
384                         vcca3v0_codec: LDO_REG5 {
385                                 regulator-always-on;
386                                 regulator-boot-on;
387                                 regulator-min-microvolt = <3000000>;
388                                 regulator-max-microvolt = <3000000>;
389                                 regulator-name = "vcca3v0_codec";
390                                 regulator-state-mem {
391                                         regulator-off-in-suspend;
392                                 };
393                         };
394
395                         vcc_1v5: LDO_REG6 {
396                                 regulator-always-on;
397                                 regulator-boot-on;
398                                 regulator-min-microvolt = <1500000>;
399                                 regulator-max-microvolt = <1500000>;
400                                 regulator-name = "vcc_1v5";
401                                 regulator-state-mem {
402                                         regulator-on-in-suspend;
403                                         regulator-suspend-microvolt = <1500000>;
404                                 };
405                         };
406
407                         vcca1v8_codec: LDO_REG7 {
408                                 regulator-always-on;
409                                 regulator-boot-on;
410                                 regulator-min-microvolt = <1800000>;
411                                 regulator-max-microvolt = <1800000>;
412                                 regulator-name = "vcca1v8_codec";
413                                 regulator-state-mem {
414                                         regulator-off-in-suspend;
415                                 };
416                         };
417
418                         vcc_3v0: LDO_REG8 {
419                                 regulator-always-on;
420                                 regulator-boot-on;
421                                 regulator-min-microvolt = <3000000>;
422                                 regulator-max-microvolt = <3000000>;
423                                 regulator-name = "vcc_3v0";
424                                 regulator-state-mem {
425                                         regulator-on-in-suspend;
426                                         regulator-suspend-microvolt = <3000000>;
427                                 };
428                         };
429
430                         vcc3v3_s3: SWITCH_REG1 {
431                                 regulator-always-on;
432                                 regulator-boot-on;
433                                 regulator-name = "vcc3v3_s3";
434                                 regulator-state-mem {
435                                         regulator-off-in-suspend;
436                                 };
437                         };
438
439                         vcc3v3_s0: SWITCH_REG2 {
440                                 regulator-always-on;
441                                 regulator-boot-on;
442                                 regulator-name = "vcc3v3_s0";
443                                 regulator-state-mem {
444                                         regulator-off-in-suspend;
445                                 };
446                         };
447                 };
448         };
449 };
450
451 &u2phy0_otg {
452         rockchip,utmi-avalid;
453 };