arch/arm64/boot/dts/rockchip/rk3399-evb-rev2.dtsi

   1 /*
   2  * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This file is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of the
  12  *     License, or (at your option) any later version.
  13  *
  14  *     This file is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  * Or, alternatively,
  20  *
  21  *  b) Permission is hereby granted, free of charge, to any person
  22  *     obtaining a copy of this software and associated documentation
  23  *     files (the "Software"), to deal in the Software without
  24  *     restriction, including without limitation the rights to use,
  25  *     copy, modify, merge, publish, distribute, sublicense, and/or
  26  *     sell copies of the Software, and to permit persons to whom the
  27  *     Software is furnished to do so, subject to the following
  28  *     conditions:
  29  *
  30  *     The above copyright notice and this permission notice shall be
  31  *     included in all copies or substantial portions of the Software.
  32  *
  33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  40  *     OTHER DEALINGS IN THE SOFTWARE.
  41  */
  42
  43 #include "rk3399-evb.dtsi"
  44
  45 / {
  46         compatible = "rockchip,rk3399-evb-rev2", "rockchip,rk3399";
  47
  48         vcc5v0_sys: vcc5v0-sys {
  49                 compatible = "regulator-fixed";
  50                 regulator-name = "vcc5v0_sys";
  51                 regulator-always-on;
  52                 regulator-boot-on;
  53                 regulator-min-microvolt = <5000000>;
  54                 regulator-max-microvolt = <5000000>;
  55         };
  56
  57         vdd_center: vdd-center {
  58                 compatible = "pwm-regulator";
  59                 rockchip,pwm_id = <3>;
  60                 rockchip,pwm_voltage = <900000>;
  61                 pwms = <&pwm3 0 25000 0>;
  62                 regulator-name = "vdd_center";
  63                 regulator-min-microvolt = <800000>;
  64                 regulator-max-microvolt = <1400000>;
  65                 regulator-always-on;
  66                 regulator-boot-on;
  67         };
  68 };
  69
  70 &cpu_l0 {
  71         dynamic-power-coefficient = <121>;
  72 };
  73
  74 &cpu_b0 {
  75         dynamic-power-coefficient = <1068>;
  76 };
  77
  78 &cluster0_opp {
  79         opp@408000000 {
  80                 opp-hz = /bits/ 64 <408000000>;
  81                 opp-microvolt = <800000>;
  82                 clock-latency-ns = <40000>;
  83         };
  84         opp@600000000 {
  85                 opp-hz = /bits/ 64 <600000000>;
  86                 opp-microvolt = <800000>;
  87         };
  88         opp@816000000 {
  89                 opp-hz = /bits/ 64 <816000000>;
  90                 opp-microvolt = <800000>;
  91         };
  92         opp@1008000000 {
  93                 opp-hz = /bits/ 64 <1008000000>;
  94                 opp-microvolt = <875000>;
  95         };
  96         opp@1200000000 {
  97                 opp-hz = /bits/ 64 <1200000000>;
  98                 opp-microvolt = <925000>;
  99         };
 100         opp@1416000000 {
 101                 opp-hz = /bits/ 64 <1416000000>;
 102                 opp-microvolt = <1025000>;
 103         };
 104         opp@1512000000 {
 105                 opp-hz = /bits/ 64 <1512000000>;
 106                 opp-microvolt = <1075000>;
 107         };
 108 };
 109
 110 &cluster1_opp {
 111         opp@408000000 {
 112                 opp-hz = /bits/ 64 <408000000>;
 113                 opp-microvolt = <800000>;
 114                 clock-latency-ns = <40000>;
 115         };
 116         opp@600000000 {
 117                 opp-hz = /bits/ 64 <600000000>;
 118                 opp-microvolt = <800000>;
 119         };
 120         opp@816000000 {
 121                 opp-hz = /bits/ 64 <816000000>;
 122                 opp-microvolt = <800000>;
 123         };
 124         opp@1008000000 {
 125                 opp-hz = /bits/ 64 <1008000000>;
 126                 opp-microvolt = <850000>;
 127         };
 128         opp@1200000000 {
 129                 opp-hz = /bits/ 64 <1200000000>;
 130                 opp-microvolt = <925000>;
 131         };
 132         opp@1416000000 {
 133                 opp-hz = /bits/ 64 <1416000000>;
 134                 opp-microvolt = <1025000>;
 135         };
 136         opp@1608000000 {
 137                 opp-hz = /bits/ 64 <1608000000>;
 138                 opp-microvolt = <1125000>;
 139         };
 140         opp@1800000000 {
 141                 opp-hz = /bits/ 64 <1800000000>;
 142                 opp-microvolt = <1200000>;
 143                 status = "disabeld";
 144         };
 145 };
 146
 147 &CPU_COST_A72 {
 148         busy-cost-data = <
 149                 232   349       /*  408MHz */
 150                 341   547       /*  600MHz */
 151                 464   794       /*  816MHz */
 152                 573   1141      /* 1008MHz */
 153                 683   1850      /* 1200MHz */
 154                 805   2499      /* 1416MHz */
 155                 915   2922      /* 1608MHz */
 156         //      1024  3416      /* 1800MHz */
 157         >;
 158         idle-cost-data = <
 159               15
 160               15
 161                0
 162         >;
 163 };
 164
 165 &CPU_COST_A53 {
 166         busy-cost-data = <
 167                 121    40       /*  408M */
 168                 179    62       /*  600M */
 169                 243    90       /*  816M */
 170                 300    126      /* 1008M */
 171                 357    196      /* 1200M */
 172                 421    246      /* 1416M */
 173                 449    263      /* 1512M */
 174         >;
 175         idle-cost-data = <
 176               6
 177               6
 178               0
 179         >;
 180 };
 181
 182 &CLUSTER_COST_A72 {
 183         busy-cost-data = <
 184                 232   349       /*  408MHz */
 185                 341   547       /*  600MHz */
 186                 464   794       /*  816MHz */
 187                 573   1141      /* 1008MHz */
 188                 683   1850      /* 1200MHz */
 189                 805   2499      /* 1416MHz */
 190                 915   2922      /* 1608MHz */
 191         //      1024  3416      /* 1800MHz */
 192         >;
 193         idle-cost-data = <
 194                  65
 195                  65
 196                  65
 197         >;
 198 };
 199
 200 &CLUSTER_COST_A53 {
 201         busy-cost-data = <
 202                 121    40       /*  408M */
 203                 179    62       /*  600M */
 204                 243    90       /*  816M */
 205                 300    126      /* 1008M */
 206                 357    196      /* 1200M */
 207                 421    246      /* 1416M */
 208                 449    263      /* 1512M */
 209         >;
 210         idle-cost-data = <
 211                 56
 212                 56
 213                 56
 214         >;
 215 };
 216
 217 &soc_thermal {
 218         sustainable-power = <1600>; /* milliwatts */
 219
 220         cooling-maps {
 221                 map0 {
 222                         trip = <&target>;
 223                         cooling-device =
 224                                 <&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
 225                         contribution = <10240>;
 226                 };
 227                 map1 {
 228                         trip = <&target>;
 229                         cooling-device =
 230                                 <&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
 231                         contribution = <1024>;
 232                 };
 233                 map2 {
 234                         trip = <&target>;
 235                         cooling-device =
 236                                 <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
 237                         contribution = <10240>;
 238                 };
 239         };
 240 };
 241
 242 &gpu_power_model {
 243         dynamic-power = <1780>;
 244 };
 245
 246 &i2c0 {
 247         fusb1: fusb30x@22 {
 248                 compatible = "fairchild,fusb302";
 249                 reg = <0x22>;
 250                 pinctrl-names = "default";
 251                 pinctrl-0 = <&fusb1_int>;
 252                 vbus-5v-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
 253                 int-n-gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
 254                 status = "okay";
 255         };
 256
 257         vdd_cpu_b: syr827@40 {
 258                 compatible = "silergy,syr827";
 259                 reg = <0x40>;
 260                 vin-supply = <&vcc5v0_sys>;
 261                 regulator-compatible = "fan53555-reg";
 262                 regulator-name = "vdd_cpu_b";
 263                 regulator-min-microvolt = <712500>;
 264                 regulator-max-microvolt = <1500000>;
 265                 regulator-ramp-delay = <1000>;
 266                 fcs,suspend-voltage-selector = <1>;
 267                 regulator-always-on;
 268                 regulator-boot-on;
 269                 regulator-initial-state = <3>;
 270                         regulator-state-mem {
 271                         regulator-off-in-suspend;
 272                 };
 273         };
 274
 275         lp8752: lp8752@60 {
 276                 compatible = "ti,lp8752";
 277                 reg = <0x60>;
 278                 vin0-supply = <&vcc5v0_sys>;
 279                 regulators {
 280                         vdd_gpu: lp8752_buck0 {
 281                                 regulator-name = "vdd_gpu";
 282                                 regulator-min-microvolt = <735000>;
 283                                 regulator-max-microvolt = <1400000>;
 284                                 regulator-always-on;
 285                                 regulator-boot-on;
 286                         };
 287                 };
 288         };
 289
 290         rk808: pmic@1b {
 291                 compatible = "rockchip,rk808";
 292                 reg = <0x1b>;
 293                 interrupt-parent = <&gpio1>;
 294                 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
 295                 pinctrl-names = "default";
 296                 pinctrl-0 = <&pmic_int_l &pmic_dvs2>;
 297                 rockchip,system-power-controller;
 298                 wakeup-source;
 299                 #clock-cells = <1>;
 300                 clock-output-names = "xin32k", "rk808-clkout2";
 301
 302                 vcc1-supply = <&vcc3v3_sys>;
 303                 vcc2-supply = <&vcc3v3_sys>;
 304                 vcc3-supply = <&vcc3v3_sys>;
 305                 vcc4-supply = <&vcc3v3_sys>;
 306                 vcc6-supply = <&vcc3v3_sys>;
 307                 vcc7-supply = <&vcc3v3_sys>;
 308                 vcc8-supply = <&vcc3v3_sys>;
 309                 vcc9-supply = <&vcc3v3_sys>;
 310                 vcc10-supply = <&vcc3v3_sys>;
 311                 vcc11-supply = <&vcc3v3_sys>;
 312                 vcc12-supply = <&vcc3v3_sys>;
 313                 vddio-supply = <&vcc1v8_pmu>;
 314
 315                 regulators {
 316                         vdd_log: DCDC_REG1 {
 317                                 regulator-always-on;
 318                                 regulator-boot-on;
 319                                 regulator-min-microvolt = <750000>;
 320                                 regulator-max-microvolt = <1350000>;
 321                                 regulator-name = "vdd_log";
 322                                 regulator-state-mem {
 323                                         regulator-on-in-suspend;
 324                                         regulator-suspend-microvolt = <900000>;
 325                                 };
 326                         };
 327
 328                         vdd_cpu_l: DCDC_REG2 {
 329                                 regulator-always-on;
 330                                 regulator-boot-on;
 331                                 regulator-min-microvolt = <750000>;
 332                                 regulator-max-microvolt = <1350000>;
 333                                 regulator-name = "vdd_cpu_l";
 334                                 regulator-state-mem {
 335                                         regulator-off-in-suspend;
 336                                 };
 337                         };
 338
 339                         vcc_ddr: DCDC_REG3 {
 340                                 regulator-always-on;
 341                                 regulator-boot-on;
 342                                 regulator-name = "vcc_ddr";
 343                                 regulator-state-mem {
 344                                         regulator-on-in-suspend;
 345                                 };
 346                         };
 347
 348                         vcc_1v8: DCDC_REG4 {
 349                                 regulator-always-on;
 350                                 regulator-boot-on;
 351                                 regulator-min-microvolt = <1800000>;
 352                                 regulator-max-microvolt = <1800000>;
 353                                 regulator-name = "vcc_1v8";
 354                                 regulator-state-mem {
 355                                         regulator-on-in-suspend;
 356                                         regulator-suspend-microvolt = <1800000>;
 357                                 };
 358                         };
 359
 360                         vcc1v8_dvp: LDO_REG1 {
 361                                 regulator-always-on;
 362                                 regulator-boot-on;
 363                                 regulator-min-microvolt = <1800000>;
 364                                 regulator-max-microvolt = <1800000>;
 365                                 regulator-name = "vcc1v8_dvp";
 366                                 regulator-state-mem {
 367                                         regulator-off-in-suspend;
 368                                 };
 369                         };
 370
 371                         vcc3v0_tp: LDO_REG2 {
 372                                 regulator-always-on;
 373                                 regulator-boot-on;
 374                                 regulator-min-microvolt = <3000000>;
 375                                 regulator-max-microvolt = <3000000>;
 376                                 regulator-name = "vcc3v0_tp";
 377                                 regulator-state-mem {
 378                                         regulator-off-in-suspend;
 379                                 };
 380                         };
 381
 382                         vcc1v8_pmu: LDO_REG3 {
 383                                 regulator-always-on;
 384                                 regulator-boot-on;
 385                                 regulator-min-microvolt = <1800000>;
 386                                 regulator-max-microvolt = <1800000>;
 387                                 regulator-name = "vcc1v8_pmu";
 388                                 regulator-state-mem {
 389                                         regulator-on-in-suspend;
 390                                         regulator-suspend-microvolt = <1800000>;
 391                                 };
 392                         };
 393
 394                         vcc_sd: LDO_REG4 {
 395                                 regulator-always-on;
 396                                 regulator-boot-on;
 397                                 regulator-min-microvolt = <1800000>;
 398                                 regulator-max-microvolt = <3300000>;
 399                                 regulator-name = "vcc_sd";
 400                                 regulator-state-mem {
 401                                         regulator-on-in-suspend;
 402                                         regulator-suspend-microvolt = <3300000>;
 403                                 };
 404                         };
 405
 406                         vcca3v0_codec: LDO_REG5 {
 407                                 regulator-always-on;
 408                                 regulator-boot-on;
 409                                 regulator-min-microvolt = <3000000>;
 410                                 regulator-max-microvolt = <3000000>;
 411                                 regulator-name = "vcca3v0_codec";
 412                                 regulator-state-mem {
 413                                         regulator-off-in-suspend;
 414                                 };
 415                         };
 416
 417                         vcc_1v5: LDO_REG6 {
 418                                 regulator-always-on;
 419                                 regulator-boot-on;
 420                                 regulator-min-microvolt = <1500000>;
 421                                 regulator-max-microvolt = <1500000>;
 422                                 regulator-name = "vcc_1v5";
 423                                 regulator-state-mem {
 424                                         regulator-on-in-suspend;
 425                                         regulator-suspend-microvolt = <1500000>;
 426                                 };
 427                         };
 428
 429                         vcca1v8_codec: LDO_REG7 {
 430                                 regulator-always-on;
 431                                 regulator-boot-on;
 432                                 regulator-min-microvolt = <1800000>;
 433                                 regulator-max-microvolt = <1800000>;
 434                                 regulator-name = "vcca1v8_codec";
 435                                 regulator-state-mem {
 436                                         regulator-off-in-suspend;
 437                                 };
 438                         };
 439
 440                         vcc_3v0: LDO_REG8 {
 441                                 regulator-always-on;
 442                                 regulator-boot-on;
 443                                 regulator-min-microvolt = <3000000>;
 444                                 regulator-max-microvolt = <3000000>;
 445                                 regulator-name = "vcc_3v0";
 446                                 regulator-state-mem {
 447                                         regulator-on-in-suspend;
 448                                         regulator-suspend-microvolt = <3000000>;
 449                                 };
 450                         };
 451
 452                         vcc3v3_s3: SWITCH_REG1 {
 453                                 regulator-always-on;
 454                                 regulator-boot-on;
 455                                 regulator-name = "vcc3v3_s3";
 456                                 regulator-state-mem {
 457                                         regulator-off-in-suspend;
 458                                 };
 459                         };
 460
 461                         vcc3v3_s0: SWITCH_REG2 {
 462                                 regulator-always-on;
 463                                 regulator-boot-on;
 464                                 regulator-name = "vcc3v3_s0";
 465                                 regulator-state-mem {
 466                                         regulator-off-in-suspend;
 467                                 };
 468                         };
 469                 };
 470         };
 471 };
 472
 473 &pwm3 {
 474         status = "okay";
 475 };
 476
 477 &u2phy0_otg {
 478         rockchip,utmi-avalid;
 479 };
 480
 481 &i2c6 {
 482         status = "okay";
 483         fusb0: fusb30x@22 {
 484                 compatible = "fairchild,fusb302";
 485                 reg = <0x22>;
 486                 pinctrl-names = "default";
 487                 pinctrl-0 = <&fusb0_int>;
 488                 vbus-5v-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
 489                 int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
 490                 status = "okay";
 491         };
 492 };