2 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
44 #include <dt-bindings/pwm/pwm.h>
45 #include <dt-bindings/sensor-dev.h>
46 #include "rk3399.dtsi"
47 #include "rk3399-android-6.0.dtsi"
48 #include "rk3399-opp.dtsi"
51 model = "Rockchip RK3399 VR Board";
52 compatible = "rockchip,vr", "rockchip,rk3399";
56 compatible = "inv-hid,mpu6500";
60 compatible = "pwm-regulator";
61 pwms = <&pwm2 0 25000 1>;
63 rockchip,pwm_voltage = <900000>;
64 regulator-name = "vdd_log";
65 regulator-min-microvolt = <800000>;
66 regulator-max-microvolt = <1400000>;
72 compatible = "regulator-fixed";
73 regulator-name = "vcc_sys";
76 regulator-min-microvolt = <4000000>;
77 regulator-max-microvolt = <4000000>;
80 vcc3v3_sys: vcc3v3-sys {
81 compatible = "regulator-fixed";
82 regulator-name = "vcc3v3_sys";
85 regulator-min-microvolt = <3300000>;
86 regulator-max-microvolt = <3300000>;
89 vcc5v0_host: vcc5v0-host-regulator {
90 compatible = "regulator-fixed";
92 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
93 pinctrl-names = "default";
94 pinctrl-0 = <&host_vbus_drv>;
95 regulator-name = "vcc5v0_host";
99 vcc_phy: vcc-phy-regulator {
100 compatible = "regulator-fixed";
101 regulator-name = "vcc_phy";
107 compatible = "simple-audio-card";
108 simple-audio-card,name = "rockchip,spdif";
109 simple-audio-card,cpu {
110 sound-dai = <&spdif>;
112 simple-audio-card,codec {
113 sound-dai = <&spdif_out>;
117 spdif_out: spdif-out {
118 compatible = "linux,spdif-dit";
119 #sound-dai-cells = <0>;
122 dw_hdmi_audio: dw-hdmi-audio {
124 compatible = "rockchip,dw-hdmi-audio";
125 #sound-dai-cells = <0>;
128 hdmi_sound: hdmi-sound {
130 compatible = "simple-audio-card";
131 simple-audio-card,format = "i2s";
132 simple-audio-card,mclk-fs = <256>;
133 simple-audio-card,name = "rockchip,hdmi";
134 simple-audio-card,cpu {
137 simple-audio-card,codec {
138 sound-dai = <&dw_hdmi_audio>;
142 sdio_pwrseq: sdio-pwrseq {
143 compatible = "mmc-pwrseq-simple";
145 clock-names = "ext_clock";
146 pinctrl-names = "default";
147 pinctrl-0 = <&wifi_enable_h>;
150 * On the module itself this is one of these (depending
151 * on the actual card populated):
152 * - SDIO_RESET_L_WL_REG_ON
153 * - PDN (power down when low)
155 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
159 compatible = "wlan-platdata";
160 rockchip,grf = <&grf>;
161 wifi_chip_type = "ap6330";
163 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
168 compatible = "bluetooth-platdata";
170 clock-names = "ext_clock";
171 //wifi-bt-power-toggle;
172 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
173 pinctrl-names = "default", "rts_gpio";
174 pinctrl-0 = <&uart0_rts>;
175 pinctrl-1 = <&uart0_gpios>;
176 //BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
177 BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
178 BT,wake_gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
179 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
184 compatible = "rockchip,uboot-charge";
185 rockchip,uboot-charge-on = <0>;
186 rockchip,android-charge-on = <1>;
189 rk_vr_key: rockchip-vr-key {
190 compatible = "rockchip,key";
193 io-channels = <&saradc 1>;
197 label = "volume down";
198 rockchip,adc_value = <170>;
204 rockchip,adc_value = <340>;
210 rockchip,adc_value = <420>;
216 rockchip,adc_value = <520>;
220 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
229 rockchip,adc_value = <620>;
235 rockchip,adc_value = <700>;
241 rockchip,adc_value = <780>;
246 compatible = "rockchip_headset";
247 headset_gpio = <&gpio4 28 GPIO_ACTIVE_LOW>;
248 pinctrl-names = "default";
249 pinctrl-0 = <&hp_det>;
250 io-channels = <&saradc 2>;
255 clock-frequency = <150000000>;
256 clock-freq-min-max = <400000 150000000>;
264 vqmmc-supply = <&vcc_sd>;
265 pinctrl-names = "default";
266 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
271 clock-frequency = <50000000>;
272 clock-freq-min-max = <200000 50000000>;
278 keep-power-in-suspend;
279 mmc-pwrseq = <&sdio_pwrseq>;
282 pinctrl-names = "default";
283 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
297 keep-power-in-suspend;
298 mmc-hs400-enhanced-strobe;
304 rockchip,i2s-broken-burst-len;
305 rockchip,playback-channels = <8>;
306 rockchip,capture-channels = <8>;
307 #sound-dai-cells = <0>;
311 #sound-dai-cells = <0>;
317 bt656-supply = <&vcc1v8_dvp>;
318 audio-supply = <&vcca1v8_codec>;
319 sdmmc-supply = <&vcc_sd>;
320 gpio1830-supply = <&vcc_3v0>;
325 #sound-dai-cells = <0>;
330 i2c-scl-rising-time-ns = <219>;
331 i2c-scl-falling-time-ns = <15>;
332 clock-frequency = <400000>;
334 vdd_cpu_b: syr827@40 {
335 compatible = "silergy,syr827";
337 vin-supply = <&vcc_sys>;
338 regulator-compatible = "fan53555-reg";
339 pinctrl-0 = <&vsel1_gpio>;
340 vsel-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
341 regulator-name = "vdd_cpu_b";
342 regulator-min-microvolt = <712500>;
343 regulator-max-microvolt = <1500000>;
344 regulator-ramp-delay = <1000>;
345 fcs,suspend-voltage-selector = <1>;
347 regulator-initial-state = <3>;
348 regulator-state-mem {
349 regulator-off-in-suspend;
354 compatible = "silergy,syr828";
356 vin-supply = <&vcc_sys>;
357 regulator-compatible = "fan53555-reg";
358 pinctrl-0 = <&vsel2_gpio>;
359 vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
360 regulator-name = "vdd_gpu";
361 regulator-min-microvolt = <712500>;
362 regulator-max-microvolt = <1500000>;
363 regulator-ramp-delay = <1000>;
364 fcs,suspend-voltage-selector = <1>;
366 regulator-initial-state = <3>;
367 regulator-initial-mode = <1>;/*1:pwm 2: auto mode*/
368 regulator-state-mem {
369 regulator-off-in-suspend;
374 compatible = "rockchip,rk818";
377 clock-output-names = "xin32k", "wifibt_32kin";
378 interrupt-parent = <&gpio1>;
379 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
380 pinctrl-names = "default";
381 pinctrl-0 = <&pmic_int_l>;
382 rockchip,system-power-controller;
387 vcc1-supply = <&vcc_sys>;
388 vcc2-supply = <&vcc_sys>;
389 vcc3-supply = <&vcc_sys>;
390 vcc4-supply = <&vcc_sys>;
391 vcc6-supply = <&vcc_sys>;
392 vcc7-supply = <&vcc3v3_sys>;
393 vcc8-supply = <&vcc_sys>;
394 vcc9-supply = <&vcc3v3_sys>;
397 vdd_cpu_l: DCDC_REG1 {
398 regulator-name = "vdd_cpu_l";
401 regulator-min-microvolt = <750000>;
402 regulator-max-microvolt = <1350000>;
403 regulator-ramp-delay = <6001>;
404 regulator-state-mem {
405 regulator-off-in-suspend;
409 vdd_center: DCDC_REG2 {
410 regulator-name = "vdd_center";
413 regulator-min-microvolt = <800000>;
414 regulator-max-microvolt = <1350000>;
415 regulator-ramp-delay = <6001>;
416 regulator-state-mem {
417 regulator-off-in-suspend;
422 regulator-name = "vcc_ddr";
425 regulator-state-mem {
426 regulator-on-in-suspend;
431 regulator-name = "vcc_1v8";
434 regulator-min-microvolt = <1800000>;
435 regulator-max-microvolt = <1800000>;
436 regulator-state-mem {
437 regulator-on-in-suspend;
438 regulator-suspend-microvolt = <1800000>;
442 vcca3v0_codec: LDO_REG1 {
445 regulator-min-microvolt = <3000000>;
446 regulator-max-microvolt = <3000000>;
447 regulator-name = "vcca3v0_codec";
448 regulator-state-mem {
449 regulator-off-in-suspend;
453 vcc3v0_tp: LDO_REG2 {
456 regulator-min-microvolt = <3000000>;
457 regulator-max-microvolt = <3000000>;
458 regulator-name = "vcc3v0_tp";
459 regulator-state-mem {
460 regulator-off-in-suspend;
464 vcca1v8_codec: LDO_REG3 {
467 regulator-min-microvolt = <1800000>;
468 regulator-max-microvolt = <1800000>;
469 regulator-name = "vcca1v8_codec";
470 regulator-state-mem {
471 regulator-off-in-suspend;
475 vcc_power_on: LDO_REG4 {
478 regulator-min-microvolt = <3300000>;
479 regulator-max-microvolt = <3300000>;
480 regulator-name = "vcc_power_on";
481 regulator-state-mem {
482 regulator-on-in-suspend;
483 regulator-suspend-microvolt = <3300000>;
490 regulator-min-microvolt = <3000000>;
491 regulator-max-microvolt = <3000000>;
492 regulator-name = "vcc_3v0";
493 regulator-state-mem {
494 regulator-on-in-suspend;
495 regulator-suspend-microvolt = <3000000>;
502 regulator-min-microvolt = <1500000>;
503 regulator-max-microvolt = <1500000>;
504 regulator-name = "vcc_1v5";
505 regulator-state-mem {
506 regulator-on-in-suspend;
507 regulator-suspend-microvolt = <1500000>;
511 vcc1v8_dvp: LDO_REG7 {
514 regulator-min-microvolt = <1800000>;
515 regulator-max-microvolt = <1800000>;
516 regulator-name = "vcc1v8_dvp";
517 regulator-state-mem {
518 regulator-on-in-suspend;
519 regulator-suspend-microvolt = <1800000>;
523 vcc3v3_s3: LDO_REG8 {
526 regulator-min-microvolt = <3300000>;
527 regulator-max-microvolt = <3300000>;
528 regulator-name = "vcc3v3_s3";
529 regulator-state-mem {
530 regulator-on-in-suspend;
531 regulator-suspend-microvolt = <3300000>;
538 regulator-min-microvolt = <1800000>;
539 regulator-max-microvolt = <3300000>;
540 regulator-name = "vcc_sd";
541 regulator-state-mem {
542 regulator-on-in-suspend;
543 regulator-suspend-microvolt = <3300000>;
547 vcc3v3_s0: SWITCH_REG {
550 regulator-name = "vcc3v3_s0";
551 regulator-state-mem {
552 regulator-on-in-suspend;
558 compatible = "rk818-battery";
560 3400 3599 3671 3701 3728 3746 3762
561 3772 3781 3792 3816 3836 3866 3910
562 3942 3971 4002 4050 4088 4132 4183>;
563 design_capacity = <4000>;
564 design_qmax = <4100>;
566 max_input_current = <2000>;
567 max_chrg_current = <1800>;
568 max_chrg_voltage = <4200>;
569 sleep_enter_current = <300>;
570 sleep_exit_current = <300>;
571 power_off_thresd = <3400>;
572 zero_algorithm_vol = <3850>;
573 fb_temperature = <115>;
575 max_soc_offset = <60>;
586 i2c-scl-rising-time-ns = <164>;
587 i2c-scl-falling-time-ns = <15>;
593 i2c-scl-rising-time-ns = <345>;
594 i2c-scl-falling-time-ns = <11>;
595 clock-frequency = <400000>;
598 compatible = "fairchild,fusb302";
600 pinctrl-names = "default";
601 pinctrl-0 = <&fusb0_int>;
602 int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
613 max-freq = <50000000>;
614 pinctrl-names = "default", "sleep";
615 pinctrl-1 = <&spi1_gpio>;
619 temperature = <70000>; /* millicelsius */
623 temperature = <85000>; /* millicelsius */
627 temperature = <100000>; /* millicelsius */
631 rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
632 rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
633 rockchip,hw-tshut-temp = <110000>;
644 rockchip,u2phy-tuning;
646 u2phy0_otg: otg-port {
650 u2phy0_host: host-port {
651 phy-supply = <&vcc5v0_host>;
658 rockchip,u2phy-tuning;
660 u2phy1_otg: otg-port {
664 u2phy1_host: host-port {
665 phy-supply = <&vcc5v0_host>;
671 pinctrl-names = "default";
672 pinctrl-0 = <&uart0_xfer &uart0_cts>;
731 rockchip,pwm_id= <3>;
732 rockchip,pwm_voltage = <900000>;
740 #include <dt-bindings/display/screen-timing/lcd-box.dtsi>
744 rockchip,uboot-logo-on = <0>;
745 rockchip,disp-policy = <DISPLAY_POLICY_BOX>;
749 * if your hardware board have two typec port, you should define
750 * fusb1 and tcphy1, such as:
757 * extcon = <&fusb0>, <&fusb1>;
758 * dp_vop_sel = <DISPLAY_SOURCE_LCDC0>;
759 * dp_defaultmode = <0>;
770 dp_vop_sel = <DISPLAY_SOURCE_LCDC0>;
771 dp_defaultmode = <0>;
780 rockchip,hdmi_video_source = <DISPLAY_SOURCE_LCDC1>;
792 native-mode = <&timing1>;
794 screen-width = <104>;
808 cpu-supply = <&vdd_cpu_l>;
812 cpu-supply = <&vdd_cpu_l>;
816 cpu-supply = <&vdd_cpu_l>;
820 cpu-supply = <&vdd_cpu_l>;
824 cpu-supply = <&vdd_cpu_b>;
828 cpu-supply = <&vdd_cpu_b>;
833 mali-supply = <&vdd_gpu>;
837 * if the screen of vr helmet has a high screen resolution or
838 * high refresh rate, please increase the lowest gpu(gpu_opp_table)
839 * and cpu(cluster1_opp) frequence.
864 wifi_enable_h: wifi-enable-h {
865 rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
870 uart0_gpios: uart0-gpios {
871 rockchip,pins = <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
876 pmic_int_l: pmic-int-l {
878 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
881 pmic_dvs2: pmic-dvs2 {
883 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
886 vsel1_gpio: vsel1-gpio {
888 <1 17 RK_FUNC_GPIO &pcfg_pull_down>;
891 vsel2_gpio: vsel2-gpio {
893 <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
898 host_vbus_drv: host-vbus-drv {
900 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
905 spi1_gpio: spi1-gpio {
907 <1 7 RK_FUNC_GPIO &pcfg_output_low>,
908 <1 8 RK_FUNC_GPIO &pcfg_output_low>,
909 <1 9 RK_FUNC_GPIO &pcfg_output_low>,
910 <1 10 RK_FUNC_GPIO &pcfg_output_low>;
915 fusb0_int: fusb0-int {
916 rockchip,pins = <1 2 RK_FUNC_GPIO &pcfg_pull_up>;
922 rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_up>;
937 pmu1830-supply = <&vcc_1v8>;