2 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
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33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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44 #include "rk3399-box-android-6.0.dtsi"
47 model = "Rockchip RK3399 Board rev1 (BOX)";
48 compatible = "rockchip,rk3399-box-rev1","rockchip,rk3399-box";
52 compatible = "inv-hid,mpu6500";
58 sdio0_bus1: sdio0-bus1 {
60 <2 20 RK_FUNC_1 &pcfg_pull_up_20ma>;
63 sdio0_bus4: sdio0-bus4 {
65 <2 20 RK_FUNC_1 &pcfg_pull_up_20ma>,
66 <2 21 RK_FUNC_1 &pcfg_pull_up_20ma>,
67 <2 22 RK_FUNC_1 &pcfg_pull_up_20ma>,
68 <2 23 RK_FUNC_1 &pcfg_pull_up_20ma>;
71 sdio0_cmd: sdio0-cmd {
73 <2 24 RK_FUNC_1 &pcfg_pull_up_20ma>;
76 sdio0_clk: sdio0-clk {
78 <2 25 RK_FUNC_1 &pcfg_pull_none_20ma>;
83 sdmmc_bus1: sdmmc-bus1 {
85 <4 8 RK_FUNC_1 &pcfg_pull_up_8ma>;
88 sdmmc_bus4: sdmmc-bus4 {
90 <4 8 RK_FUNC_1 &pcfg_pull_up_8ma>,
91 <4 9 RK_FUNC_1 &pcfg_pull_up_8ma>,
92 <4 10 RK_FUNC_1 &pcfg_pull_up_8ma>,
93 <4 11 RK_FUNC_1 &pcfg_pull_up_8ma>;
96 sdmmc_clk: sdmmc-clk {
98 <4 12 RK_FUNC_1 &pcfg_pull_none_18ma>;
101 sdmmc_cmd: sdmmc-cmd {
103 <4 13 RK_FUNC_1 &pcfg_pull_up_8ma>;
108 fusb0_int: fusb0-int {
110 <1 2 RK_FUNC_GPIO &pcfg_pull_up>;
118 compatible = "fairchild,fusb302";
120 pinctrl-names = "default";
121 pinctrl-0 = <&fusb0_int>;
122 vbus-5v-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
123 int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
129 rockchip,u2phy-tuning;
133 rockchip,u2phy-tuning;
137 * if your hardware board have two typec port, you should define
138 * fusb1 and tcphy1, such as:
145 * extcon = <&fusb0>, <&fusb1>;
146 * dp_vop_sel = <DISPLAY_SOURCE_LCDC0>;
147 * dp_defaultmode = <0>;
159 dp_vop_sel = <DISPLAY_SOURCE_LCDC0>;
160 dp_defaultmode = <0>;
169 rockchip,hdmi_video_source = <DISPLAY_SOURCE_LCDC1>;
186 native-mode = <&timing1>;
189 screen-hight = <120>;
194 * if the screen of vr helmet has a high screen resolution or
195 * high refresh rate,please increase the lowest gpu(gpu_opp_table)
196 * and cpu(cluster1_opp) frequence.