2 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
44 #include <dt-bindings/pwm/pwm.h>
45 #include "rk3366.dtsi"
48 model = "Rockchip SDK tb board";
49 compatible = "rockchip,tb", "rockchip,rk3366";
52 bootargs = "console=uart,mmio32,0xff690000";
56 compatible = "rockchip,ion";
61 reg = <0x00000000 0x02000000>;
68 ramoops_mem: ramoops_mem {
69 reg = <0x0 0x100000 0x0 0x100000>;
70 reg-names = "ramoops_mem";
74 compatible = "ramoops";
75 record-size = <0x0 0x10000>;
76 console-size = <0x0 0x80000>;
77 ftrace-size = <0x0 0x10000>;
78 pmsg-size = <0x0 0x50000>;
79 memory-region = <&ramoops_mem>;
82 backlight: backlight {
83 compatible = "pwm-backlight";
84 pwms = <&pwm0 0 25000 PWM_POLARITY_INVERTED>;
88 16 17 18 19 20 21 22 23
89 24 25 26 27 28 29 30 31
90 32 33 34 35 36 37 38 39
91 40 41 42 43 44 45 46 47
92 48 49 50 51 52 53 54 55
93 56 57 58 59 60 61 62 63
94 64 65 66 67 68 69 70 71
95 72 73 74 75 76 77 78 79
96 80 81 82 83 84 85 86 87
97 88 89 90 91 92 93 94 95
98 96 97 98 99 100 101 102 103
99 104 105 106 107 108 109 110 111
100 112 113 114 115 116 117 118 119
101 120 121 122 123 124 125 126 127
102 128 129 130 131 132 133 134 135
103 136 137 138 139 140 141 142 143
104 144 145 146 147 148 149 150 151
105 152 153 154 155 156 157 158 159
106 160 161 162 163 164 165 166 167
107 168 169 170 171 172 173 174 175
108 176 177 178 179 180 181 182 183
109 184 185 186 187 188 189 190 191
110 192 193 194 195 196 197 198 199
111 200 201 202 203 204 205 206 207
112 208 209 210 211 212 213 214 215
113 216 217 218 219 220 221 222 223
114 224 225 226 227 228 229 230 231
115 232 233 234 235 236 237 238 239
116 240 241 242 243 244 245 246 247
117 248 249 250 251 252 253 254 255>;
118 default-brightness-level = <200>;
119 enable-gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>;
122 rk_key: rockchip-key {
123 compatible = "rockchip,key";
126 io-channels = <&saradc 1>;
131 rockchip,adc_value = <1>;
136 label = "volume down";
137 rockchip,adc_value = <170>;
141 gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
150 rockchip,adc_value = <355>;
156 rockchip,adc_value = <746>;
162 rockchip,adc_value = <560>;
168 rockchip,adc_value = <450>;
173 compatible = "simple-audio-card";
174 simple-audio-card,format = "i2s";
175 simple-audio-card,name = "rockchip,rt5640-codec";
176 simple-audio-card,mclk-fs = <256>;
177 simple-audio-card,widgets =
178 "Microphone", "Mic Jack",
179 "Headphone", "Headphone Jack";
180 simple-audio-card,routing =
181 "Mic Jack", "MICBIAS1",
183 "Headphone Jack", "HPOL",
184 "Headphone Jack", "HPOR";
185 simple-audio-card,cpu {
186 sound-dai = <&i2s_8ch>;
188 simple-audio-card,codec {
189 sound-dai = <&rt5640>;
194 compatible = "simple-audio-card";
195 simple-audio-card,name = "rockchip,spdif";
196 simple-audio-card,cpu {
197 sound-dai = <&spdif>;
199 simple-audio-card,codec {
200 sound-dai = <&spdif_out>;
204 spdif_out: spdif-out {
205 compatible = "linux,spdif-dit";
206 #sound-dai-cells = <0>;
210 compatible = "regulator-fixed";
211 regulator-name = "vcc_sys";
214 regulator-min-microvolt = <3800000>;
215 regulator-max-microvolt = <3800000>;
218 ext_gmac: external-gmac-clock {
219 compatible = "fixed-clock";
220 clock-frequency = <125000000>;
221 clock-output-names = "ext_gmac";
225 vcc_phy: vcc-phy-regulator {
226 compatible = "regulator-fixed";
228 gpio = <&gpio0 25 GPIO_ACTIVE_HIGH>;
229 pinctrl-names = "default";
230 pinctrl-0 = <ð_phy_pwr>;
231 regulator-name = "vcc_phy";
237 compatible = "rockchip,rk3366-io-voltage-domain";
238 rockchip,grf = <&grf>;
240 lcdc-supply = <&vcc_io>;
241 dvpts-supply = <&vcc_18>;
242 wifibt-supply = <&vccio_wl>;
243 audio-supply = <&vcc_io>;
244 sdcard-supply = <&vccio_sd>;
245 tphdsor-supply = <&vcc_io>;
248 dwc_control_usb: dwc-control-usb {
249 compatible = "rockchip,rk3368-dwc-control-usb";
250 rockchip,grf = <&grf>;
251 grf-offset = <0x049c>; /* GRF_SOC_STATUS for USB2.0 OTG */
252 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
253 <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
254 <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
255 <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
256 interrupt-names = "otg_id", "otg_bvalid",
257 "otg_linestate", "host0_linestate";
258 clocks = <&cru SCLK_USBPHY480M>;
259 clock-names = "usbphy_480m";
262 compatible = "inno,phy";
263 regbase = &dwc_control_usb;
264 rk_usb,bvalid = <0x49c 23 1>;
265 rk_usb,iddig = <0x49c 26 1>;
266 rk_usb,vdmsrcen = <0x718 12 1>;
267 rk_usb,vdpsrcen = <0x718 11 1>;
268 rk_usb,rdmpden = <0x718 10 1>;
269 rk_usb,idpsrcen = <0x718 9 1>;
270 rk_usb,idmsinken = <0x718 8 1>;
271 rk_usb,idpsinken = <0x718 7 1>;
272 rk_usb,dpattach = <0x498 31 1>;
273 rk_usb,cpdet = <0x498 30 1>;
274 rk_usb,dcpattach = <0x498 29 1>;
279 compatible = "i2c-gpio";
280 gpios = <&gpio5 15 GPIO_ACTIVE_HIGH>, /* sda */
281 <&gpio5 16 GPIO_ACTIVE_HIGH>; /* scl */
282 i2c-gpio,delay-us = <2>; /* ~100 kHz */
283 #address-cells = <1>;
285 pinctrl-names = "default";
286 pinctrl-0 = <&i2c2_gpio>;
291 compatible = "i2c-gpio";
292 gpios = <&gpio5 9 GPIO_ACTIVE_HIGH>, /* sda */
293 <&gpio5 8 GPIO_ACTIVE_HIGH>; /* scl */
294 i2c-gpio,delay-us = <2>; /* ~100 kHz */
295 #address-cells = <1>;
297 pinctrl-names = "default";
298 pinctrl-0 = <&i2c4_gpio>;
302 compatible = "goodix,gt9xx";
304 touch-gpio = <&gpio5 11 IRQ_TYPE_LEVEL_LOW>;
305 reset-gpio = <&gpio5 10 GPIO_ACTIVE_HIGH>;
309 tp-supply = <&vcc_tp>;
314 sdio_pwrseq: sdio-pwrseq {
315 compatible = "mmc-pwrseq-simple";
317 clock-names = "ext_clock";
318 pinctrl-names = "default";
319 pinctrl-0 = <&wifi_enable_h>;
322 * On the module itself this is one of these (depending
323 * on the actual card populated):
324 * - SDIO_RESET_L_WL_REG_ON
325 * - PDN (power down when low)
327 reset-gpios = <&gpio0 14 GPIO_ACTIVE_LOW>; /* GPIO0_B6 */
331 compatible = "wlan-platdata";
332 rockchip,grf = <&grf>;
333 wifi_chip_type = "ap6335";
335 WIFI,host_wake_irq = <&gpio3 20 GPIO_ACTIVE_HIGH>; /* GPIO3_c4 */
340 compatible = "bluetooth-platdata";
341 //wifi-bt-power-toggle;
342 uart_rts_gpios = <&gpio3 11 GPIO_ACTIVE_LOW>; /* GPIO3_b3 */
343 pinctrl-names = "default","rts_gpio";
344 pinctrl-0 = <&uart0_rts>;
345 pinctrl-1 = <&uart0_rts_gpio>;
346 //BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIO3_c3 */
347 BT,reset_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIO3_c3 */
348 BT,wake_gpio = <&gpio3 18 GPIO_ACTIVE_HIGH>; /* GPIO3_c2 */
349 BT,wake_host_irq = <&gpio3 21 GPIO_ACTIVE_HIGH>; /* GPIO3_c5 */
355 status = "okay"; /* enable both for emmc and nand */
359 clock-frequency = <100000000>;
360 clock-freq-min-max = <400000 100000000>;
367 pinctrl-names = "default";
368 pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
373 clock-frequency = <37500000>;
374 clock-freq-min-max = <400000 37500000>;
379 card-detect-delay = <200>;
382 pinctrl-names = "default";
383 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
388 clock-frequency = <37500000>;
389 clock-freq-min-max = <200000 37500000>;
395 keep-power-in-suspend;
396 mmc-pwrseq = <&sdio_pwrseq>;
399 pinctrl-names = "default";
400 pinctrl-0 = <&sdio_bus4 &sdio_cmd &sdio_clk>;
407 pinctrl-0 = <&uart0_xfer &uart0_cts>;
416 i2c-scl-rising-time-ns = <250>;
417 i2c-scl-falling-time-ns = <20>;
420 regulator-name = "vdd_arm";
421 compatible = "silergy,syr827";
424 regulator-compatible = "fan53555-reg";
425 regulator-min-microvolt = <712500>;
426 regulator-max-microvolt = <1500000>;
427 fcs,suspend-voltage-selector = <1>;
430 regulator-initial-state = <3>;
431 regulator-ramp-delay = <2000>;
432 regulator-state-mem {
433 regulator-off-in-suspend;
434 regulator-suspend-microvolt = <900000>;
439 compatible = "rockchip,rk818";
442 clock-output-names = "xin32k", "wifibt_32kin";
443 interrupt-parent = <&gpio0>;
444 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
445 pinctrl-names = "default";
446 pinctrl-0 = <&pmic_int_l>;
447 rockchip,system-power-controller;
451 vcc1-supply = <&vcc_sys>;
452 vcc2-supply = <&vcc_sys>;
453 vcc3-supply = <&vcc_sys>;
454 vcc4-supply = <&vcc_sys>;
455 vcc6-supply = <&vcc_sys>;
456 vcc7-supply = <&vcc_sys>;
457 vcc8-supply = <&vcc_sys>;
458 vcc9-supply = <&vcc_io>;
461 vdd_logic: DCDC_REG1 {
462 regulator-name = "vdd_logic";
465 regulator-min-microvolt = <750000>;
466 regulator-max-microvolt = <1450000>;
467 regulator-ramp-delay = <6001>;
468 regulator-state-mem {
469 regulator-on-in-suspend;
470 regulator-suspend-microvolt = <1000000>;
475 regulator-name = "vdd_gpu";
478 regulator-min-microvolt = <800000>;
479 regulator-max-microvolt = <1250000>;
480 regulator-ramp-delay = <6001>;
481 regulator-state-mem {
482 regulator-on-in-suspend;
483 regulator-suspend-microvolt = <1000000>;
488 regulator-name = "vcc_ddr";
491 regulator-state-mem {
492 regulator-on-in-suspend;
497 regulator-name = "vcc_io";
500 regulator-min-microvolt = <3300000>;
501 regulator-max-microvolt = <3300000>;
502 regulator-state-mem {
503 regulator-on-in-suspend;
504 regulator-suspend-microvolt = <3300000>;
508 vcca_codec: LDO_REG1 {
509 regulator-name = "vcca_codec";
512 regulator-min-microvolt = <3300000>;
513 regulator-max-microvolt = <3300000>;
514 regulator-state-mem {
515 regulator-on-in-suspend;
516 regulator-suspend-microvolt = <3300000>;
521 regulator-name = "vcc_tp";
524 regulator-min-microvolt = <3000000>;
525 regulator-max-microvolt = <3000000>;
526 regulator-state-mem {
527 regulator-on-in-suspend;
528 regulator-suspend-microvolt = <3000000>;
533 regulator-name = "vdd_10";
536 regulator-min-microvolt = <1000000>;
537 regulator-max-microvolt = <1000000>;
538 regulator-state-mem {
539 regulator-on-in-suspend;
540 regulator-suspend-microvolt = <1000000>;
544 vcc18_lcd: LDO_REG4 {
545 regulator-name = "vcc18_lcd";
548 regulator-min-microvolt = <1800000>;
549 regulator-max-microvolt = <1800000>;
550 regulator-state-mem {
551 regulator-on-in-suspend;
552 regulator-suspend-microvolt = <1800000>;
556 vccio_pmu: LDO_REG5 {
557 regulator-name = "vccio_pmu";
560 regulator-min-microvolt = <1800000>;
561 regulator-max-microvolt = <1800000>;
562 regulator-state-mem {
563 regulator-on-in-suspend;
564 regulator-suspend-microvolt = <1800000>;
568 vdd10_lcd: LDO_REG6 {
569 regulator-name = "vdd10_lcd";
572 regulator-min-microvolt = <1000000>;
573 regulator-max-microvolt = <1000000>;
574 regulator-state-mem {
575 regulator-on-in-suspend;
576 regulator-suspend-microvolt = <1000000>;
581 regulator-name = "vcc_18";
584 regulator-min-microvolt = <1800000>;
585 regulator-max-microvolt = <1800000>;
586 regulator-state-mem {
587 regulator-on-in-suspend;
588 regulator-suspend-microvolt = <1800000>;
593 regulator-name = "vccio_wl";
596 regulator-min-microvolt = <1800000>;
597 regulator-max-microvolt = <3300000>;
598 regulator-state-mem {
599 regulator-on-in-suspend;
600 regulator-suspend-microvolt = <3300000>;
605 regulator-name = "vccio_sd";
608 regulator-min-microvolt = <1800000>;
609 regulator-max-microvolt = <3300000>;
610 regulator-state-mem {
611 regulator-on-in-suspend;
612 regulator-suspend-microvolt = <3300000>;
617 regulator-name = "vcc_sd";
620 regulator-state-mem {
621 regulator-on-in-suspend;
630 i2c-scl-rising-time-ns = <460>;
631 i2c-scl-falling-time-ns = <15>;
634 #sound-dai-cells = <0>;
635 compatible = "realtek,rt5640";
637 clocks = <&cru SCLK_I2S_8CH_OUT>;
638 clock-names = "mclk";
639 realtek,in1-differential;
645 rockchip,i2s-broken-burst-len;
646 rockchip,playback-channels = <8>;
647 rockchip,capture-channels = <2>;
648 #sound-dai-cells = <0>;
653 #sound-dai-cells = <0>;
670 rockchip,disp-mode = <DUAL>;
671 rockchip,uboot-logo-on = <0>;
676 #include <dt-bindings/display/screen-timing/lcd-tv080wum-mipi.dtsi>
677 /* #include <dt-bindings/display/screen-timing/lcd-b101ew05.dtsi> */
681 pinctrl-names = "lcdc", "sleep";
682 pinctrl-0 = <&lcdc_lcdc>;
683 pinctrl-1 = <&lcdc_gpio>;
693 rockchip,hdmi_video_source = <DISPLAY_SOURCE_LCDC1>;
695 <148500000 0 0 17 18 18 18>,
696 <297000000 1 1 17 14 14 14>,
697 <594000000 1 1 16 5 5 5>;
702 rockchip,prop = <EXTEND>;
703 rockchip,mirror = <NO_MIRROR>;
704 rockchip,cabc_mode = <0>;
705 rockchip,fb-win-map = <FB_DEFAULT_ORDER>;
738 rockchip,prop = <PRMRY>;
739 backlight = <&backlight>;
740 rockchip,mirror = <NO_MIRROR>;
741 rockchip,cabc_mode = <0>;
742 rockchip,fb-win-map = <FB_DEFAULT_ORDER>;
743 power_ctr: power_ctr {
744 rockchip,debug = <0>;
746 rockchip,power_type = <GPIO>;
747 gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; /* GPIO_B4 = 12 */
748 rockchip,delay = <10>;
752 rockchip,power_type = <GPIO>;
753 gpios = <&gpio0 24 GPIO_ACTIVE_HIGH>; /* GPIO_D0 = 24 */
754 rockchip,delay = <10>;
757 /* lcd_rst: lcd-rst {
758 * rockchip,power_type = <GPIO>;
759 * gpios = <&gpio3 GPIO_D6 GPIO_ACTIVE_HIGH>;
760 * rockchip,delay = <5>;
772 pmic_int_l: pmic-int-l {
773 rockchip,pins = <0 2 RK_FUNC_GPIO &pcfg_pull_up>;
778 wifi_enable_h: wifienable-h {
779 rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
784 uart0_rts_gpio: uart0-rts-gpios {
785 rockchip,pins = <3 11 RK_FUNC_GPIO &pcfg_pull_none>;
791 phy-supply = <&vcc_phy>;
793 clock_in_out = "input";
794 snps,reset-gpio = <&gpio2 15 GPIO_ACTIVE_LOW>;
795 snps,reset-active-low;
796 snps,reset-delays-us = <0 10000 50000>;
797 assigned-clocks = <&cru SCLK_MAC>;
798 assigned-clock-parents = <&ext_gmac>;
799 pinctrl-names = "default";
800 pinctrl-0 = <&rgmii_pins>;
807 host_drv_gpio = <&gpio0 16 GPIO_ACTIVE_LOW>; /* GPIO_C0 = 16 */
808 otg_drv_gpio = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO_B2 = 10 */
810 rockchip,remote_wakeup;
811 rockchip,usb_irq_wakeup;
823 clocks = <&cru SCLK_OTG_PHY0>, <&cru HCLK_OTG>;
824 clock-names = "sclk_otgphy0", "otg";
825 resets = <&cru SRST_USBOTG_AHB>,
826 <&cru SRST_USBOTG_PHY>,
827 <&cru SRST_USBOTG_CON>;
828 reset-names = "otg_ahb", "otg_phy", "otg_controller";
829 /* 0 - Normal, 1 - Force Host, 2 - Force Device */
830 rockchip,usb-mode = <0>;
831 assigned-clocks = <&cru SCLK_USBPHY480M>;
832 assigned-clock-parents = <&usbphy0>;
841 cpu-supply = <&syr827>;
845 mali-supply = <&vdd_logic>;